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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 465bd439032f819b542b3589e4ccf9605583c7c5 / . / ARM.CMSIS.pdsc
blob: 58b7c04dbaa9ef1bffb3bf248d61be4265a540c4 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame^]11 <release version="5.0.1-dev1">
12 All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
13 PDSC: added new compatible devices to 'uVision Simulator' generic board description
14 CMSIS-Pack Schema: adding
15 </release>
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]16 <release version="5.0.1-dev0">
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame^]17 CMSIS-Core:
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]18 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]19 - Updated template for secure main function (main_s.c)
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]20 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]21 CMSIS-RTOS2:
22 - RTX 5.0.1 (see revision history for details)
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]23 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]24 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]25 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]26 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]27 - Added support for Cortex-M23 and Cortex-M33.
28 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]29 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]30 - Added cmsis_compiler.h to unify compiler behaviour.
31 - Updated function SCB_EnableICache (for Cortex-M7).
32 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
33 CMSIS-RTOS:
34 - bug fix in RTX 4.82 (see revision history for details)
35 CMSIS-RTOS2:
36 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]37 - reference implementation based on RTX5
38 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]39 CMSIS-SVD:
40 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]41 - removed SVD file database documentation as SVD files are distributed in packs
42 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]43 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]44 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
45 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]46 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]47 <release version="4.5.0" date="2015-10-28">
48 - CMSIS-Core 4.30.0 (see revision history for details)
49 - CMSIS-DAP 1.1.0 (unchanged)
50 - CMSIS-Driver 2.04.0 (see revision history for details)
51 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
52 - CMSIS-PACK 1.4.1 (see revision history for details)
53 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
54 - CMSIS-SVD 1.3.1 (see revision history for details)
55 </release>
56 <release version="4.4.0" date="2015-09-11">
57 - CMSIS-Core 4.20 (see revision history for details)
58 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
59 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
60 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
61 - CMSIS-RTOS
62 -- API 1.02 (unchanged)
63 -- RTX 4.79 (see revision history for details)
64 - CMSIS-SVD 1.3.0 (see revision history for details)
65 - CMSIS-DAP 1.1.0 (extended with SWO support)
66 </release>
67 <release version="4.3.0" date="2015-03-20">
68 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
69 - CMSIS-DSP 1.4.5 (see revision history for details)
70 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
71 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
72 - CMSIS-RTOS
73 -- API 1.02 (unchanged)
74 -- RTX 4.78 (see revision history for details)
75 - CMSIS-SVD 1.2 (unchanged)
76 </release>
77 <release version="4.2.0" date="2014-09-24">
78 Adding Cortex-M7 support
79 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
80 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
81 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
82 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
83 - CMSIS-RTOS RTX 4.75 (see revision history for details)
84 </release>
85 <release version="4.1.1" date="2014-06-30">
86 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
87 </release>
88 <release version="4.1.0" date="2014-06-12">
89 - CMSIS-Driver 2.02 (incompatible update)
90 - CMSIS-Pack 1.3 (see revision history for details)
91 - CMSIS-DSP 1.4.2 (unchanged)
92 - CMSIS-Core 3.30 (unchanged)
93 - CMSIS-RTOS RTX 4.74 (unchanged)
94 - CMSIS-RTOS API 1.02 (unchanged)
95 - CMSIS-SVD 1.10 (unchanged)
96 PACK:
97 - removed G++ specific files from PACK
98 - added Component Startup variant "C Startup"
99 - added Pack Checking Utility
100 - updated conditions to reflect tool-chain dependency
101 - added Taxonomy for Graphics
102 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
103 </release>
104 <release version="4.0.0">
105 - CMSIS-Driver 2.00 Preliminary (incompatible update)
106 - CMSIS-Pack 1.1 Preliminary
107 - CMSIS-DSP 1.4.2 (see revision history for details)
108 - CMSIS-Core 3.30 (see revision history for details)
109 - CMSIS-RTOS RTX 4.74 (see revision history for details)
110 - CMSIS-RTOS API 1.02 (unchanged)
111 - CMSIS-SVD 1.10 (unchanged)
112 </release>
113 <release version="3.20.4">
114 - CMSIS-RTOS 4.74 (see revision history for details)
115 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
116 </release>
117 <release version="3.20.3">
118 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
119 - CMSIS-RTOS 4.73 (see revision history for details)
120 </release>
121 <release version="3.20.2">
122 - CMSIS-Pack documentation has been added
123 - CMSIS-Drivers header and documentation have been added to PACK
124 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
125 </release>
126 <release version="3.20.1">
127 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
128 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
129 </release>
130 <release version="3.20.0">
131 The software portions that are deployed in the application program are now under a BSD license which allows usage
132 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
133 The individual components have been update as listed below:
134 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
135 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
136 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
137 - CMSIS-SVD is unchanged.
138 </release>
139 </releases>
140
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]141 <taxonomy>
142 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
143 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
144 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
145 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
146 <description Cclass="File System">File Drive Support and File System</description>
147 <description Cclass="Graphics">Graphical User Interface</description>
148 <description Cclass="Network">Network Stack using Internet Protocols</description>
149 <description Cclass="USB">Universal Serial Bus Stack</description>
150 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
151 </taxonomy>
152
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]153 <devices>
154 <!-- ****************************** Cortex-M0 ****************************** -->
155 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]156 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]157 <description>
158The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
159- simple, easy-to-use programmers model
160- highly efficient ultra-low power operation
161- excellent code density
162- deterministic, high-performance interrupt handling
163- upward compatibility with the rest of the Cortex-M processor family.
164 </description>
165 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
166 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
167 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
168 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
169
170 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]171 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]172 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
173 </device>
174 </family>
175
176 <!-- ****************************** Cortex-M0P ****************************** -->
177 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]178 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]179 <description>
180The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
181- simple, easy-to-use programmers model
182- highly efficient ultra-low power operation
183- excellent code density
184- deterministic, high-performance interrupt handling
185- upward compatibility with the rest of the Cortex-M processor family.
186 </description>
187 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
188 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
189 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
190 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
191
192 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]193 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]194 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
195 </device>
196 </family>
197
198 <!-- ****************************** Cortex-M3 ****************************** -->
199 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]200 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]201 <description>
202The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
203- simple, easy-to-use programmers model
204- highly efficient ultra-low power operation
205- excellent code density
206- deterministic, high-performance interrupt handling
207- upward compatibility with the rest of the Cortex-M processor family.
208 </description>
209 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
210 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
211 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
212 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
213
214 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]215 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]216 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
217 </device>
218 </family>
219
220 <!-- ****************************** Cortex-M4 ****************************** -->
221 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]222 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]223 <description>
224The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
225- simple, easy-to-use programmers model
226- highly efficient ultra-low power operation
227- excellent code density
228- deterministic, high-performance interrupt handling
229- upward compatibility with the rest of the Cortex-M processor family.
230 </description>
231 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
232 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
233 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
234 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
235
236 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]237 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]238 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
239 </device>
240
241 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]242 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]243 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
244 </device>
245 </family>
246
247 <!-- ****************************** Cortex-M7 ****************************** -->
248 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]249 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]250 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]251The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]252- simple, easy-to-use programmers model
253- highly efficient ultra-low power operation
254- excellent code density
255- deterministic, high-performance interrupt handling
256- upward compatibility with the rest of the Cortex-M processor family.
257 </description>
258 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
259 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
260 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
261 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
262
263 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]264 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]265 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
266 </device>
267
268 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]269 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]270 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
271 </device>
272
273 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]274 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]275 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
276 </device>
277 </family>
278
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]279 <!-- ****************************** Cortex-M23 ********************** -->
280 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
281 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
282 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]283The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
284It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
285Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]286 </description>
287 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]288 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
289 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]290 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]291 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]292 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
293
294 <device Dname="ARMCM23">
295 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
296 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
297 </device>
298
299 <device Dname="ARMCM23_TZ">
300 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
301 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
302 </device>
303 </family>
304
305 <!-- ****************************** Cortex-M33 ****************************** -->
306 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
307 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
308 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]309The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
310class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]311 </description>
312 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]313 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
314 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]315 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]316 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
317 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]318
319 <device Dname="ARMCM33">
320 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
321 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
322 </device>
323
324 <device Dname="ARMCM33_TZ">
325 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
326 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
327 </device>
328
329 <device Dname="ARMCM33_DSP_FP">
330 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
332 </device>
333
334 <device Dname="ARMCM33_DSP_FP_TZ">
335 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
336 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
337 </device>
338 </family>
339
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]340 <!-- ****************************** ARMSC000 ****************************** -->
341 <family Dfamily="ARM SC000" Dvendor="ARM:82">
342 <description>
343The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
344- simple, easy-to-use programmers model
345- highly efficient ultra-low power operation
346- excellent code density
347- deterministic, high-performance interrupt handling
348 </description>
349 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
350 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
351 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
352 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
353
354 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]355 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]356 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
357 </device>
358 </family>
359
360 <!-- ****************************** ARMSC300 ****************************** -->
361 <family Dfamily="ARM SC300" Dvendor="ARM:82">
362 <description>
363The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
364- simple, easy-to-use programmers model
365- highly efficient ultra-low power operation
366- excellent code density
367- deterministic, high-performance interrupt handling
368 </description>
369 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
370 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
371 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
372 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
373
374 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]375 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]376 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
377 </device>
378 </family>
379
380 <!-- ****************************** ARMv8-M Baseline ********************** -->
381 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
382 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
383 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]384ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]385 </description>
386 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]387 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
388 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]389 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]390 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]391 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
392
393 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]394 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]395 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
396 </device>
397 </family>
398
399 <!-- ****************************** ARMv8-M Mainline ****************************** -->
400 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
401 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
402 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]403ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]404 </description>
405 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]406 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
407 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]408 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]409 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]410 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
411
412 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]413 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]414 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
415 </device>
416
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]417 <device Dname="ARMv8MML_DSP">
418 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]419 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]420 </device>
421
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]422 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]423 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]424 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
425 </device>
426
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]427 <device Dname="ARMv8MML_DSP_SP">
428 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]429 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]430 </device>
431
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]432 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]433 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]434 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
435 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]436
437 <device Dname="ARMv8MML_DSP_DP">
438 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]439 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]440 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]441 </family>
442
443 </devices>
444
445
446 <apis>
447 <!-- CMSIS-RTOS API -->
448 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
449 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
450 <files>
451 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
452 </files>
453 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]454 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]455 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
456 <files>
457 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
458 </files>
459 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]460 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
461 <description>USART Driver API for Cortex-M</description>
462 <files>
463 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
464 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
465 </files>
466 </api>
467 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
468 <description>SPI Driver API for Cortex-M</description>
469 <files>
470 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
471 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
472 </files>
473 </api>
474 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
475 <description>SAI Driver API for Cortex-M</description>
476 <files>
477 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
478 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
479 </files>
480 </api>
481 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
482 <description>I2C Driver API for Cortex-M</description>
483 <files>
484 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
485 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
486 </files>
487 </api>
488 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
489 <description>CAN Driver API for Cortex-M</description>
490 <files>
491 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
492 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
493 </files>
494 </api>
495 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
496 <description>Flash Driver API for Cortex-M</description>
497 <files>
498 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
499 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
500 </files>
501 </api>
502 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
503 <description>MCI Driver API for Cortex-M</description>
504 <files>
505 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
506 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
507 </files>
508 </api>
509 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
510 <description>NAND Flash Driver API for Cortex-M</description>
511 <files>
512 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
513 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
514 </files>
515 </api>
516 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
517 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
518 <files>
519 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
520 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
521 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
522 </files>
523 </api>
524 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
525 <description>Ethernet MAC Driver API for Cortex-M</description>
526 <files>
527 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
528 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
529 </files>
530 </api>
531 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
532 <description>Ethernet PHY Driver API for Cortex-M</description>
533 <files>
534 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
535 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
536 </files>
537 </api>
538 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
539 <description>USB Device Driver API for Cortex-M</description>
540 <files>
541 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
542 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
543 </files>
544 </api>
545 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
546 <description>USB Host Driver API for Cortex-M</description>
547 <files>
548 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
549 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
550 </files>
551 </api>
552 </apis>
553
554 <!-- conditions are dependency rules that can apply to a component or an individual file -->
555 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]556 <!-- compiler -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]557 <condition id="ARMCC">
558 <require Tcompiler="ARMCC"/>
559 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]560 <condition id="GCC">
561 <require Tcompiler="GCC"/>
562 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]563 <condition id="IAR">
564 <require Tcompiler="IAR"/>
565 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]566 <condition id="ARMCC GCC">
567 <accept Tcompiler="ARMCC"/>
568 <accept Tcompiler="GCC"/>
569 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]570 <condition id="ARMCC GCC IAR">
571 <accept Tcompiler="ARMCC"/>
572 <accept Tcompiler="GCC"/>
573 <accept Tcompiler="IAR"/>
574 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]575
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]576 <!-- ARM architecture -->
577 <condition id="ARMv6-M Device">
578 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]579 <accept Dcore="Cortex-M0"/>
580 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]581 <accept Dcore="SC000"/>
582 </condition>
583 <condition id="ARMv7-M Device">
584 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]585 <accept Dcore="Cortex-M3"/>
586 <accept Dcore="Cortex-M4"/>
587 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]588 <accept Dcore="SC300"/>
589 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]590 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]591 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]592 <accept Dcore="ARMV8MBL"/>
593 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]594 <accept Dcore="Cortex-M23"/>
595 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]596 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]597 <condition id="ARMv8-M TZ Device">
598 <description>ARMv8-M architecture based device with TrustZone</description>
599 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]600 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]601 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]602 <condition id="ARMv6_7-M Device">
603 <description>ARMv6_7-M architecture based device</description>
604 <accept condition="ARMv6-M Device"/>
605 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]606 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]607 <condition id="ARMv6_7_8-M Device">
608 <description>ARMv6_7_8-M architecture based device</description>
609 <accept condition="ARMv6-M Device"/>
610 <accept condition="ARMv7-M Device"/>
611 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]612 </condition>
613
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]614 <!-- ARM core -->
615 <condition id="CM0">
616 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
617 <accept Dcore="Cortex-M0"/>
618 <accept Dcore="Cortex-M0+"/>
619 <accept Dcore="SC000"/>
620 </condition>
621 <condition id="CM3">
622 <description>Cortex-M3 or SC300 processor based device</description>
623 <accept Dcore="Cortex-M3"/>
624 <accept Dcore="SC300"/>
625 </condition>
626 <condition id="CM4">
627 <description>Cortex-M4 processor based device</description>
628 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
629 </condition>
630 <condition id="CM4_FP">
631 <description>Cortex-M4 processor based device using Floating Point Unit</description>
632 <require Dcore="Cortex-M4" Dfpu="FPU"/>
633 </condition>
634 <condition id="CM7">
635 <description>Cortex-M7 processor based device</description>
636 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
637 </condition>
638 <condition id="CM7_FP">
639 <description>Cortex-M7 processor based device using Floating Point Unit</description>
640 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
641 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
642 </condition>
643 <condition id="CM7_SP">
644 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
645 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
646 </condition>
647 <condition id="CM7_DP">
648 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
649 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
650 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]651 <condition id="CM23">
652 <description>Cortex-M23 processor based device</description>
653 <require Dcore="Cortex-M23"/>
654 </condition>
655 <condition id="CM33">
656 <description>Cortex-M33 processor based device</description>
657 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
658 </condition>
659 <condition id="CM33_DSP">
660 <description>Cortex-M33 processor based device with DSP extension</description>
661 <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
662 </condition>
663 <condition id="CM33_FP">
664 <description>Cortex-M33 processor based device using Floating Point Unit</description>
665 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
666 </condition>
667 <condition id="CM33_SP">
668 <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
669 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
670 </condition>
671 <condition id="CM33_DSP_SP">
672 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
673 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
674 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]675 <condition id="ARMv8MBL">
676 <description>ARMv8-M Baseline processor based device</description>
677 <require Dcore="ARMV8MBL"/>
678 </condition>
679 <condition id="ARMv8MML">
680 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]681 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
682 </condition>
683 <condition id="ARMv8MML_DSP">
684 <description>ARMv8-M Mainline processor based device with DSP extension</description>
685 <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]686 </condition>
687 <condition id="ARMv8MML_FP">
688 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
689 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
690 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]691 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]692 <condition id="ARMv8MML_SP">
693 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
694 <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
695 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]696 <condition id="ARMv8MML_DSP_SP">
697 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
698 <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
699 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]700 <condition id="ARMv8MML_DP">
701 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
702 <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
703 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]704 <condition id="ARMv8MML_DSP_DP">
705 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
706 <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
707 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]708
709 <!-- ARMCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]710 <condition id="CM0_ARMCC">
711 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
712 <require condition="CM0"/>
713 <require Tcompiler="ARMCC"/>
714 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]715 <condition id="CM0_LE_ARMCC">
716 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]717 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]718 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]719 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]720 <condition id="CM0_BE_ARMCC">
721 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]722 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]723 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]724 </condition>
725
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]726 <condition id="CM3_ARMCC">
727 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
728 <require condition="CM3"/>
729 <require Tcompiler="ARMCC"/>
730 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]731 <condition id="CM3_LE_ARMCC">
732 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]733 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]734 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]735 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]736 <condition id="CM3_BE_ARMCC">
737 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]738 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]739 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]740 </condition>
741
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]742 <condition id="CM4_ARMCC">
743 <description>Cortex-M4 processor based device for the ARM Compiler</description>
744 <require condition="CM4"/>
745 <require Tcompiler="ARMCC"/>
746 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]747 <condition id="CM4_LE_ARMCC">
748 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]749 <require condition="CM4_ARMCC"/>
750 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]751 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]752 <condition id="CM4_BE_ARMCC">
753 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]754 <require condition="CM4_ARMCC"/>
755 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]756 </condition>
757
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]758 <condition id="CM4_FP_ARMCC">
759 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
760 <require condition="CM4_FP"/>
761 <require Tcompiler="ARMCC"/>
762 </condition>
763 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]764 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]765 <require condition="CM4_FP_ARMCC"/>
766 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]767 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]768 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]769 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]770 <require condition="CM4_FP_ARMCC"/>
771 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]772 </condition>
773
774 <!-- XMC 4000 Series devices from Infineon require a special library -->
775 <condition id="CM4_LE_ARMCC_STD">
776 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
777 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
778 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
779 <require Tcompiler="ARMCC"/>
780 </condition>
781 <condition id="CM4_LE_ARMCC_IFX">
782 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
783 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
784 <require Tcompiler="ARMCC"/>
785 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]786 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]787 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
788 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
789 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
790 <require Tcompiler="ARMCC"/>
791 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]792 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]793 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
794 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
795 <require Tcompiler="ARMCC"/>
796 </condition>
797
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]798 <condition id="CM7_ARMCC">
799 <description>Cortex-M7 processor based device for the ARM Compiler</description>
800 <require condition="CM7"/>
801 <require Tcompiler="ARMCC"/>
802 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]803 <condition id="CM7_LE_ARMCC">
804 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]805 <require condition="CM7_ARMCC"/>
806 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]807 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]808 <condition id="CM7_BE_ARMCC">
809 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]810 <require condition="CM7_ARMCC"/>
811 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]812 </condition>
813
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]814 <condition id="CM7_FP_ARMCC">
815 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
816 <require condition="CM7_FP"/>
817 <require Tcompiler="ARMCC"/>
818 </condition>
819 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]820 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]821 <require condition="CM7_FP_ARMCC"/>
822 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]823 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]824 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]825 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]826 <require condition="CM7_FP_ARMCC"/>
827 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]828 </condition>
829
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]830 <condition id="CM7_SP_ARMCC">
831 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
832 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]833 <require Tcompiler="ARMCC"/>
834 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]835 <condition id="CM7_SP_LE_ARMCC">
836 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
837 <require condition="CM7_SP_ARMCC"/>
838 <require Dendian="Little-endian"/>
839 </condition>
840 <condition id="CM7_SP_BE_ARMCC">
841 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
842 <require condition="CM7_SP_ARMCC"/>
843 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]844 </condition>
845
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]846 <condition id="CM7_DP_ARMCC">
847 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
848 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]849 <require Tcompiler="ARMCC"/>
850 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]851 <condition id="CM7_DP_LE_ARMCC">
852 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
853 <require condition="CM7_DP_ARMCC"/>
854 <require Dendian="Little-endian"/>
855 </condition>
856 <condition id="CM7_DP_BE_ARMCC">
857 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
858 <require condition="CM7_DP_ARMCC"/>
859 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]860 </condition>
861
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]862 <condition id="CM23_ARMCC">
863 <description>Cortex-M23 processor based device for the ARM Compiler</description>
864 <require condition="CM23"/>
865 <require Tcompiler="ARMCC"/>
866 </condition>
867 <condition id="CM23_LE_ARMCC">
868 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
869 <require condition="CM23_ARMCC"/>
870 <require Dendian="Little-endian"/>
871 </condition>
872 <condition id="CM23_BE_ARMCC">
873 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
874 <require condition="CM23_ARMCC"/>
875 <require Dendian="Big-endian"/>
876 </condition>
877
878 <condition id="CM33_ARMCC">
879 <description>Cortex-M33 processor based device for the ARM Compiler</description>
880 <require condition="CM33"/>
881 <require Tcompiler="ARMCC"/>
882 </condition>
883 <condition id="CM33_LE_ARMCC">
884 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
885 <require condition="CM33_ARMCC"/>
886 <require Dendian="Little-endian"/>
887 </condition>
888 <condition id="CM33_BE_ARMCC">
889 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
890 <require condition="CM33_ARMCC"/>
891 <require Dendian="Big-endian"/>
892 </condition>
893
894 <condition id="CM33_DSP_ARMCC">
895 <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
896 <require condition="CM33_DSP"/>
897 <require Tcompiler="ARMCC"/>
898 </condition>
899 <condition id="CM33_DSP_LE_ARMCC">
900 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
901 <require condition="CM33_DSP_ARMCC"/>
902 <require Dendian="Little-endian"/>
903 </condition>
904 <condition id="CM33_DSP_BE_ARMCC">
905 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
906 <require condition="CM33_DSP_ARMCC"/>
907 <require Dendian="Big-endian"/>
908 </condition>
909
910 <condition id="CM33_FP_ARMCC">
911 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
912 <require condition="CM33_FP"/>
913 <require Tcompiler="ARMCC"/>
914 </condition>
915 <condition id="CM33_FP_LE_ARMCC">
916 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
917 <require condition="CM33_FP_ARMCC"/>
918 <require Dendian="Little-endian"/>
919 </condition>
920 <condition id="CM33_FP_BE_ARMCC">
921 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
922 <require condition="CM33_FP_ARMCC"/>
923 <require Dendian="Big-endian"/>
924 </condition>
925
926 <condition id="CM33_SP_ARMCC">
927 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
928 <require condition="CM33_SP"/>
929 <require Tcompiler="ARMCC"/>
930 </condition>
931 <condition id="CM33_SP_LE_ARMCC">
932 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
933 <require condition="CM33_SP_ARMCC"/>
934 <require Dendian="Little-endian"/>
935 </condition>
936 <condition id="CM33_SP_BE_ARMCC">
937 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
938 <require condition="CM33_SP_ARMCC"/>
939 <require Dendian="Big-endian"/>
940 </condition>
941
942 <condition id="CM33_DSP_SP_ARMCC">
943 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
944 <require condition="CM33_DSP_SP"/>
945 <require Tcompiler="ARMCC"/>
946 </condition>
947 <condition id="CM33_DSP_SP_LE_ARMCC">
948 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
949 <require condition="CM33_DSP_SP_ARMCC"/>
950 <require Dendian="Little-endian"/>
951 </condition>
952 <condition id="CM33_DSP_SP_BE_ARMCC">
953 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
954 <require condition="CM33_DSP_SP_ARMCC"/>
955 <require Dendian="Big-endian"/>
956 </condition>
957
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]958 <condition id="ARMv8MBL_ARMCC">
959 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
960 <require condition="ARMv8MBL"/>
961 <require Tcompiler="ARMCC"/>
962 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]963 <condition id="ARMv8MBL_LE_ARMCC">
964 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]965 <require condition="ARMv8MBL_ARMCC"/>
966 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]967 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]968 <condition id="ARMv8MBL_BE_ARMCC">
969 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
970 <require condition="ARMv8MBL_ARMCC"/>
971 <require Dendian="Big-endian"/>
972 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]973
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]974 <condition id="ARMv8MML_ARMCC">
975 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
976 <require condition="ARMv8MML"/>
977 <require Tcompiler="ARMCC"/>
978 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]979 <condition id="ARMv8MML_LE_ARMCC">
980 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]981 <require condition="ARMv8MML_ARMCC"/>
982 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]983 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]984 <condition id="ARMv8MML_BE_ARMCC">
985 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
986 <require condition="ARMv8MML_ARMCC"/>
987 <require Dendian="Big-endian"/>
988 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]989
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]990 <condition id="ARMv8MML_DSP_ARMCC">
991 <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
992 <require condition="ARMv8MML_DSP"/>
993 <require Tcompiler="ARMCC"/>
994 </condition>
995 <condition id="ARMv8MML_DSP_LE_ARMCC">
996 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
997 <require condition="ARMv8MML_DSP_ARMCC"/>
998 <require Dendian="Little-endian"/>
999 </condition>
1000 <condition id="ARMv8MML_DSP_BE_ARMCC">
1001 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1002 <require condition="ARMv8MML_DSP_ARMCC"/>
1003 <require Dendian="Big-endian"/>
1004 </condition>
1005
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1006 <condition id="ARMv8MML_FP_ARMCC">
1007 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1008 <require condition="ARMv8MML_FP"/>
1009 <require Tcompiler="ARMCC"/>
1010 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1011 <condition id="ARMv8MML_FP_LE_ARMCC">
1012 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1013 <require condition="ARMv8MML_FP_ARMCC"/>
1014 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1015 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1016 <condition id="ARMv8MML_FP_BE_ARMCC">
1017 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1018 <require condition="ARMv8MML_FP_ARMCC"/>
1019 <require Dendian="Big-endian"/>
1020 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1021
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1022 <condition id="ARMv8MML_SP_ARMCC">
1023 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1024 <require condition="ARMv8MML_SP"/>
1025 <require Tcompiler="ARMCC"/>
1026 </condition>
1027 <condition id="ARMv8MML_SP_LE_ARMCC">
1028 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1029 <require condition="ARMv8MML_SP_ARMCC"/>
1030 <require Dendian="Little-endian"/>
1031 </condition>
1032 <condition id="ARMv8MML_SP_BE_ARMCC">
1033 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1034 <require condition="ARMv8MML_SP_ARMCC"/>
1035 <require Dendian="Big-endian"/>
1036 </condition>
1037
1038 <condition id="ARMv8MML_DSP_SP_ARMCC">
1039 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1040 <require condition="ARMv8MML_DSP_SP"/>
1041 <require Tcompiler="ARMCC"/>
1042 </condition>
1043 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1044 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1045 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1046 <require Dendian="Little-endian"/>
1047 </condition>
1048 <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1049 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1050 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1051 <require Dendian="Big-endian"/>
1052 </condition>
1053
1054 <condition id="ARMv8MML_DP_ARMCC">
1055 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1056 <require condition="ARMv8MML_DP"/>
1057 <require Tcompiler="ARMCC"/>
1058 </condition>
1059 <condition id="ARMv8MML_DP_LE_ARMCC">
1060 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1061 <require condition="ARMv8MML_DP_ARMCC"/>
1062 <require Dendian="Little-endian"/>
1063 </condition>
1064 <condition id="ARMv8MML_DP_BE_ARMCC">
1065 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1066 <require condition="ARMv8MML_DP_ARMCC"/>
1067 <require Dendian="Big-endian"/>
1068 </condition>
1069
1070 <condition id="ARMv8MML_DSP_DP_ARMCC">
1071 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1072 <require condition="ARMv8MML_DSP_DP"/>
1073 <require Tcompiler="ARMCC"/>
1074 </condition>
1075 <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1076 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1077 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1078 <require Dendian="Little-endian"/>
1079 </condition>
1080 <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1081 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1082 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1083 <require Dendian="Big-endian"/>
1084 </condition>
1085
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1086 <!-- GCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1087 <condition id="CM0_GCC">
1088 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1089 <require condition="CM0"/>
1090 <require Tcompiler="GCC"/>
1091 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1092 <condition id="CM0_LE_GCC">
1093 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1094 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1095 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1096 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1097 <condition id="CM0_BE_GCC">
1098 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1099 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1100 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1101 </condition>
1102
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1103 <condition id="CM3_GCC">
1104 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1105 <require condition="CM3"/>
1106 <require Tcompiler="GCC"/>
1107 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1108 <condition id="CM3_LE_GCC">
1109 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1110 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1111 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1112 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1113 <condition id="CM3_BE_GCC">
1114 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1115 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1116 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1117 </condition>
1118
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1119 <condition id="CM4_GCC">
1120 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1121 <require condition="CM4"/>
1122 <require Tcompiler="GCC"/>
1123 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1124 <condition id="CM4_LE_GCC">
1125 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1126 <require condition="CM4_GCC"/>
1127 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1128 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1129 <condition id="CM4_BE_GCC">
1130 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1131 <require condition="CM4_GCC"/>
1132 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1133 </condition>
1134
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1135 <condition id="CM4_FP_GCC">
1136 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1137 <require condition="CM4_FP"/>
1138 <require Tcompiler="GCC"/>
1139 </condition>
1140 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1141 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1142 <require condition="CM4_FP_GCC"/>
1143 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1144 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1145 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1146 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1147 <require condition="CM4_FP_GCC"/>
1148 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1149 </condition>
1150
1151 <!-- XMC 4000 Series devices from Infineon require a special library -->
1152 <condition id="CM4_LE_GCC_STD">
1153 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1154 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1155 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1156 <require Tcompiler="GCC"/>
1157 </condition>
1158 <condition id="CM4_LE_GCC_IFX">
1159 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1160 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1161 <require Tcompiler="GCC"/>
1162 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1163 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1164 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1165 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1166 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1167 <require Tcompiler="GCC"/>
1168 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1169 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1170 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1171 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1172 <require Tcompiler="GCC"/>
1173 </condition>
1174
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1175 <condition id="CM7_GCC">
1176 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1177 <require condition="CM7"/>
1178 <require Tcompiler="GCC"/>
1179 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1180 <condition id="CM7_LE_GCC">
1181 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1182 <require condition="CM7_GCC"/>
1183 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1184 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1185 <condition id="CM7_BE_GCC">
1186 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1187 <require condition="CM7_GCC"/>
1188 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1189 </condition>
1190
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1191 <condition id="CM7_FP_GCC">
1192 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1193 <require condition="CM7_FP"/>
1194 <require Tcompiler="GCC"/>
1195 </condition>
1196 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1197 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1198 <require condition="CM7_FP_GCC"/>
1199 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1200 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1201 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1202 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1203 <require condition="CM7_FP_GCC"/>
1204 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1205 </condition>
1206
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1207 <condition id="CM7_SP_GCC">
1208 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1209 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1210 <require Tcompiler="GCC"/>
1211 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1212 <condition id="CM7_SP_LE_GCC">
1213 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1214 <require condition="CM7_SP_GCC"/>
1215 <require Dendian="Little-endian"/>
1216 </condition>
1217 <condition id="CM7_SP_BE_GCC">
1218 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1219 <require condition="CM7_SP_GCC"/>
1220 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1221 </condition>
1222
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1223 <condition id="CM7_DP_GCC">
1224 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1225 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1226 <require Tcompiler="GCC"/>
1227 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1228 <condition id="CM7_DP_LE_GCC">
1229 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1230 <require condition="CM7_DP_GCC"/>
1231 <require Dendian="Little-endian"/>
1232 </condition>
1233 <condition id="CM7_DP_BE_GCC">
1234 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1235 <require condition="CM7_DP_GCC"/>
1236 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1237 </condition>
1238
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1239 <condition id="CM23_GCC">
1240 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1241 <require condition="CM23"/>
1242 <require Tcompiler="GCC"/>
1243 </condition>
1244 <condition id="CM23_LE_GCC">
1245 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1246 <require condition="CM23_GCC"/>
1247 <require Dendian="Little-endian"/>
1248 </condition>
1249 <condition id="CM23_BE_GCC">
1250 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1251 <require condition="CM23_GCC"/>
1252 <require Dendian="Big-endian"/>
1253 </condition>
1254
1255 <condition id="CM33_GCC">
1256 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1257 <require condition="CM33"/>
1258 <require Tcompiler="GCC"/>
1259 </condition>
1260 <condition id="CM33_LE_GCC">
1261 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1262 <require condition="CM33_GCC"/>
1263 <require Dendian="Little-endian"/>
1264 </condition>
1265 <condition id="CM33_BE_GCC">
1266 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1267 <require condition="CM33_GCC"/>
1268 <require Dendian="Big-endian"/>
1269 </condition>
1270
1271 <condition id="CM33_DSP_GCC">
1272 <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1273 <require condition="CM33_DSP"/>
1274 <require Tcompiler="GCC"/>
1275 </condition>
1276 <condition id="CM33_DSP_LE_GCC">
1277 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1278 <require condition="CM33_DSP_GCC"/>
1279 <require Dendian="Little-endian"/>
1280 </condition>
1281 <condition id="CM33_DSP_BE_GCC">
1282 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1283 <require condition="CM33_DSP_GCC"/>
1284 <require Dendian="Big-endian"/>
1285 </condition>
1286
1287 <condition id="CM33_FP_GCC">
1288 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1289 <require condition="CM33_FP"/>
1290 <require Tcompiler="GCC"/>
1291 </condition>
1292 <condition id="CM33_FP_LE_GCC">
1293 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1294 <require condition="CM33_FP_GCC"/>
1295 <require Dendian="Little-endian"/>
1296 </condition>
1297 <condition id="CM33_FP_BE_GCC">
1298 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1299 <require condition="CM33_FP_GCC"/>
1300 <require Dendian="Big-endian"/>
1301 </condition>
1302
1303 <condition id="CM33_SP_GCC">
1304 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1305 <require condition="CM33_SP"/>
1306 <require Tcompiler="GCC"/>
1307 </condition>
1308 <condition id="CM33_SP_LE_GCC">
1309 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1310 <require condition="CM33_SP_GCC"/>
1311 <require Dendian="Little-endian"/>
1312 </condition>
1313 <condition id="CM33_SP_BE_GCC">
1314 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1315 <require condition="CM33_SP_GCC"/>
1316 <require Dendian="Big-endian"/>
1317 </condition>
1318
1319 <condition id="CM33_DSP_SP_GCC">
1320 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1321 <require condition="CM33_DSP_SP"/>
1322 <require Tcompiler="GCC"/>
1323 </condition>
1324 <condition id="CM33_DSP_SP_LE_GCC">
1325 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1326 <require condition="CM33_DSP_SP_GCC"/>
1327 <require Dendian="Little-endian"/>
1328 </condition>
1329 <condition id="CM33_DSP_SP_BE_GCC">
1330 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1331 <require condition="CM33_DSP_SP_GCC"/>
1332 <require Dendian="Big-endian"/>
1333 </condition>
1334
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1335 <condition id="ARMv8MBL_GCC">
1336 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1337 <require condition="ARMv8MBL"/>
1338 <require Tcompiler="GCC"/>
1339 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1340 <condition id="ARMv8MBL_LE_GCC">
1341 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1342 <require condition="ARMv8MBL_GCC"/>
1343 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1344 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1345 <condition id="ARMv8MBL_BE_GCC">
1346 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1347 <require condition="ARMv8MBL_GCC"/>
1348 <require Dendian="Big-endian"/>
1349 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1350
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1351 <condition id="ARMv8MML_GCC">
1352 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1353 <require condition="ARMv8MML"/>
1354 <require Tcompiler="GCC"/>
1355 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1356 <condition id="ARMv8MML_LE_GCC">
1357 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1358 <require condition="ARMv8MML_GCC"/>
1359 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1360 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1361 <condition id="ARMv8MML_BE_GCC">
1362 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1363 <require condition="ARMv8MML_GCC"/>
1364 <require Dendian="Big-endian"/>
1365 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1366
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1367 <condition id="ARMv8MML_DSP_GCC">
1368 <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1369 <require condition="ARMv8MML_DSP"/>
1370 <require Tcompiler="GCC"/>
1371 </condition>
1372 <condition id="ARMv8MML_DSP_LE_GCC">
1373 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1374 <require condition="ARMv8MML_DSP_GCC"/>
1375 <require Dendian="Little-endian"/>
1376 </condition>
1377 <condition id="ARMv8MML_DSP_BE_GCC">
1378 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1379 <require condition="ARMv8MML_DSP_GCC"/>
1380 <require Dendian="Big-endian"/>
1381 </condition>
1382
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1383 <condition id="ARMv8MML_FP_GCC">
1384 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1385 <require condition="ARMv8MML_FP"/>
1386 <require Tcompiler="GCC"/>
1387 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1388 <condition id="ARMv8MML_FP_LE_GCC">
1389 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1390 <require condition="ARMv8MML_FP_GCC"/>
1391 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1392 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1393 <condition id="ARMv8MML_FP_BE_GCC">
1394 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1395 <require condition="ARMv8MML_FP_GCC"/>
1396 <require Dendian="Big-endian"/>
1397 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1398
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1399 <condition id="ARMv8MML_SP_GCC">
1400 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1401 <require condition="ARMv8MML_SP"/>
1402 <require Tcompiler="GCC"/>
1403 </condition>
1404 <condition id="ARMv8MML_SP_LE_GCC">
1405 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1406 <require condition="ARMv8MML_SP_GCC"/>
1407 <require Dendian="Little-endian"/>
1408 </condition>
1409 <condition id="ARMv8MML_SP_BE_GCC">
1410 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1411 <require condition="ARMv8MML_SP_GCC"/>
1412 <require Dendian="Big-endian"/>
1413 </condition>
1414
1415 <condition id="ARMv8MML_DSP_SP_GCC">
1416 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1417 <require condition="ARMv8MML_DSP_SP"/>
1418 <require Tcompiler="GCC"/>
1419 </condition>
1420 <condition id="ARMv8MML_DSP_SP_LE_GCC">
1421 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1422 <require condition="ARMv8MML_DSP_SP_GCC"/>
1423 <require Dendian="Little-endian"/>
1424 </condition>
1425 <condition id="ARMv8MML_DSP_SP_BE_GCC">
1426 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1427 <require condition="ARMv8MML_DSP_SP_GCC"/>
1428 <require Dendian="Big-endian"/>
1429 </condition>
1430
1431 <condition id="ARMv8MML_DP_GCC">
1432 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1433 <require condition="ARMv8MML_DP"/>
1434 <require Tcompiler="GCC"/>
1435 </condition>
1436 <condition id="ARMv8MML_DP_LE_GCC">
1437 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1438 <require condition="ARMv8MML_DP_GCC"/>
1439 <require Dendian="Little-endian"/>
1440 </condition>
1441 <condition id="ARMv8MML_DP_BE_GCC">
1442 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1443 <require condition="ARMv8MML_DP_GCC"/>
1444 <require Dendian="Big-endian"/>
1445 </condition>
1446
1447 <condition id="ARMv8MML_DSP_DP_GCC">
1448 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1449 <require condition="ARMv8MML_DSP_DP"/>
1450 <require Tcompiler="GCC"/>
1451 </condition>
1452 <condition id="ARMv8MML_DSP_DP_LE_GCC">
1453 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1454 <require condition="ARMv8MML_DSP_DP_GCC"/>
1455 <require Dendian="Little-endian"/>
1456 </condition>
1457 <condition id="ARMv8MML_DSP_DP_BE_GCC">
1458 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1459 <require condition="ARMv8MML_DSP_DP_GCC"/>
1460 <require Dendian="Big-endian"/>
1461 </condition>
1462
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1463 <!-- IAR compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1464 <condition id="CM0_IAR">
1465 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1466 <require condition="CM0"/>
1467 <require Tcompiler="IAR"/>
1468 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1469 <condition id="CM0_LE_IAR">
1470 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1471 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1472 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1473 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1474 <condition id="CM0_BE_IAR">
1475 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1476 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1477 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1478 </condition>
1479
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1480 <condition id="CM3_IAR">
1481 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1482 <require condition="CM3"/>
1483 <require Tcompiler="IAR"/>
1484 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1485 <condition id="CM3_LE_IAR">
1486 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1487 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1488 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1489 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1490 <condition id="CM3_BE_IAR">
1491 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1492 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1493 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1494 </condition>
1495
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1496 <condition id="CM4_IAR">
1497 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1498 <require condition="CM4"/>
1499 <require Tcompiler="IAR"/>
1500 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1501 <condition id="CM4_LE_IAR">
1502 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1503 <require condition="CM4_IAR"/>
1504 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1505 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1506 <condition id="CM4_BE_IAR">
1507 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1508 <require condition="CM4_IAR"/>
1509 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1510 </condition>
1511
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1512 <condition id="CM4_FP_IAR">
1513 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1514 <require condition="CM4_FP"/>
1515 <require Tcompiler="IAR"/>
1516 </condition>
1517 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1518 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1519 <require condition="CM4_FP_IAR"/>
1520 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1521 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1522 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1523 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1524 <require condition="CM4_FP_IAR"/>
1525 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1526 </condition>
1527
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1528 <condition id="CM7_IAR">
1529 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1530 <require condition="CM7"/>
1531 <require Tcompiler="IAR"/>
1532 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1533 <condition id="CM7_LE_IAR">
1534 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1535 <require condition="CM7_IAR"/>
1536 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1537 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1538 <condition id="CM7_BE_IAR">
1539 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1540 <require condition="CM7_IAR"/>
1541 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 </condition>
1543
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1544 <condition id="CM7_FP_IAR">
1545 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1546 <require condition="CM7_FP"/>
1547 <require Tcompiler="IAR"/>
1548 </condition>
1549 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1550 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1551 <require condition="CM7_FP_IAR"/>
1552 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1553 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1554 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1555 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1556 <require condition="CM7_FP_IAR"/>
1557 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 </condition>
1559
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1560 <condition id="CM7_SP_IAR">
1561 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1562 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 <require Tcompiler="IAR"/>
1564 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1565 <condition id="CM7_SP_LE_IAR">
1566 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1567 <require condition="CM7_SP_IAR"/>
1568 <require Dendian="Little-endian"/>
1569 </condition>
1570 <condition id="CM7_SP_BE_IAR">
1571 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1572 <require condition="CM7_SP_IAR"/>
1573 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 </condition>
1575
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1576 <condition id="CM7_DP_IAR">
1577 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1578 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 <require Tcompiler="IAR"/>
1580 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <condition id="CM7_DP_LE_IAR">
1582 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1583 <require condition="CM7_DP_IAR"/>
1584 <require Dendian="Little-endian"/>
1585 </condition>
1586 <condition id="CM7_DP_BE_IAR">
1587 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1588 <require condition="CM7_DP_IAR"/>
1589 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1590 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1591
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1592 <!-- conditions selecting single devices and CMSIS Core -->
1593 <!-- used for component startup, GCC version is used for C-Startup -->
1594 <condition id="ARMCM0 CMSIS">
1595 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1596 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1597 <require Cclass="CMSIS" Cgroup="CORE"/>
1598 </condition>
1599 <condition id="ARMCM0 CMSIS GCC">
1600 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1601 <require condition="ARMCM0 CMSIS"/>
1602 <require condition="GCC"/>
1603 </condition>
1604
1605 <condition id="ARMCM0+ CMSIS">
1606 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1607 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1608 <require Cclass="CMSIS" Cgroup="CORE"/>
1609 </condition>
1610 <condition id="ARMCM0+ CMSIS GCC">
1611 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1612 <require condition="ARMCM0+ CMSIS"/>
1613 <require condition="GCC"/>
1614 </condition>
1615
1616 <condition id="ARMCM3 CMSIS">
1617 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1618 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1619 <require Cclass="CMSIS" Cgroup="CORE"/>
1620 </condition>
1621 <condition id="ARMCM3 CMSIS GCC">
1622 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1623 <require condition="ARMCM3 CMSIS"/>
1624 <require condition="GCC"/>
1625 </condition>
1626
1627 <condition id="ARMCM4 CMSIS">
1628 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1629 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1630 <require Cclass="CMSIS" Cgroup="CORE"/>
1631 </condition>
1632 <condition id="ARMCM4 CMSIS GCC">
1633 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1634 <require condition="ARMCM4 CMSIS"/>
1635 <require condition="GCC"/>
1636 </condition>
1637
1638 <condition id="ARMCM7 CMSIS">
1639 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1640 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1641 <require Cclass="CMSIS" Cgroup="CORE"/>
1642 </condition>
1643 <condition id="ARMCM7 CMSIS GCC">
1644 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1645 <require condition="ARMCM7 CMSIS"/>
1646 <require condition="GCC"/>
1647 </condition>
1648
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1649 <condition id="ARMCM23 CMSIS">
1650 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1651 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1652 <require Cclass="CMSIS" Cgroup="CORE"/>
1653 </condition>
1654 <condition id="ARMCM23 CMSIS GCC">
1655 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1656 <require condition="ARMCM23 CMSIS"/>
1657 <require condition="GCC"/>
1658 </condition>
1659
1660 <condition id="ARMCM33 CMSIS">
1661 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1662 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1663 <require Cclass="CMSIS" Cgroup="CORE"/>
1664 </condition>
1665 <condition id="ARMCM33 CMSIS GCC">
1666 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1667 <require condition="ARMCM33 CMSIS"/>
1668 <require condition="GCC"/>
1669 </condition>
1670
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1671 <condition id="ARMSC000 CMSIS">
1672 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1673 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1674 <require Cclass="CMSIS" Cgroup="CORE"/>
1675 </condition>
1676 <condition id="ARMSC000 CMSIS GCC">
1677 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1678 <require condition="ARMSC000 CMSIS"/>
1679 <require condition="GCC"/>
1680 </condition>
1681
1682 <condition id="ARMSC300 CMSIS">
1683 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1684 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1685 <require Cclass="CMSIS" Cgroup="CORE"/>
1686 </condition>
1687 <condition id="ARMSC300 CMSIS GCC">
1688 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1689 <require condition="ARMSC300 CMSIS"/>
1690 <require condition="GCC"/>
1691 </condition>
1692
1693 <condition id="ARMv8MBL CMSIS">
1694 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1695 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1696 <require Cclass="CMSIS" Cgroup="CORE"/>
1697 </condition>
1698 <condition id="ARMv8MBL CMSIS GCC">
1699 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1700 <require condition="ARMv8MBL CMSIS"/>
1701 <require condition="GCC"/>
1702 </condition>
1703
1704 <condition id="ARMv8MML CMSIS">
1705 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1706 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1707 <require Cclass="CMSIS" Cgroup="CORE"/>
1708 </condition>
1709 <condition id="ARMv8MML CMSIS GCC">
1710 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1711 <require condition="ARMv8MML CMSIS"/>
1712 <require condition="GCC"/>
1713 </condition>
1714
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1715 <!-- CMSIS DSP -->
1716 <condition id="CMSIS DSP">
1717 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1718 <require condition="ARMv6_7-M Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1719 <require Cclass="CMSIS" Cgroup="CORE"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1720 <require condition="ARMCC GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1721 </condition>
1722
1723 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1724 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1725 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1726 <require condition="ARMv6_7-M Device"/>
1727 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1728 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1729 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1730 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1731 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1732 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1733 <require condition="ARMv6_7_8-M Device"/>
1734 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1735 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1736 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1737 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1738 <description>Components required for RTOS2 RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1739 <require condition="ARMv6_7_8-M Device"/>
1740 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1741 <require Cclass="CMSIS" Cgroup="CORE"/>
1742 <require Cclass="Device" Cgroup="Startup"/>
1743 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1744 <condition id="RTOS2 RTX5 NS">
1745 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1746 <require condition="ARMv8-M TZ Device"/>
1747 <require condition="ARMCC GCC"/>
1748 <require Cclass="CMSIS" Cgroup="CORE"/>
1749 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1750 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1751
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1752 </conditions>
1753
1754 <components>
1755 <!-- CMSIS-Core component -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1756 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1757 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1758 <files>
1759 <!-- CPU independent -->
1760 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1761 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1762 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1763 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1764 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1765 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1766 </files>
1767 </component>
1768
1769 <!-- CMSIS-Startup components -->
1770 <!-- Cortex-M0 -->
1771 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1772 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1773 <files>
1774 <!-- include folder / device header file -->
1775 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1776 <!-- startup / system file -->
1777 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1778 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1779 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1780 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1781 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1782 </files>
1783 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1784 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1785 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1786 <files>
1787 <!-- include folder / device header file -->
1788 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1789 <!-- startup / system file -->
1790 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1791 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1792 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1793 </files>
1794 </component>
1795
1796 <!-- Cortex-M0+ -->
1797 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1798 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1799 <files>
1800 <!-- include folder / device header file -->
1801 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1802 <!-- startup / system file -->
1803 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1804 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1805 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1806 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1807 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1808 </files>
1809 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1810 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1811 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1812 <files>
1813 <!-- include folder / device header file -->
1814 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1815 <!-- startup / system file -->
1816 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1817 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1818 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1819 </files>
1820 </component>
1821
1822 <!-- Cortex-M3 -->
1823 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1824 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1825 <files>
1826 <!-- include folder / device header file -->
1827 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1828 <!-- startup / system file -->
1829 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1830 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1831 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1832 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1833 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1834 </files>
1835 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1836 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1837 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1838 <files>
1839 <!-- include folder / device header file -->
1840 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1841 <!-- startup / system file -->
1842 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1843 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1844 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1845 </files>
1846 </component>
1847
1848 <!-- Cortex-M4 -->
1849 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1850 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1851 <files>
1852 <!-- include folder / device header file -->
1853 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1854 <!-- startup / system file -->
1855 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1856 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1857 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1858 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1859 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1860 </files>
1861 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1862 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1863 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1864 <files>
1865 <!-- include folder / device header file -->
1866 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1867 <!-- startup / system file -->
1868 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1869 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1870 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1871 </files>
1872 </component>
1873
1874 <!-- Cortex-M7 -->
1875 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1876 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1877 <files>
1878 <!-- include folder / device header file -->
1879 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1880 <!-- startup / system file -->
1881 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1882 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1883 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1884 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1885 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1886 </files>
1887 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1888 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1889 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1890 <files>
1891 <!-- include folder / device header file -->
1892 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1893 <!-- startup / system file -->
1894 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1895 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1896 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1897 </files>
1898 </component>
1899
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1900 <!-- Cortex-M23 -->
1901 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
1902 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1903 <files>
1904 <!-- include folder / device header file -->
1905 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1906 <!-- startup / system file -->
1907 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1908 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1909 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1910 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1911 <!-- SAU configuration -->
1912 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1913 </files>
1914 </component>
1915 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1916 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1917 <files>
1918 <!-- include folder / device header file -->
1919 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1920 <!-- startup / system file -->
1921 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1922 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1923 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
1924 <!-- SAU configuration -->
1925 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1926 </files>
1927 </component>
1928
1929 <!-- Cortex-M33 -->
1930 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS">
1931 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1932 <files>
1933 <!-- include folder / device header file -->
1934 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1935 <!-- startup / system file -->
1936 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1937 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1938 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1939 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1940 <!-- SAU configuration -->
1941 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1942 </files>
1943 </component>
1944 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1945 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1946 <files>
1947 <!-- include folder / device header file -->
1948 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1949 <!-- startup / system file -->
1950 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1951 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1952 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
1953 <!-- SAU configuration -->
1954 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1955 </files>
1956 </component>
1957
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1958 <!-- Cortex-SC000 -->
1959 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1960 <description>System and Startup for Generic ARM SC000 device</description>
1961 <files>
1962 <!-- include folder / device header file -->
1963 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1964 <!-- startup / system file -->
1965 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1966 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1967 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1968 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1969 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1970 </files>
1971 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1972 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1973 <description>System and Startup for Generic ARM SC000 device</description>
1974 <files>
1975 <!-- include folder / device header file -->
1976 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1977 <!-- startup / system file -->
1978 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1979 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1980 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1981 </files>
1982 </component>
1983
1984 <!-- Cortex-SC300 -->
1985 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1986 <description>System and Startup for Generic ARM SC300 device</description>
1987 <files>
1988 <!-- include folder / device header file -->
1989 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1990 <!-- startup / system file -->
1991 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1992 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1993 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1994 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1995 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1996 </files>
1997 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1998 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1999 <description>System and Startup for Generic ARM SC300 device</description>
2000 <files>
2001 <!-- include folder / device header file -->
2002 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2003 <!-- startup / system file -->
2004 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2005 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2006 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2007 </files>
2008 </component>
2009
2010 <!-- ARMv8MBL -->
2011 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2012 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2013 <files>
2014 <!-- include folder / device header file -->
2015 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2016 <!-- startup / system file -->
2017 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2018 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2019 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2020 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2021 <!-- SAU configuration -->
2022 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2023 </files>
2024 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2025 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2026 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2027 <files>
2028 <!-- include folder / device header file -->
2029 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2030 <!-- startup / system file -->
2031 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2032 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2033 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2034 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2035 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2036 </files>
2037 </component>
2038
2039 <!-- ARMv8MML -->
2040 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2041 <description>System and Startup for Generic ARM ARMv8MML device</description>
2042 <files>
2043 <!-- include folder / device header file -->
2044 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2045 <!-- startup / system file -->
2046 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2047 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2048 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2049 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2050 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2051 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2052 </files>
2053 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2054 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2055 <description>System and Startup for Generic ARM ARMv8MML device</description>
2056 <files>
2057 <!-- include folder / device header file -->
2058 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2059 <!-- startup / system file -->
2060 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2061 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2062 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2063 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2064 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2065 </files>
2066 </component>
2067
2068
2069 <!-- CMSIS-DSP component -->
2070 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2071 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2072 <files>
2073 <!-- CPU independent -->
2074 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2075 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2076
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2077 <!-- CPU and Compiler dependent -->
2078 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2079 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2080 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2081 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2082 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2083 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2084 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2085 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2086 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2087 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2088 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2089 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2090 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2091 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2092 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2093<!--
2094 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2095 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2096 <file category="library" condition="CM33_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2097 <file category="library" condition="CM33_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2098 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2099 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2100 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2101 <file category="library" condition="ARMv8MML_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2102 <file category="library" condition="ARMv8MML_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2103 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2104-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2105 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2106 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2107 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2108 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2109 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2110 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2111 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2112 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2113<!--
2114 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2115 <file category="library" condition="CM33_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2116 <file category="library" condition="CM33_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2117 <file category="library" condition="CM33_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2118 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2119 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2120 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2121 <file category="library" condition="ARMv8MML_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2122 <file category="library" condition="ARMv8MML_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2123 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2124-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2125 </files>
2126 </component>
2127
2128 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2129 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2130 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2131 <RTE_Components_h>
2132 <!-- the following content goes into file 'RTE_Components.h' -->
2133 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2134 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2135 </RTE_Components_h>
2136 <files>
2137 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2138 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2139 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2140 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2141
2142 <!-- RTX templates -->
2143 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2144 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2145 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2146 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2147 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2148 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2149 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2150 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2151 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2152 <!-- tool-chain specific template file -->
2153 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2154 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2155 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2156
2157 <!-- CPU and Compiler dependent -->
2158 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2159 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2160 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2161 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2162 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2163 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2164 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2165 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2166 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2167 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2168 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2169 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2170 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2171 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2172 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2173 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2174 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2175 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2176 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2177 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2178 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2179 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2180 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2181 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2182 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2183 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2184 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2185 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2186 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2187 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2188 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2189 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2190 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2191 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2192 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2193 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2194 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2195 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2196 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2197 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2198 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2199 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2200 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2201 </files>
2202 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2203
2204 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2205 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.1" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2206 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2207 <RTE_Components_h>
2208 <!-- the following content goes into file 'RTE_Components.h' -->
2209 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2210 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2211 </RTE_Components_h>
2212 <files>
2213 <!-- RTX header file -->
2214 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2215 <!-- RTX compatibility module for API V1 -->
2216 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2217 </files>
2218 </component>
2219
2220 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2221 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2222 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2223 <RTE_Components_h>
2224 <!-- the following content goes into file 'RTE_Components.h' -->
2225 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2226 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2227 </RTE_Components_h>
2228 <files>
2229 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2230 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2231
2232 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]2233 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2234 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2235
2236 <!-- RTX configuration -->
2237 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2238
2239 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2240 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2241 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2242 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2243 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2244 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2245 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2246 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2247 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2248 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2249
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2250 <!-- RTX libraries (CPU and Compiler dependent) -->
2251 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2252 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2253 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2254 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2255 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2256 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2257 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2258 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2259 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2260 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2261 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2262 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2263 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2264 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2265 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2266 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2267 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2268 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2269 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2270 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2271 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2272 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2273 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2274 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2275 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2276 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2277 </files>
2278 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2279 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2280 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2281 <RTE_Components_h>
2282 <!-- the following content goes into file 'RTE_Components.h' -->
2283 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2284 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2285 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2286 </RTE_Components_h>
2287 <files>
2288 <!-- RTX documentation -->
2289 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2290
2291 <!-- RTX header files -->
2292 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2293 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2294
2295 <!-- RTX configuration -->
2296 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2297
2298 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2299 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2300 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2301 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2302 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2303 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2304 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2305 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2306 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2307 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2308
2309 <!-- RTX libraries (CPU and Compiler dependent) -->
2310 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2311 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2312 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2313 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2314 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2315 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2316 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2317 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2318 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2319 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2320 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2321 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2322 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2323 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2324 </files>
2325 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2326 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2327 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2328 <RTE_Components_h>
2329 <!-- the following content goes into file 'RTE_Components.h' -->
2330 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2331 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2332 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2333 </RTE_Components_h>
2334 <files>
2335 <!-- RTX documentation -->
2336 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2337
2338 <!-- RTX header files -->
2339 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2340 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2341
2342 <!-- RTX configuration -->
2343 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2344
2345 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2346 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2347 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2348 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2349 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2350 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2351 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2352 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2353 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2354 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2355
2356 <!-- RTX sources (core) -->
2357 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2358 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2359 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2360 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2361 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2362 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2363 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2364 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2365 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2366 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2367 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2368 <!-- RTX sources (handlers ARMCC) -->
2369 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2370 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2371 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2372 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2373 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2374 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2375 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2376 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2377 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2378 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2379 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2380 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2381 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2382 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2383 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2384 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2385 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2386 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2387 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2388 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2389 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2390 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2391 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2392 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2393 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2394 </files>
2395 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2396 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2397 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2398 <RTE_Components_h>
2399 <!-- the following content goes into file 'RTE_Components.h' -->
2400 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2401 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2402 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2403 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2404 </RTE_Components_h>
2405 <files>
2406 <!-- RTX documentation -->
2407 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2408
2409 <!-- RTX header files -->
2410 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2411 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2412
2413 <!-- RTX configuration -->
2414 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2415
2416 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2417 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2418 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2419 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2420 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2421 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2422 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2423 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2424 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2425 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2426
2427 <!-- RTX sources (core) -->
2428 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2429 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2430 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2431 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2432 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2433 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2434 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2435 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2436 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2437 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2438 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2439 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2440 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2441 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2442 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2443 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2444 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2445 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2446 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2447 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2448 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2449 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2450 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2451 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2452 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2453 </files>
2454 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2455
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2456 </components>
2457
2458 <boards>
2459 <board name="uVision Simulator" vendor="Keil">
2460 <description>uVision Simulator</description>
2461 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2462 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2463 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame^]2464 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2465 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame^]2466 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2467 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame^]2468 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2469 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2470 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2471 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2472 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2473 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2474 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2475 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2476 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2477 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2478 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2479 </boards>
2480
2481 <examples>
2482 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2483 <description>DSP_Lib Class Marks example</description>
2484 <board name="uVision Simulator" vendor="Keil"/>
2485 <project>
2486 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2487 </project>
2488 <attributes>
2489 <component Cclass="CMSIS" Cgroup="CORE"/>
2490 <component Cclass="CMSIS" Cgroup="DSP"/>
2491 <component Cclass="Device" Cgroup="Startup"/>
2492 <category>Getting Started</category>
2493 </attributes>
2494 </example>
2495
2496 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2497 <description>DSP_Lib Convolution example</description>
2498 <board name="uVision Simulator" vendor="Keil"/>
2499 <project>
2500 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2501 </project>
2502 <attributes>
2503 <component Cclass="CMSIS" Cgroup="CORE"/>
2504 <component Cclass="CMSIS" Cgroup="DSP"/>
2505 <component Cclass="Device" Cgroup="Startup"/>
2506 <category>Getting Started</category>
2507 </attributes>
2508 </example>
2509
2510 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2511 <description>DSP_Lib Dotproduct example</description>
2512 <board name="uVision Simulator" vendor="Keil"/>
2513 <project>
2514 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2515 </project>
2516 <attributes>
2517 <component Cclass="CMSIS" Cgroup="CORE"/>
2518 <component Cclass="CMSIS" Cgroup="DSP"/>
2519 <component Cclass="Device" Cgroup="Startup"/>
2520 <category>Getting Started</category>
2521 </attributes>
2522 </example>
2523
2524 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2525 <description>DSP_Lib FFT Bin example</description>
2526 <board name="uVision Simulator" vendor="Keil"/>
2527 <project>
2528 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2529 </project>
2530 <attributes>
2531 <component Cclass="CMSIS" Cgroup="CORE"/>
2532 <component Cclass="CMSIS" Cgroup="DSP"/>
2533 <component Cclass="Device" Cgroup="Startup"/>
2534 <category>Getting Started</category>
2535 </attributes>
2536 </example>
2537
2538 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2539 <description>DSP_Lib FIR example</description>
2540 <board name="uVision Simulator" vendor="Keil"/>
2541 <project>
2542 <environment name="uv" load="arm_fir_example.uvprojx"/>
2543 </project>
2544 <attributes>
2545 <component Cclass="CMSIS" Cgroup="CORE"/>
2546 <component Cclass="CMSIS" Cgroup="DSP"/>
2547 <component Cclass="Device" Cgroup="Startup"/>
2548 <category>Getting Started</category>
2549 </attributes>
2550 </example>
2551
2552 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2553 <description>DSP_Lib Graphic Equalizer example</description>
2554 <board name="uVision Simulator" vendor="Keil"/>
2555 <project>
2556 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2557 </project>
2558 <attributes>
2559 <component Cclass="CMSIS" Cgroup="CORE"/>
2560 <component Cclass="CMSIS" Cgroup="DSP"/>
2561 <component Cclass="Device" Cgroup="Startup"/>
2562 <category>Getting Started</category>
2563 </attributes>
2564 </example>
2565
2566 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2567 <description>DSP_Lib Linear Interpolation example</description>
2568 <board name="uVision Simulator" vendor="Keil"/>
2569 <project>
2570 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2571 </project>
2572 <attributes>
2573 <component Cclass="CMSIS" Cgroup="CORE"/>
2574 <component Cclass="CMSIS" Cgroup="DSP"/>
2575 <component Cclass="Device" Cgroup="Startup"/>
2576 <category>Getting Started</category>
2577 </attributes>
2578 </example>
2579
2580 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2581 <description>DSP_Lib Matrix example</description>
2582 <board name="uVision Simulator" vendor="Keil"/>
2583 <project>
2584 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2585 </project>
2586 <attributes>
2587 <component Cclass="CMSIS" Cgroup="CORE"/>
2588 <component Cclass="CMSIS" Cgroup="DSP"/>
2589 <component Cclass="Device" Cgroup="Startup"/>
2590 <category>Getting Started</category>
2591 </attributes>
2592 </example>
2593
2594 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2595 <description>DSP_Lib Signal Convergence example</description>
2596 <board name="uVision Simulator" vendor="Keil"/>
2597 <project>
2598 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2599 </project>
2600 <attributes>
2601 <component Cclass="CMSIS" Cgroup="CORE"/>
2602 <component Cclass="CMSIS" Cgroup="DSP"/>
2603 <component Cclass="Device" Cgroup="Startup"/>
2604 <category>Getting Started</category>
2605 </attributes>
2606 </example>
2607
2608 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2609 <description>DSP_Lib Sinus/Cosinus example</description>
2610 <board name="uVision Simulator" vendor="Keil"/>
2611 <project>
2612 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2613 </project>
2614 <attributes>
2615 <component Cclass="CMSIS" Cgroup="CORE"/>
2616 <component Cclass="CMSIS" Cgroup="DSP"/>
2617 <component Cclass="Device" Cgroup="Startup"/>
2618 <category>Getting Started</category>
2619 </attributes>
2620 </example>
2621
2622 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2623 <description>DSP_Lib Variance example</description>
2624 <board name="uVision Simulator" vendor="Keil"/>
2625 <project>
2626 <environment name="uv" load="arm_variance_example.uvprojx"/>
2627 </project>
2628 <attributes>
2629 <component Cclass="CMSIS" Cgroup="CORE"/>
2630 <component Cclass="CMSIS" Cgroup="DSP"/>
2631 <component Cclass="Device" Cgroup="Startup"/>
2632 <category>Getting Started</category>
2633 </attributes>
2634 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2635
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2636 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2637 <description>CMSIS-RTOS2 Blinky example</description>
2638 <board name="uVision Simulator" vendor="Keil"/>
2639 <project>
2640 <environment name="uv" load="Blinky.uvprojx"/>
2641 </project>
2642 <attributes>
2643 <component Cclass="CMSIS" Cgroup="CORE"/>
2644 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2645 <component Cclass="Device" Cgroup="Startup"/>
2646 <category>Getting Started</category>
2647 </attributes>
2648 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2649
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2650 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2651 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2652 <board name="uVision Simulator" vendor="Keil"/>
2653 <project>
2654 <environment name="uv" load="Blinky.uvprojx"/>
2655 </project>
2656 <attributes>
2657 <component Cclass="CMSIS" Cgroup="CORE"/>
2658 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2659 <component Cclass="Device" Cgroup="Startup"/>
2660 <category>Getting Started</category>
2661 </attributes>
2662 </example>
2663
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2664 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2665 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2666 <board name="uVision Simulator" vendor="Keil"/>
2667 <project>
2668 <environment name="uv" load="NoRTOS.uvmpw"/>
2669 </project>
2670 <attributes>
2671 <component Cclass="CMSIS" Cgroup="CORE"/>
2672 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2673 <component Cclass="Device" Cgroup="Startup"/>
2674 <category>Getting Started</category>
2675 </attributes>
2676 </example>
2677
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2678 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2679 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2680 <board name="uVision Simulator" vendor="Keil"/>
2681 <project>
2682 <environment name="uv" load="RTOS.uvmpw"/>
2683 </project>
2684 <attributes>
2685 <component Cclass="CMSIS" Cgroup="CORE"/>
2686 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2687 <component Cclass="Device" Cgroup="Startup"/>
2688 <category>Getting Started</category>
2689 </attributes>
2690 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2691
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]2692 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2693 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2694 <board name="uVision Simulator" vendor="Keil"/>
2695 <project>
2696 <environment name="uv" load="RTOS_Faults.uvmpw"/>
2697 </project>
2698 <attributes>
2699 <component Cclass="CMSIS" Cgroup="CORE"/>
2700 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2701 <component Cclass="Device" Cgroup="Startup"/>
2702 <category>Getting Started</category>
2703 </attributes>
2704 </example>
2705
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2706 </examples>
2707
2708</package>