TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 2d0f0e892b5eb6c3d6e2e3823c1e540d3bda34e3 / . / ARM.CMSIS.pdsc
blob: 749308c14cba734db8d843a7ffc0eea26b3a0204 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
11 <release version="5.0.0-Beta4">
12 Updated ARMv8MML device files.
13 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
14 Updated CMSIS core files.
15 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
16 </release>
17 <release version="5.0.0-Beta3">
18 Updated CMSIS ARMv8M core / device files
19 - increased SAU regions to 8.
20 - moved TZ_SAU_Setup() to partition_#device#.h.
21 </release>
22 <release version="5.0.0-Beta2">
23 - renamed core_*.h to lower case.
24 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
25 - updated ARMv8M?L.svd.
26 </release>
27 <release version="5.0.0-Beta1">
28 - added function SCB_GetFPUType() to all CMSIS cores.
29 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
30 - updated CMSIS core files to V5.0
31 - updated CMSIS Core change log.
32 - updated CMSIS DSP_Lib change log.
33 - updated CMSIS DSP_Lib libraries.
34 </release>
35 <release version="5.0.0-Beta" date="2015-12-15">
36 Added ARMv8M support to CMSIS-Core.
37 - CMSIS-Core 5.0.0 Beta (see revision history for details)
38 - CMSIS-RTOS
39 -- API 1.02 (unchanged)
40 -- RTX 4.81.0 (see revision history for details)
41 - CMSIS-SVD 1.3.2 (see revision history for details)
42 </release>
43 <release version="4.5.0" date="2015-10-28">
44 - CMSIS-Core 4.30.0 (see revision history for details)
45 - CMSIS-DAP 1.1.0 (unchanged)
46 - CMSIS-Driver 2.04.0 (see revision history for details)
47 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
48 - CMSIS-PACK 1.4.1 (see revision history for details)
49 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
50 - CMSIS-SVD 1.3.1 (see revision history for details)
51 </release>
52 <release version="4.4.0" date="2015-09-11">
53 - CMSIS-Core 4.20 (see revision history for details)
54 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
55 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
56 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
57 - CMSIS-RTOS
58 -- API 1.02 (unchanged)
59 -- RTX 4.79 (see revision history for details)
60 - CMSIS-SVD 1.3.0 (see revision history for details)
61 - CMSIS-DAP 1.1.0 (extended with SWO support)
62 </release>
63 <release version="4.3.0" date="2015-03-20">
64 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
65 - CMSIS-DSP 1.4.5 (see revision history for details)
66 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
67 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
68 - CMSIS-RTOS
69 -- API 1.02 (unchanged)
70 -- RTX 4.78 (see revision history for details)
71 - CMSIS-SVD 1.2 (unchanged)
72 </release>
73 <release version="4.2.0" date="2014-09-24">
74 Adding Cortex-M7 support
75 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
76 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
77 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
78 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
79 - CMSIS-RTOS RTX 4.75 (see revision history for details)
80 </release>
81 <release version="4.1.1" date="2014-06-30">
82 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
83 </release>
84 <release version="4.1.0" date="2014-06-12">
85 - CMSIS-Driver 2.02 (incompatible update)
86 - CMSIS-Pack 1.3 (see revision history for details)
87 - CMSIS-DSP 1.4.2 (unchanged)
88 - CMSIS-Core 3.30 (unchanged)
89 - CMSIS-RTOS RTX 4.74 (unchanged)
90 - CMSIS-RTOS API 1.02 (unchanged)
91 - CMSIS-SVD 1.10 (unchanged)
92 PACK:
93 - removed G++ specific files from PACK
94 - added Component Startup variant "C Startup"
95 - added Pack Checking Utility
96 - updated conditions to reflect tool-chain dependency
97 - added Taxonomy for Graphics
98 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
99 </release>
100 <release version="4.0.0">
101 - CMSIS-Driver 2.00 Preliminary (incompatible update)
102 - CMSIS-Pack 1.1 Preliminary
103 - CMSIS-DSP 1.4.2 (see revision history for details)
104 - CMSIS-Core 3.30 (see revision history for details)
105 - CMSIS-RTOS RTX 4.74 (see revision history for details)
106 - CMSIS-RTOS API 1.02 (unchanged)
107 - CMSIS-SVD 1.10 (unchanged)
108 </release>
109 <release version="3.20.4">
110 - CMSIS-RTOS 4.74 (see revision history for details)
111 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
112 </release>
113 <release version="3.20.3">
114 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
115 - CMSIS-RTOS 4.73 (see revision history for details)
116 </release>
117 <release version="3.20.2">
118 - CMSIS-Pack documentation has been added
119 - CMSIS-Drivers header and documentation have been added to PACK
120 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
121 </release>
122 <release version="3.20.1">
123 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
124 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
125 </release>
126 <release version="3.20.0">
127 The software portions that are deployed in the application program are now under a BSD license which allows usage
128 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
129 The individual components have been update as listed below:
130 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
131 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
132 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
133 - CMSIS-SVD is unchanged.
134 </release>
135 </releases>
136
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]137 <taxonomy>
138 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
139 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
140 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
141 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
142 <description Cclass="File System">File Drive Support and File System</description>
143 <description Cclass="Graphics">Graphical User Interface</description>
144 <description Cclass="Network">Network Stack using Internet Protocols</description>
145 <description Cclass="USB">Universal Serial Bus Stack</description>
146 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
147 </taxonomy>
148
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]149 <devices>
150 <!-- ****************************** Cortex-M0 ****************************** -->
151 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]152 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]153 <description>
154The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
155- simple, easy-to-use programmers model
156- highly efficient ultra-low power operation
157- excellent code density
158- deterministic, high-performance interrupt handling
159- upward compatibility with the rest of the Cortex-M processor family.
160 </description>
161 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
162 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
163 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
164 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
165
166 <device Dname="ARMCM0">
167 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
168 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
169 </device>
170 </family>
171
172 <!-- ****************************** Cortex-M0P ****************************** -->
173 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]174 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]175 <description>
176The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
177- simple, easy-to-use programmers model
178- highly efficient ultra-low power operation
179- excellent code density
180- deterministic, high-performance interrupt handling
181- upward compatibility with the rest of the Cortex-M processor family.
182 </description>
183 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
184 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
185 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
186 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
187
188 <device Dname="ARMCM0P">
189 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
190 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
191 </device>
192 </family>
193
194 <!-- ****************************** Cortex-M3 ****************************** -->
195 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]196 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]197 <description>
198The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
199- simple, easy-to-use programmers model
200- highly efficient ultra-low power operation
201- excellent code density
202- deterministic, high-performance interrupt handling
203- upward compatibility with the rest of the Cortex-M processor family.
204 </description>
205 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
206 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
207 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
208 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
209
210 <device Dname="ARMCM3">
211 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
212 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
213 </device>
214 </family>
215
216 <!-- ****************************** Cortex-M4 ****************************** -->
217 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]218 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]219 <description>
220The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
221- simple, easy-to-use programmers model
222- highly efficient ultra-low power operation
223- excellent code density
224- deterministic, high-performance interrupt handling
225- upward compatibility with the rest of the Cortex-M processor family.
226 </description>
227 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
228 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
229 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
230 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
231
232 <device Dname="ARMCM4">
233 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
234 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
235 </device>
236
237 <device Dname="ARMCM4_FP">
238 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
239 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
240 </device>
241 </family>
242
243 <!-- ****************************** Cortex-M7 ****************************** -->
244 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame^]245 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]246 <description>
247The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
248- simple, easy-to-use programmers model
249- highly efficient ultra-low power operation
250- excellent code density
251- deterministic, high-performance interrupt handling
252- upward compatibility with the rest of the Cortex-M processor family.
253 </description>
254 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
255 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
256 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
257 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
258
259 <device Dname="ARMCM7">
260 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
261 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
262 </device>
263
264 <device Dname="ARMCM7_SP">
265 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
266 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
267 </device>
268
269 <device Dname="ARMCM7_DP">
270 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
271 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
272 </device>
273 </family>
274
275 <!-- ****************************** ARMSC000 ****************************** -->
276 <family Dfamily="ARM SC000" Dvendor="ARM:82">
277 <description>
278The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
279- simple, easy-to-use programmers model
280- highly efficient ultra-low power operation
281- excellent code density
282- deterministic, high-performance interrupt handling
283 </description>
284 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
285 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
286 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
287 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
288
289 <device Dname="ARMSC000">
290 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
291 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
292 </device>
293 </family>
294
295 <!-- ****************************** ARMSC300 ****************************** -->
296 <family Dfamily="ARM SC300" Dvendor="ARM:82">
297 <description>
298The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
299- simple, easy-to-use programmers model
300- highly efficient ultra-low power operation
301- excellent code density
302- deterministic, high-performance interrupt handling
303 </description>
304 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
305 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
306 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
307 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
308
309 <device Dname="ARMSC300">
310 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
311 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
312 </device>
313 </family>
314
315 <!-- ****************************** ARMv8-M Baseline ********************** -->
316 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
317 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
318 <description>
319The ARMv8MBL processor is brand new.
320 </description>
321 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
322 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
323 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
324 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
325
326 <device Dname="ARMv8MBL">
327 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
328 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
329 </device>
330 </family>
331
332 <!-- ****************************** ARMv8-M Mainline ****************************** -->
333 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
334 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
335 <description>
336The ARMv8MML processor is brand new.
337 </description>
338 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
339 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
340 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
341 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
342
343 <device Dname="ARMv8MML">
344 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
345 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
346 </device>
347
348 <device Dname="ARMv8MML_SP">
349 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
350 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
351 </device>
352
353 <device Dname="ARMv8MML_DP">
354 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
355 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
356 </device>
357 </family>
358
359 </devices>
360
361
362 <apis>
363 <!-- CMSIS-RTOS API -->
364 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
365 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
366 <files>
367 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
368 </files>
369 </api>
370 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
371 <description>USART Driver API for Cortex-M</description>
372 <files>
373 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
374 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
375 </files>
376 </api>
377 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
378 <description>SPI Driver API for Cortex-M</description>
379 <files>
380 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
381 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
382 </files>
383 </api>
384 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
385 <description>SAI Driver API for Cortex-M</description>
386 <files>
387 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
388 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
389 </files>
390 </api>
391 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
392 <description>I2C Driver API for Cortex-M</description>
393 <files>
394 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
395 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
396 </files>
397 </api>
398 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
399 <description>CAN Driver API for Cortex-M</description>
400 <files>
401 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
402 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
403 </files>
404 </api>
405 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
406 <description>Flash Driver API for Cortex-M</description>
407 <files>
408 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
409 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
410 </files>
411 </api>
412 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
413 <description>MCI Driver API for Cortex-M</description>
414 <files>
415 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
416 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
417 </files>
418 </api>
419 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
420 <description>NAND Flash Driver API for Cortex-M</description>
421 <files>
422 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
423 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
424 </files>
425 </api>
426 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
427 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
428 <files>
429 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
430 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
431 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
432 </files>
433 </api>
434 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
435 <description>Ethernet MAC Driver API for Cortex-M</description>
436 <files>
437 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
438 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
439 </files>
440 </api>
441 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
442 <description>Ethernet PHY Driver API for Cortex-M</description>
443 <files>
444 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
445 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
446 </files>
447 </api>
448 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
449 <description>USB Device Driver API for Cortex-M</description>
450 <files>
451 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
452 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
453 </files>
454 </api>
455 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
456 <description>USB Host Driver API for Cortex-M</description>
457 <files>
458 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
459 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
460 </files>
461 </api>
462 </apis>
463
464 <!-- conditions are dependency rules that can apply to a component or an individual file -->
465 <conditions>
466 <condition id="ARMCC">
467 <require Tcompiler="ARMCC"/>
468 </condition>
469
470 <condition id="GCC">
471 <require Tcompiler="GCC"/>
472 </condition>
473
474 <condition id="IAR">
475 <require Tcompiler="IAR"/>
476 </condition>
477
478 <condition id="ARMCC GCC">
479 <accept Tcompiler="ARMCC"/>
480 <accept Tcompiler="GCC"/>
481 </condition>
482
483 <condition id="Cortex-M Device">
484 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
485 <accept Dcore="Cortex-M0"/>
486 <accept Dcore="Cortex-M0+"/>
487 <accept Dcore="Cortex-M3"/>
488 <accept Dcore="Cortex-M4"/>
489 <accept Dcore="Cortex-M7"/>
490 <accept Dcore="SC000"/>
491 <accept Dcore="SC300"/>
492 </condition>
493
494 <condition id="Cortex-M ARMv8-M Device">
495 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
496 <accept Dcore="Cortex-M0"/>
497 <accept Dcore="Cortex-M0+"/>
498 <accept Dcore="Cortex-M3"/>
499 <accept Dcore="Cortex-M4"/>
500 <accept Dcore="Cortex-M7"/>
501 <accept Dcore="SC000"/>
502 <accept Dcore="SC300"/>
503 <accept Dcore="ARMV8MBL"/>
504 <accept Dcore="ARMV8MML"/>
505 </condition>
506
507 <condition id="Cortex-M Device CMSIS Core">
508 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
509 <require condition="Cortex-M Device"/>
510 <require Cclass="CMSIS" Cgroup="CORE"/>
511 </condition>
512
513 <condition id="Cortex-M Device Startup">
514 <description>Only show for Cortex-M based devices. Depends on Device Startup component.</description>
515 <require condition="Cortex-M Device"/>
516 <require Cclass="Device" Cgroup="Startup"/>
517 </condition>
518
519 <condition id="CMSIS Core">
520 <description>CMSIS CORE processor and device specific Startup files</description>
521 <require Cclass="CMSIS" Cgroup="CORE"/>
522 </condition>
523
524 <condition id="ARMCM0 CMSIS">
525 <!-- conditions selecting Devices -->
526 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
527 <require Dvendor="ARM:82" Dname="ARMCM0"/>
528 <require Cclass="CMSIS" Cgroup="CORE"/>
529 </condition>
530
531 <condition id="ARMCM0 CMSIS GCC">
532 <!-- conditions selecting Devices -->
533 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
534 <require condition="ARMCM0 CMSIS"/>
535 <require condition="GCC"/>
536 </condition>
537
538 <condition id="ARMCM0+ CMSIS">
539 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
540 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
541 <require Cclass="CMSIS" Cgroup="CORE"/>
542 </condition>
543
544 <condition id="ARMCM0+ CMSIS GCC">
545 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
546 <require condition="ARMCM0+ CMSIS"/>
547 <require condition="GCC"/>
548 </condition>
549
550 <condition id="ARMCM3 CMSIS">
551 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
552 <require Dvendor="ARM:82" Dname="ARMCM3"/>
553 <require Cclass="CMSIS" Cgroup="CORE"/>
554 </condition>
555
556 <condition id="ARMCM3 CMSIS GCC">
557 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
558 <require condition="ARMCM3 CMSIS"/>
559 <require condition="GCC"/>
560 </condition>
561
562 <condition id="ARMCM4 CMSIS">
563 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
564 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
565 <require Cclass="CMSIS" Cgroup="CORE"/>
566 </condition>
567
568 <condition id="ARMCM4 CMSIS GCC">
569 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
570 <require condition="ARMCM4 CMSIS"/>
571 <require condition="GCC"/>
572 </condition>
573
574 <condition id="ARMCM7 CMSIS">
575 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
576 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
577 <require Cclass="CMSIS" Cgroup="CORE"/>
578 </condition>
579
580 <condition id="ARMCM7 CMSIS GCC">
581 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
582 <require condition="ARMCM7 CMSIS"/>
583 <require condition="GCC"/>
584 </condition>
585
586 <condition id="ARMSC000 CMSIS">
587 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
588 <require Dvendor="ARM:82" Dname="ARMSC000"/>
589 <require Cclass="CMSIS" Cgroup="CORE"/>
590 </condition>
591
592 <condition id="ARMSC000 CMSIS GCC">
593 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
594 <require condition="ARMSC000 CMSIS"/>
595 <require condition="GCC"/>
596 </condition>
597
598 <condition id="ARMSC300 CMSIS">
599 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
600 <require Dvendor="ARM:82" Dname="ARMSC300"/>
601 <require Cclass="CMSIS" Cgroup="CORE"/>
602 </condition>
603
604 <condition id="ARMSC300 CMSIS GCC">
605 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
606 <require condition="ARMSC300 CMSIS"/>
607 <require condition="GCC"/>
608 </condition>
609
610 <condition id="ARMv8MBL CMSIS">
611 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
612 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
613 <require Cclass="CMSIS" Cgroup="CORE"/>
614 </condition>
615
616 <condition id="ARMv8MBL CMSIS GCC">
617 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
618 <require condition="ARMv8MBL CMSIS"/>
619 <require condition="GCC"/>
620 </condition>
621
622 <condition id="ARMv8MML CMSIS">
623 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
624 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
625 <require Cclass="CMSIS" Cgroup="CORE"/>
626 </condition>
627
628 <condition id="ARMv8MML CMSIS GCC">
629 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
630 <require condition="ARMv8MML CMSIS"/>
631 <require condition="GCC"/>
632 </condition>
633
634 <condition id="CMSIS DSP">
635 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
636 <require condition="Cortex-M Device CMSIS Core"/>
637 <accept Tcompiler="GCC"/>
638 <accept Tcompiler="ARMCC"/>
639 <accept Tcompiler="IAR"/>
640 </condition>
641
642 <!-- ARMCC compiler -->
643 <condition id="CM0_LE_ARMCC">
644 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
645 <accept Dcore="Cortex-M0"/>
646 <accept Dcore="Cortex-M0+"/>
647 <accept Dcore="SC000"/>
648 <require Dendian="Little-endian"/>
649 <require Tcompiler="ARMCC"/>
650 </condition>
651
652 <condition id="CM0_BE_ARMCC">
653 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
654 <accept Dcore="Cortex-M0"/>
655 <accept Dcore="Cortex-M0+"/>
656 <accept Dcore="SC000"/>
657 <require Dendian="Big-endian"/>
658 <require Tcompiler="ARMCC"/>
659 </condition>
660
661 <condition id="CM3_LE_ARMCC">
662 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
663 <accept Dcore="Cortex-M3"/>
664 <accept Dcore="SC300"/>
665 <require Dendian="Little-endian"/>
666 <require Tcompiler="ARMCC"/>
667 </condition>
668
669 <condition id="CM3_BE_ARMCC">
670 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
671 <accept Dcore="Cortex-M3"/>
672 <accept Dcore="SC300"/>
673 <require Dendian="Big-endian"/>
674 <require Tcompiler="ARMCC"/>
675 </condition>
676
677 <condition id="CM4_LE_ARMCC">
678 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
679 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
680 <require Tcompiler="ARMCC"/>
681 </condition>
682
683 <condition id="CM4_BE_ARMCC">
684 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
685 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
686 <require Tcompiler="ARMCC"/>
687 </condition>
688
689 <condition id="CM4F_LE_ARMCC">
690 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
691 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
692 <require Tcompiler="ARMCC"/>
693 </condition>
694
695 <condition id="CM4F_BE_ARMCC">
696 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
697 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
698 <require Tcompiler="ARMCC"/>
699 </condition>
700
701 <!-- XMC 4000 Series devices from Infineon require a special library -->
702 <condition id="CM4_LE_ARMCC_STD">
703 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
704 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
705 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
706 <require Tcompiler="ARMCC"/>
707 </condition>
708 <condition id="CM4_LE_ARMCC_IFX">
709 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
710 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
711 <require Tcompiler="ARMCC"/>
712 </condition>
713 <condition id="CM4F_LE_ARMCC_STD">
714 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
715 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
716 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
717 <require Tcompiler="ARMCC"/>
718 </condition>
719 <condition id="CM4F_LE_ARMCC_IFX">
720 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
721 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
722 <require Tcompiler="ARMCC"/>
723 </condition>
724
725 <condition id="CM7_LE_ARMCC">
726 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
727 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
728 <require Tcompiler="ARMCC"/>
729 </condition>
730
731 <condition id="CM7_BE_ARMCC">
732 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
733 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
734 <require Tcompiler="ARMCC"/>
735 </condition>
736
737 <condition id="CM7F_LE_ARMCC">
738 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
739 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
740 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
741 <require Tcompiler="ARMCC"/>
742 </condition>
743
744 <condition id="CM7F_BE_ARMCC">
745 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
746 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
747 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750
751 <condition id="CM7FSP_LE_ARMCC">
752 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
753 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
754 <require Tcompiler="ARMCC"/>
755 </condition>
756
757 <condition id="CM7FSP_BE_ARMCC">
758 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
759 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
760 <require Tcompiler="ARMCC"/>
761 </condition>
762
763 <condition id="CM7FDP_LE_ARMCC">
764 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
765 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
766 <require Tcompiler="ARMCC"/>
767 </condition>
768
769 <condition id="CM7FDP_BE_ARMCC">
770 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
771 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
772 <require Tcompiler="ARMCC"/>
773 </condition>
774
775 <!-- GCC compiler -->
776 <condition id="CM0_LE_GCC">
777 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
778 <accept Dcore="Cortex-M0"/>
779 <accept Dcore="Cortex-M0+"/>
780 <accept Dcore="SC000"/>
781 <require Dendian="Little-endian"/>
782 <require Tcompiler="GCC"/>
783 </condition>
784
785 <condition id="CM0_BE_GCC">
786 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
787 <accept Dcore="Cortex-M0"/>
788 <accept Dcore="Cortex-M0+"/>
789 <accept Dcore="SC000"/>
790 <require Dendian="Big-endian"/>
791 <require Tcompiler="GCC"/>
792 </condition>
793
794 <condition id="CM3_LE_GCC">
795 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
796 <accept Dcore="Cortex-M3"/>
797 <accept Dcore="SC300"/>
798 <require Dendian="Little-endian"/>
799 <require Tcompiler="GCC"/>
800 </condition>
801
802 <condition id="CM3_BE_GCC">
803 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
804 <accept Dcore="Cortex-M3"/>
805 <accept Dcore="SC300"/>
806 <require Dendian="Big-endian"/>
807 <require Tcompiler="GCC"/>
808 </condition>
809
810 <condition id="CM4_LE_GCC">
811 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
812 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
813 <require Tcompiler="GCC"/>
814 </condition>
815
816 <condition id="CM4_BE_GCC">
817 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
818 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
819 <require Tcompiler="GCC"/>
820 </condition>
821
822 <condition id="CM4F_LE_GCC">
823 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
824 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
825 <require Tcompiler="GCC"/>
826 </condition>
827
828 <condition id="CM4F_BE_GCC">
829 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
830 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
831 <require Tcompiler="GCC"/>
832 </condition>
833
834 <!-- XMC 4000 Series devices from Infineon require a special library -->
835 <condition id="CM4_LE_GCC_STD">
836 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
837 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
838 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
839 <require Tcompiler="GCC"/>
840 </condition>
841 <condition id="CM4_LE_GCC_IFX">
842 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
843 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
844 <require Tcompiler="GCC"/>
845 </condition>
846 <condition id="CM4F_LE_GCC_STD">
847 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
848 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
849 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
850 <require Tcompiler="GCC"/>
851 </condition>
852 <condition id="CM4F_LE_GCC_IFX">
853 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
854 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
855 <require Tcompiler="GCC"/>
856 </condition>
857
858 <condition id="CM7_LE_GCC">
859 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
860 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
861 <require Tcompiler="GCC"/>
862 </condition>
863
864 <condition id="CM7_BE_GCC">
865 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
866 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
867 <require Tcompiler="GCC"/>
868 </condition>
869
870 <condition id="CM7F_LE_GCC">
871 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
872 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
873 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
874 <require Tcompiler="GCC"/>
875 </condition>
876
877 <condition id="CM7F_BE_GCC">
878 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
879 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
880 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
881 <require Tcompiler="GCC"/>
882 </condition>
883
884 <condition id="CM7FSP_LE_GCC">
885 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
886 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
887 <require Tcompiler="GCC"/>
888 </condition>
889
890 <condition id="CM7FSP_BE_GCC">
891 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
892 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
893 <require Tcompiler="GCC"/>
894 </condition>
895
896 <condition id="CM7FDP_LE_GCC">
897 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
898 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
899 <require Tcompiler="GCC"/>
900 </condition>
901
902 <condition id="CM7FDP_BE_GCC">
903 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
904 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
905 <require Tcompiler="GCC"/>
906 </condition>
907
908 <!-- IAR compiler -->
909 <condition id="CM0_LE_IAR">
910 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
911 <accept Dcore="Cortex-M0"/>
912 <accept Dcore="Cortex-M0+"/>
913 <accept Dcore="SC000"/>
914 <require Dendian="Little-endian"/>
915 <require Tcompiler="IAR"/>
916 </condition>
917
918 <condition id="CM0_BE_IAR">
919 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
920 <accept Dcore="Cortex-M0"/>
921 <accept Dcore="Cortex-M0+"/>
922 <accept Dcore="SC000"/>
923 <require Dendian="Big-endian"/>
924 <require Tcompiler="IAR"/>
925 </condition>
926
927 <condition id="CM3_LE_IAR">
928 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
929 <accept Dcore="Cortex-M3"/>
930 <accept Dcore="SC300"/>
931 <require Dendian="Little-endian"/>
932 <require Tcompiler="IAR"/>
933 </condition>
934
935 <condition id="CM3_BE_IAR">
936 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
937 <accept Dcore="Cortex-M3"/>
938 <accept Dcore="SC300"/>
939 <require Dendian="Big-endian"/>
940 <require Tcompiler="IAR"/>
941 </condition>
942
943 <condition id="CM4_LE_IAR">
944 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
945 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
946 <require Tcompiler="IAR"/>
947 </condition>
948
949 <condition id="CM4_BE_IAR">
950 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
951 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
952 <require Tcompiler="IAR"/>
953 </condition>
954
955 <condition id="CM4F_LE_IAR">
956 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
957 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
958 <require Tcompiler="IAR"/>
959 </condition>
960
961 <condition id="CM4F_BE_IAR">
962 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
963 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
964 <require Tcompiler="IAR"/>
965 </condition>
966
967 <condition id="CM7_LE_IAR">
968 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
969 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
970 <require Tcompiler="IAR"/>
971 </condition>
972
973 <condition id="CM7_BE_IAR">
974 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
975 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
976 <require Tcompiler="IAR"/>
977 </condition>
978
979 <condition id="CM7F_LE_IAR">
980 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
981 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
982 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
983 <require Tcompiler="IAR"/>
984 </condition>
985
986 <condition id="CM7F_BE_IAR">
987 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
988 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
989 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
990 <require Tcompiler="IAR"/>
991 </condition>
992
993 <condition id="CM7FSP_LE_IAR">
994 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
995 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
996 <require Tcompiler="IAR"/>
997 </condition>
998
999 <condition id="CM7FSP_BE_IAR">
1000 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1001 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1002 <require Tcompiler="IAR"/>
1003 </condition>
1004
1005 <condition id="CM7FDP_LE_IAR">
1006 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1007 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1008 <require Tcompiler="IAR"/>
1009 </condition>
1010
1011 <condition id="CM7FDP_BE_IAR">
1012 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1013 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1014 <require Tcompiler="IAR"/>
1015 </condition>
1016 </conditions>
1017
1018 <components>
1019 <!-- CMSIS-Core component -->
1020 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1021 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1022 <files>
1023 <!-- CPU independent -->
1024 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1025 <file category="include" name="CMSIS/Include/"/>
1026 </files>
1027 </component>
1028
1029 <!-- CMSIS-Startup components -->
1030 <!-- Cortex-M0 -->
1031 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1032 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1033 <files>
1034 <!-- include folder / device header file -->
1035 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1036 <!-- startup / system file -->
1037 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1038 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1039 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1040 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1041 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1042 </files>
1043 </component>
1044 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1045 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1046 <files>
1047 <!-- include folder / device header file -->
1048 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1049 <!-- startup / system file -->
1050 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1051 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1052 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1053 </files>
1054 </component>
1055
1056 <!-- Cortex-M0+ -->
1057 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1058 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1059 <files>
1060 <!-- include folder / device header file -->
1061 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1062 <!-- startup / system file -->
1063 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1064 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1065 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1066 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1067 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1068 </files>
1069 </component>
1070 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1071 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1072 <files>
1073 <!-- include folder / device header file -->
1074 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1075 <!-- startup / system file -->
1076 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1077 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1078 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1079 </files>
1080 </component>
1081
1082 <!-- Cortex-M3 -->
1083 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1084 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1085 <files>
1086 <!-- include folder / device header file -->
1087 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1088 <!-- startup / system file -->
1089 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1090 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1091 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1092 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1093 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1094 </files>
1095 </component>
1096 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1097 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1098 <files>
1099 <!-- include folder / device header file -->
1100 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1101 <!-- startup / system file -->
1102 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1103 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1104 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1105 </files>
1106 </component>
1107
1108 <!-- Cortex-M4 -->
1109 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1110 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1111 <files>
1112 <!-- include folder / device header file -->
1113 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1114 <!-- startup / system file -->
1115 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1116 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1117 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1118 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1119 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1120 </files>
1121 </component>
1122 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1123 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1124 <files>
1125 <!-- include folder / device header file -->
1126 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1127 <!-- startup / system file -->
1128 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1129 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1130 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1131 </files>
1132 </component>
1133
1134 <!-- Cortex-M7 -->
1135 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1136 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1137 <files>
1138 <!-- include folder / device header file -->
1139 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1140 <!-- startup / system file -->
1141 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1142 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1143 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1144 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1145 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1146 </files>
1147 </component>
1148 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1149 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1150 <files>
1151 <!-- include folder / device header file -->
1152 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1153 <!-- startup / system file -->
1154 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1155 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1156 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1157 </files>
1158 </component>
1159
1160 <!-- Cortex-SC000 -->
1161 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1162 <description>System and Startup for Generic ARM SC000 device</description>
1163 <files>
1164 <!-- include folder / device header file -->
1165 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1166 <!-- startup / system file -->
1167 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1168 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1169 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1170 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1171 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1172 </files>
1173 </component>
1174 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1175 <description>System and Startup for Generic ARM SC000 device</description>
1176 <files>
1177 <!-- include folder / device header file -->
1178 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1179 <!-- startup / system file -->
1180 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1181 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1182 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1183 </files>
1184 </component>
1185
1186 <!-- Cortex-SC300 -->
1187 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1188 <description>System and Startup for Generic ARM SC300 device</description>
1189 <files>
1190 <!-- include folder / device header file -->
1191 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1192 <!-- startup / system file -->
1193 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1194 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1195 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1196 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1197 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1198 </files>
1199 </component>
1200 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1201 <description>System and Startup for Generic ARM SC300 device</description>
1202 <files>
1203 <!-- include folder / device header file -->
1204 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1205 <!-- startup / system file -->
1206 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1207 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1208 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1209 </files>
1210 </component>
1211
1212 <!-- ARMv8MBL -->
1213 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1214 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1215 <files>
1216 <!-- include folder / device header file -->
1217 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1218 <!-- startup / system file -->
1219 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1220 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1221 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1222 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1223 <!-- SAU configuration -->
1224 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1225 </files>
1226 </component>
1227 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1228 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1229 <files>
1230 <!-- include folder / device header file -->
1231 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1232 <!-- startup / system file -->
1233 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1234 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1235 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1236 </files>
1237 </component>
1238
1239 <!-- ARMv8MML -->
1240 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1241 <description>System and Startup for Generic ARM ARMv8MML device</description>
1242 <files>
1243 <!-- include folder / device header file -->
1244 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1245 <!-- startup / system file -->
1246 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1247 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1248 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1249 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1250 <!-- SAU configuration -->
1251 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1252 </files>
1253 </component>
1254 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1255 <description>System and Startup for Generic ARM ARMv8MML device</description>
1256 <files>
1257 <!-- include folder / device header file -->
1258 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1259 <!-- startup / system file -->
1260 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1261 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1262 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1263 </files>
1264 </component>
1265
1266
1267 <!-- CMSIS-DSP component -->
1268 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1269 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1270 <files>
1271 <!-- CPU independent -->
1272 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1273 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1274 <file category="header" name="CMSIS/Include/arm_math.h"/>
1275 <!-- CPU and Compiler dependent -->
1276 <!-- ARMCC -->
1277 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1278 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1279 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1280 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1281 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1282 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1283 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1284 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1285 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1286 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1287 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1288 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1289 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1290 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1291 <!-- GCC -->
1292 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1293 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1294 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1295 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1296 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1297 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1298 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1299 </files>
1300 </component>
1301
1302 <!-- CMSIS-RTOS Keil RTX component -->
1303 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="Cortex-M Device Startup">
1304 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1305 <RTE_Components_h>
1306 <!-- the following content goes into file 'RTE_Components.h' -->
1307 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1308 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1309 </RTE_Components_h>
1310 <files>
1311 <!-- CPU independent -->
1312 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1313 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1314 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1315
1316 <!-- RTX templates -->
1317 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1318 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1319 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1320 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1321 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1322 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1323 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1324 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1325 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1326 <!-- tool-chain specific template file -->
1327 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1328 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1329 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1330
1331 <!-- CPU and Compiler dependent -->
1332 <!-- ARMCC -->
1333 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1334 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1335 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1336 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1337 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1338 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1339 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1340 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1341 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1342 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1343 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1344 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1345 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1346 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1347 <!-- GCC -->
1348 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1349 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1350 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1351 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1352 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1353 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1354 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1355 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1356 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1357 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1358 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1359 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1360 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1361 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1362 <!-- IAR -->
1363 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1364 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1365 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1366 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1367 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1368 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1369 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1370 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1371 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1372 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1373 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1374 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1375 </files>
1376 </component>
1377 </components>
1378
1379 <boards>
1380 <board name="uVision Simulator" vendor="Keil">
1381 <description>uVision Simulator</description>
1382 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1383 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1384 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1385 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1386 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1387 </board>
1388 </boards>
1389
1390 <examples>
1391 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1392 <description>DSP_Lib Class Marks example</description>
1393 <board name="uVision Simulator" vendor="Keil"/>
1394 <project>
1395 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1396 </project>
1397 <attributes>
1398 <component Cclass="CMSIS" Cgroup="CORE"/>
1399 <component Cclass="CMSIS" Cgroup="DSP"/>
1400 <component Cclass="Device" Cgroup="Startup"/>
1401 <category>Getting Started</category>
1402 </attributes>
1403 </example>
1404
1405 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1406 <description>DSP_Lib Convolution example</description>
1407 <board name="uVision Simulator" vendor="Keil"/>
1408 <project>
1409 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1410 </project>
1411 <attributes>
1412 <component Cclass="CMSIS" Cgroup="CORE"/>
1413 <component Cclass="CMSIS" Cgroup="DSP"/>
1414 <component Cclass="Device" Cgroup="Startup"/>
1415 <category>Getting Started</category>
1416 </attributes>
1417 </example>
1418
1419 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1420 <description>DSP_Lib Dotproduct example</description>
1421 <board name="uVision Simulator" vendor="Keil"/>
1422 <project>
1423 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1424 </project>
1425 <attributes>
1426 <component Cclass="CMSIS" Cgroup="CORE"/>
1427 <component Cclass="CMSIS" Cgroup="DSP"/>
1428 <component Cclass="Device" Cgroup="Startup"/>
1429 <category>Getting Started</category>
1430 </attributes>
1431 </example>
1432
1433 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1434 <description>DSP_Lib FFT Bin example</description>
1435 <board name="uVision Simulator" vendor="Keil"/>
1436 <project>
1437 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1438 </project>
1439 <attributes>
1440 <component Cclass="CMSIS" Cgroup="CORE"/>
1441 <component Cclass="CMSIS" Cgroup="DSP"/>
1442 <component Cclass="Device" Cgroup="Startup"/>
1443 <category>Getting Started</category>
1444 </attributes>
1445 </example>
1446
1447 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1448 <description>DSP_Lib FIR example</description>
1449 <board name="uVision Simulator" vendor="Keil"/>
1450 <project>
1451 <environment name="uv" load="arm_fir_example.uvprojx"/>
1452 </project>
1453 <attributes>
1454 <component Cclass="CMSIS" Cgroup="CORE"/>
1455 <component Cclass="CMSIS" Cgroup="DSP"/>
1456 <component Cclass="Device" Cgroup="Startup"/>
1457 <category>Getting Started</category>
1458 </attributes>
1459 </example>
1460
1461 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1462 <description>DSP_Lib Graphic Equalizer example</description>
1463 <board name="uVision Simulator" vendor="Keil"/>
1464 <project>
1465 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1466 </project>
1467 <attributes>
1468 <component Cclass="CMSIS" Cgroup="CORE"/>
1469 <component Cclass="CMSIS" Cgroup="DSP"/>
1470 <component Cclass="Device" Cgroup="Startup"/>
1471 <category>Getting Started</category>
1472 </attributes>
1473 </example>
1474
1475 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1476 <description>DSP_Lib Linear Interpolation example</description>
1477 <board name="uVision Simulator" vendor="Keil"/>
1478 <project>
1479 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1480 </project>
1481 <attributes>
1482 <component Cclass="CMSIS" Cgroup="CORE"/>
1483 <component Cclass="CMSIS" Cgroup="DSP"/>
1484 <component Cclass="Device" Cgroup="Startup"/>
1485 <category>Getting Started</category>
1486 </attributes>
1487 </example>
1488
1489 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1490 <description>DSP_Lib Matrix example</description>
1491 <board name="uVision Simulator" vendor="Keil"/>
1492 <project>
1493 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1494 </project>
1495 <attributes>
1496 <component Cclass="CMSIS" Cgroup="CORE"/>
1497 <component Cclass="CMSIS" Cgroup="DSP"/>
1498 <component Cclass="Device" Cgroup="Startup"/>
1499 <category>Getting Started</category>
1500 </attributes>
1501 </example>
1502
1503 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1504 <description>DSP_Lib Signal Convergence example</description>
1505 <board name="uVision Simulator" vendor="Keil"/>
1506 <project>
1507 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1508 </project>
1509 <attributes>
1510 <component Cclass="CMSIS" Cgroup="CORE"/>
1511 <component Cclass="CMSIS" Cgroup="DSP"/>
1512 <component Cclass="Device" Cgroup="Startup"/>
1513 <category>Getting Started</category>
1514 </attributes>
1515 </example>
1516
1517 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1518 <description>DSP_Lib Sinus/Cosinus example</description>
1519 <board name="uVision Simulator" vendor="Keil"/>
1520 <project>
1521 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1522 </project>
1523 <attributes>
1524 <component Cclass="CMSIS" Cgroup="CORE"/>
1525 <component Cclass="CMSIS" Cgroup="DSP"/>
1526 <component Cclass="Device" Cgroup="Startup"/>
1527 <category>Getting Started</category>
1528 </attributes>
1529 </example>
1530
1531 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1532 <description>DSP_Lib Variance example</description>
1533 <board name="uVision Simulator" vendor="Keil"/>
1534 <project>
1535 <environment name="uv" load="arm_variance_example.uvprojx"/>
1536 </project>
1537 <attributes>
1538 <component Cclass="CMSIS" Cgroup="CORE"/>
1539 <component Cclass="CMSIS" Cgroup="DSP"/>
1540 <component Cclass="Device" Cgroup="Startup"/>
1541 <category>Getting Started</category>
1542 </attributes>
1543 </example>
1544 </examples>
1545
1546</package>