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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 1e9866fcb890baefbc54448b84525b3941aa96b2 / . / ARM.CMSIS.pdsc
blob: 74424b3a30d93d75315544860b462397a6dd2ad8 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]11 <release version="5.0.0-Beta10">
12 CMSIS-RTOS2:
13 - Added RTX5 component.
14 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]15 <release version="5.0.0-Beta9">
16 CMSIS_Core:
17 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
18 - Reworked SAU register and functions.
19 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]20 <release version="5.0.0-Beta8">
21 CMSIS-RTOS:
22 - API 2.0
23 - RTX 5.0.0-Alpha
24 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]25 <release version="5.0.0-Beta7">
26 CMSIS_Core:
27 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]28 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]29 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]30 <release version="5.0.0-Beta6">
31 CMSIS_Core:
32 - Added SCB_CFSR register bit definitions in core_*.h.
33 - Added NVIC_GetEnableIRQ function in core_*.h.
34 - Updated core instruction macros in cmsis_gcc.h.
35 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]36 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]37 CMSIS_DSP:
38 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
39 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]40 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]41 <release version="5.0.0-Beta4">
42 Updated ARMv8MML device files.
43 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
44 Updated CMSIS core files.
45 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
46 </release>
47 <release version="5.0.0-Beta3">
48 Updated CMSIS ARMv8M core / device files
49 - increased SAU regions to 8.
50 - moved TZ_SAU_Setup() to partition_#device#.h.
51 </release>
52 <release version="5.0.0-Beta2">
53 - renamed core_*.h to lower case.
54 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
55 - updated ARMv8M?L.svd.
56 </release>
57 <release version="5.0.0-Beta1">
58 - added function SCB_GetFPUType() to all CMSIS cores.
59 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
60 - updated CMSIS core files to V5.0
61 - updated CMSIS Core change log.
62 - updated CMSIS DSP_Lib change log.
63 - updated CMSIS DSP_Lib libraries.
64 </release>
65 <release version="5.0.0-Beta" date="2015-12-15">
66 Added ARMv8M support to CMSIS-Core.
67 - CMSIS-Core 5.0.0 Beta (see revision history for details)
68 - CMSIS-RTOS
69 -- API 1.02 (unchanged)
70 -- RTX 4.81.0 (see revision history for details)
71 - CMSIS-SVD 1.3.2 (see revision history for details)
72 </release>
73 <release version="4.5.0" date="2015-10-28">
74 - CMSIS-Core 4.30.0 (see revision history for details)
75 - CMSIS-DAP 1.1.0 (unchanged)
76 - CMSIS-Driver 2.04.0 (see revision history for details)
77 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
78 - CMSIS-PACK 1.4.1 (see revision history for details)
79 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
80 - CMSIS-SVD 1.3.1 (see revision history for details)
81 </release>
82 <release version="4.4.0" date="2015-09-11">
83 - CMSIS-Core 4.20 (see revision history for details)
84 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
85 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
86 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
87 - CMSIS-RTOS
88 -- API 1.02 (unchanged)
89 -- RTX 4.79 (see revision history for details)
90 - CMSIS-SVD 1.3.0 (see revision history for details)
91 - CMSIS-DAP 1.1.0 (extended with SWO support)
92 </release>
93 <release version="4.3.0" date="2015-03-20">
94 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
95 - CMSIS-DSP 1.4.5 (see revision history for details)
96 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
97 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
98 - CMSIS-RTOS
99 -- API 1.02 (unchanged)
100 -- RTX 4.78 (see revision history for details)
101 - CMSIS-SVD 1.2 (unchanged)
102 </release>
103 <release version="4.2.0" date="2014-09-24">
104 Adding Cortex-M7 support
105 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
106 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
107 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
108 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
109 - CMSIS-RTOS RTX 4.75 (see revision history for details)
110 </release>
111 <release version="4.1.1" date="2014-06-30">
112 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
113 </release>
114 <release version="4.1.0" date="2014-06-12">
115 - CMSIS-Driver 2.02 (incompatible update)
116 - CMSIS-Pack 1.3 (see revision history for details)
117 - CMSIS-DSP 1.4.2 (unchanged)
118 - CMSIS-Core 3.30 (unchanged)
119 - CMSIS-RTOS RTX 4.74 (unchanged)
120 - CMSIS-RTOS API 1.02 (unchanged)
121 - CMSIS-SVD 1.10 (unchanged)
122 PACK:
123 - removed G++ specific files from PACK
124 - added Component Startup variant "C Startup"
125 - added Pack Checking Utility
126 - updated conditions to reflect tool-chain dependency
127 - added Taxonomy for Graphics
128 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
129 </release>
130 <release version="4.0.0">
131 - CMSIS-Driver 2.00 Preliminary (incompatible update)
132 - CMSIS-Pack 1.1 Preliminary
133 - CMSIS-DSP 1.4.2 (see revision history for details)
134 - CMSIS-Core 3.30 (see revision history for details)
135 - CMSIS-RTOS RTX 4.74 (see revision history for details)
136 - CMSIS-RTOS API 1.02 (unchanged)
137 - CMSIS-SVD 1.10 (unchanged)
138 </release>
139 <release version="3.20.4">
140 - CMSIS-RTOS 4.74 (see revision history for details)
141 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
142 </release>
143 <release version="3.20.3">
144 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
145 - CMSIS-RTOS 4.73 (see revision history for details)
146 </release>
147 <release version="3.20.2">
148 - CMSIS-Pack documentation has been added
149 - CMSIS-Drivers header and documentation have been added to PACK
150 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
151 </release>
152 <release version="3.20.1">
153 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
154 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
155 </release>
156 <release version="3.20.0">
157 The software portions that are deployed in the application program are now under a BSD license which allows usage
158 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
159 The individual components have been update as listed below:
160 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
161 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
162 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
163 - CMSIS-SVD is unchanged.
164 </release>
165 </releases>
166
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]167 <taxonomy>
168 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
169 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
170 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
171 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
172 <description Cclass="File System">File Drive Support and File System</description>
173 <description Cclass="Graphics">Graphical User Interface</description>
174 <description Cclass="Network">Network Stack using Internet Protocols</description>
175 <description Cclass="USB">Universal Serial Bus Stack</description>
176 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
177 </taxonomy>
178
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]179 <devices>
180 <!-- ****************************** Cortex-M0 ****************************** -->
181 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]182 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]183 <description>
184The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
185- simple, easy-to-use programmers model
186- highly efficient ultra-low power operation
187- excellent code density
188- deterministic, high-performance interrupt handling
189- upward compatibility with the rest of the Cortex-M processor family.
190 </description>
191 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
192 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
193 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
194 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
195
196 <device Dname="ARMCM0">
197 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
198 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
199 </device>
200 </family>
201
202 <!-- ****************************** Cortex-M0P ****************************** -->
203 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]204 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]205 <description>
206The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
207- simple, easy-to-use programmers model
208- highly efficient ultra-low power operation
209- excellent code density
210- deterministic, high-performance interrupt handling
211- upward compatibility with the rest of the Cortex-M processor family.
212 </description>
213 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
214 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
215 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
216 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
217
218 <device Dname="ARMCM0P">
219 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
220 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
221 </device>
222 </family>
223
224 <!-- ****************************** Cortex-M3 ****************************** -->
225 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]226 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]227 <description>
228The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
229- simple, easy-to-use programmers model
230- highly efficient ultra-low power operation
231- excellent code density
232- deterministic, high-performance interrupt handling
233- upward compatibility with the rest of the Cortex-M processor family.
234 </description>
235 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
236 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
237 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
238 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
239
240 <device Dname="ARMCM3">
241 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
242 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
243 </device>
244 </family>
245
246 <!-- ****************************** Cortex-M4 ****************************** -->
247 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]248 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]249 <description>
250The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
251- simple, easy-to-use programmers model
252- highly efficient ultra-low power operation
253- excellent code density
254- deterministic, high-performance interrupt handling
255- upward compatibility with the rest of the Cortex-M processor family.
256 </description>
257 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
258 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
259 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
260 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
261
262 <device Dname="ARMCM4">
263 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
264 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
265 </device>
266
267 <device Dname="ARMCM4_FP">
268 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
269 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
270 </device>
271 </family>
272
273 <!-- ****************************** Cortex-M7 ****************************** -->
274 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]275 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]276 <description>
277The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
278- simple, easy-to-use programmers model
279- highly efficient ultra-low power operation
280- excellent code density
281- deterministic, high-performance interrupt handling
282- upward compatibility with the rest of the Cortex-M processor family.
283 </description>
284 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
285 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
286 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
287 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
288
289 <device Dname="ARMCM7">
290 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
291 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
292 </device>
293
294 <device Dname="ARMCM7_SP">
295 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
296 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
297 </device>
298
299 <device Dname="ARMCM7_DP">
300 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
301 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
302 </device>
303 </family>
304
305 <!-- ****************************** ARMSC000 ****************************** -->
306 <family Dfamily="ARM SC000" Dvendor="ARM:82">
307 <description>
308The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
309- simple, easy-to-use programmers model
310- highly efficient ultra-low power operation
311- excellent code density
312- deterministic, high-performance interrupt handling
313 </description>
314 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
315 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
316 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
317 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
318
319 <device Dname="ARMSC000">
320 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
321 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
322 </device>
323 </family>
324
325 <!-- ****************************** ARMSC300 ****************************** -->
326 <family Dfamily="ARM SC300" Dvendor="ARM:82">
327 <description>
328The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
329- simple, easy-to-use programmers model
330- highly efficient ultra-low power operation
331- excellent code density
332- deterministic, high-performance interrupt handling
333 </description>
334 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
335 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
336 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
337 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
338
339 <device Dname="ARMSC300">
340 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
341 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
342 </device>
343 </family>
344
345 <!-- ****************************** ARMv8-M Baseline ********************** -->
346 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
347 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
348 <description>
349The ARMv8MBL processor is brand new.
350 </description>
351 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
352 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
353 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
354 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
355
356 <device Dname="ARMv8MBL">
357 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
358 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
359 </device>
360 </family>
361
362 <!-- ****************************** ARMv8-M Mainline ****************************** -->
363 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
364 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
365 <description>
366The ARMv8MML processor is brand new.
367 </description>
368 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
369 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
370 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
371 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
372
373 <device Dname="ARMv8MML">
374 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
375 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
376 </device>
377
378 <device Dname="ARMv8MML_SP">
379 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
380 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
381 </device>
382
383 <device Dname="ARMv8MML_DP">
384 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
385 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
386 </device>
387 </family>
388
389 </devices>
390
391
392 <apis>
393 <!-- CMSIS-RTOS API -->
394 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
395 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
396 <files>
397 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
398 </files>
399 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]400 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]401 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
402 <files>
403 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
404 </files>
405 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]406 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
407 <description>USART Driver API for Cortex-M</description>
408 <files>
409 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
410 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
411 </files>
412 </api>
413 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
414 <description>SPI Driver API for Cortex-M</description>
415 <files>
416 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
417 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
418 </files>
419 </api>
420 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
421 <description>SAI Driver API for Cortex-M</description>
422 <files>
423 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
424 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
425 </files>
426 </api>
427 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
428 <description>I2C Driver API for Cortex-M</description>
429 <files>
430 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
431 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
432 </files>
433 </api>
434 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
435 <description>CAN Driver API for Cortex-M</description>
436 <files>
437 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
438 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
439 </files>
440 </api>
441 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
442 <description>Flash Driver API for Cortex-M</description>
443 <files>
444 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
445 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
446 </files>
447 </api>
448 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
449 <description>MCI Driver API for Cortex-M</description>
450 <files>
451 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
452 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
453 </files>
454 </api>
455 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
456 <description>NAND Flash Driver API for Cortex-M</description>
457 <files>
458 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
459 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
460 </files>
461 </api>
462 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
463 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
464 <files>
465 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
466 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
467 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
468 </files>
469 </api>
470 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
471 <description>Ethernet MAC Driver API for Cortex-M</description>
472 <files>
473 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
474 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
475 </files>
476 </api>
477 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
478 <description>Ethernet PHY Driver API for Cortex-M</description>
479 <files>
480 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
481 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
482 </files>
483 </api>
484 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
485 <description>USB Device Driver API for Cortex-M</description>
486 <files>
487 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
488 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
489 </files>
490 </api>
491 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
492 <description>USB Host Driver API for Cortex-M</description>
493 <files>
494 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
495 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
496 </files>
497 </api>
498 </apis>
499
500 <!-- conditions are dependency rules that can apply to a component or an individual file -->
501 <conditions>
502 <condition id="ARMCC">
503 <require Tcompiler="ARMCC"/>
504 </condition>
505
506 <condition id="GCC">
507 <require Tcompiler="GCC"/>
508 </condition>
509
510 <condition id="IAR">
511 <require Tcompiler="IAR"/>
512 </condition>
513
514 <condition id="ARMCC GCC">
515 <accept Tcompiler="ARMCC"/>
516 <accept Tcompiler="GCC"/>
517 </condition>
518
519 <condition id="Cortex-M Device">
520 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
521 <accept Dcore="Cortex-M0"/>
522 <accept Dcore="Cortex-M0+"/>
523 <accept Dcore="Cortex-M3"/>
524 <accept Dcore="Cortex-M4"/>
525 <accept Dcore="Cortex-M7"/>
526 <accept Dcore="SC000"/>
527 <accept Dcore="SC300"/>
528 </condition>
529
530 <condition id="Cortex-M ARMv8-M Device">
531 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
532 <accept Dcore="Cortex-M0"/>
533 <accept Dcore="Cortex-M0+"/>
534 <accept Dcore="Cortex-M3"/>
535 <accept Dcore="Cortex-M4"/>
536 <accept Dcore="Cortex-M7"/>
537 <accept Dcore="SC000"/>
538 <accept Dcore="SC300"/>
539 <accept Dcore="ARMV8MBL"/>
540 <accept Dcore="ARMV8MML"/>
541 </condition>
542
543 <condition id="Cortex-M Device CMSIS Core">
544 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
545 <require condition="Cortex-M Device"/>
546 <require Cclass="CMSIS" Cgroup="CORE"/>
547 </condition>
548
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]549 <condition id="CMSIS Core">
550 <description>CMSIS CORE processor and device specific Startup files</description>
551 <require Cclass="CMSIS" Cgroup="CORE"/>
552 </condition>
553
554 <condition id="ARMCM0 CMSIS">
555 <!-- conditions selecting Devices -->
556 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
557 <require Dvendor="ARM:82" Dname="ARMCM0"/>
558 <require Cclass="CMSIS" Cgroup="CORE"/>
559 </condition>
560
561 <condition id="ARMCM0 CMSIS GCC">
562 <!-- conditions selecting Devices -->
563 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
564 <require condition="ARMCM0 CMSIS"/>
565 <require condition="GCC"/>
566 </condition>
567
568 <condition id="ARMCM0+ CMSIS">
569 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
570 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
571 <require Cclass="CMSIS" Cgroup="CORE"/>
572 </condition>
573
574 <condition id="ARMCM0+ CMSIS GCC">
575 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
576 <require condition="ARMCM0+ CMSIS"/>
577 <require condition="GCC"/>
578 </condition>
579
580 <condition id="ARMCM3 CMSIS">
581 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
582 <require Dvendor="ARM:82" Dname="ARMCM3"/>
583 <require Cclass="CMSIS" Cgroup="CORE"/>
584 </condition>
585
586 <condition id="ARMCM3 CMSIS GCC">
587 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
588 <require condition="ARMCM3 CMSIS"/>
589 <require condition="GCC"/>
590 </condition>
591
592 <condition id="ARMCM4 CMSIS">
593 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
594 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
595 <require Cclass="CMSIS" Cgroup="CORE"/>
596 </condition>
597
598 <condition id="ARMCM4 CMSIS GCC">
599 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
600 <require condition="ARMCM4 CMSIS"/>
601 <require condition="GCC"/>
602 </condition>
603
604 <condition id="ARMCM7 CMSIS">
605 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
606 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
607 <require Cclass="CMSIS" Cgroup="CORE"/>
608 </condition>
609
610 <condition id="ARMCM7 CMSIS GCC">
611 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
612 <require condition="ARMCM7 CMSIS"/>
613 <require condition="GCC"/>
614 </condition>
615
616 <condition id="ARMSC000 CMSIS">
617 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
618 <require Dvendor="ARM:82" Dname="ARMSC000"/>
619 <require Cclass="CMSIS" Cgroup="CORE"/>
620 </condition>
621
622 <condition id="ARMSC000 CMSIS GCC">
623 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
624 <require condition="ARMSC000 CMSIS"/>
625 <require condition="GCC"/>
626 </condition>
627
628 <condition id="ARMSC300 CMSIS">
629 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
630 <require Dvendor="ARM:82" Dname="ARMSC300"/>
631 <require Cclass="CMSIS" Cgroup="CORE"/>
632 </condition>
633
634 <condition id="ARMSC300 CMSIS GCC">
635 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
636 <require condition="ARMSC300 CMSIS"/>
637 <require condition="GCC"/>
638 </condition>
639
640 <condition id="ARMv8MBL CMSIS">
641 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
642 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
643 <require Cclass="CMSIS" Cgroup="CORE"/>
644 </condition>
645
646 <condition id="ARMv8MBL CMSIS GCC">
647 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
648 <require condition="ARMv8MBL CMSIS"/>
649 <require condition="GCC"/>
650 </condition>
651
652 <condition id="ARMv8MML CMSIS">
653 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
654 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
655 <require Cclass="CMSIS" Cgroup="CORE"/>
656 </condition>
657
658 <condition id="ARMv8MML CMSIS GCC">
659 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
660 <require condition="ARMv8MML CMSIS"/>
661 <require condition="GCC"/>
662 </condition>
663
664 <condition id="CMSIS DSP">
665 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
666 <require condition="Cortex-M Device CMSIS Core"/>
667 <accept Tcompiler="GCC"/>
668 <accept Tcompiler="ARMCC"/>
669 <accept Tcompiler="IAR"/>
670 </condition>
671
672 <!-- ARMCC compiler -->
673 <condition id="CM0_LE_ARMCC">
674 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
675 <accept Dcore="Cortex-M0"/>
676 <accept Dcore="Cortex-M0+"/>
677 <accept Dcore="SC000"/>
678 <require Dendian="Little-endian"/>
679 <require Tcompiler="ARMCC"/>
680 </condition>
681
682 <condition id="CM0_BE_ARMCC">
683 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
684 <accept Dcore="Cortex-M0"/>
685 <accept Dcore="Cortex-M0+"/>
686 <accept Dcore="SC000"/>
687 <require Dendian="Big-endian"/>
688 <require Tcompiler="ARMCC"/>
689 </condition>
690
691 <condition id="CM3_LE_ARMCC">
692 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
693 <accept Dcore="Cortex-M3"/>
694 <accept Dcore="SC300"/>
695 <require Dendian="Little-endian"/>
696 <require Tcompiler="ARMCC"/>
697 </condition>
698
699 <condition id="CM3_BE_ARMCC">
700 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
701 <accept Dcore="Cortex-M3"/>
702 <accept Dcore="SC300"/>
703 <require Dendian="Big-endian"/>
704 <require Tcompiler="ARMCC"/>
705 </condition>
706
707 <condition id="CM4_LE_ARMCC">
708 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
709 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
710 <require Tcompiler="ARMCC"/>
711 </condition>
712
713 <condition id="CM4_BE_ARMCC">
714 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
715 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
716 <require Tcompiler="ARMCC"/>
717 </condition>
718
719 <condition id="CM4F_LE_ARMCC">
720 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
721 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
722 <require Tcompiler="ARMCC"/>
723 </condition>
724
725 <condition id="CM4F_BE_ARMCC">
726 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
727 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
728 <require Tcompiler="ARMCC"/>
729 </condition>
730
731 <!-- XMC 4000 Series devices from Infineon require a special library -->
732 <condition id="CM4_LE_ARMCC_STD">
733 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
734 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
735 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
736 <require Tcompiler="ARMCC"/>
737 </condition>
738 <condition id="CM4_LE_ARMCC_IFX">
739 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
740 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
741 <require Tcompiler="ARMCC"/>
742 </condition>
743 <condition id="CM4F_LE_ARMCC_STD">
744 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
745 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
746 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
747 <require Tcompiler="ARMCC"/>
748 </condition>
749 <condition id="CM4F_LE_ARMCC_IFX">
750 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
751 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
752 <require Tcompiler="ARMCC"/>
753 </condition>
754
755 <condition id="CM7_LE_ARMCC">
756 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
757 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
758 <require Tcompiler="ARMCC"/>
759 </condition>
760
761 <condition id="CM7_BE_ARMCC">
762 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
763 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
764 <require Tcompiler="ARMCC"/>
765 </condition>
766
767 <condition id="CM7F_LE_ARMCC">
768 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
769 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
770 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
771 <require Tcompiler="ARMCC"/>
772 </condition>
773
774 <condition id="CM7F_BE_ARMCC">
775 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
776 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
777 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
778 <require Tcompiler="ARMCC"/>
779 </condition>
780
781 <condition id="CM7FSP_LE_ARMCC">
782 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
783 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
784 <require Tcompiler="ARMCC"/>
785 </condition>
786
787 <condition id="CM7FSP_BE_ARMCC">
788 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
789 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
790 <require Tcompiler="ARMCC"/>
791 </condition>
792
793 <condition id="CM7FDP_LE_ARMCC">
794 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
795 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
796 <require Tcompiler="ARMCC"/>
797 </condition>
798
799 <condition id="CM7FDP_BE_ARMCC">
800 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
801 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
802 <require Tcompiler="ARMCC"/>
803 </condition>
804
805 <!-- GCC compiler -->
806 <condition id="CM0_LE_GCC">
807 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
808 <accept Dcore="Cortex-M0"/>
809 <accept Dcore="Cortex-M0+"/>
810 <accept Dcore="SC000"/>
811 <require Dendian="Little-endian"/>
812 <require Tcompiler="GCC"/>
813 </condition>
814
815 <condition id="CM0_BE_GCC">
816 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
817 <accept Dcore="Cortex-M0"/>
818 <accept Dcore="Cortex-M0+"/>
819 <accept Dcore="SC000"/>
820 <require Dendian="Big-endian"/>
821 <require Tcompiler="GCC"/>
822 </condition>
823
824 <condition id="CM3_LE_GCC">
825 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
826 <accept Dcore="Cortex-M3"/>
827 <accept Dcore="SC300"/>
828 <require Dendian="Little-endian"/>
829 <require Tcompiler="GCC"/>
830 </condition>
831
832 <condition id="CM3_BE_GCC">
833 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
834 <accept Dcore="Cortex-M3"/>
835 <accept Dcore="SC300"/>
836 <require Dendian="Big-endian"/>
837 <require Tcompiler="GCC"/>
838 </condition>
839
840 <condition id="CM4_LE_GCC">
841 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
842 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
843 <require Tcompiler="GCC"/>
844 </condition>
845
846 <condition id="CM4_BE_GCC">
847 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
848 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
849 <require Tcompiler="GCC"/>
850 </condition>
851
852 <condition id="CM4F_LE_GCC">
853 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
854 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
855 <require Tcompiler="GCC"/>
856 </condition>
857
858 <condition id="CM4F_BE_GCC">
859 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
860 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
861 <require Tcompiler="GCC"/>
862 </condition>
863
864 <!-- XMC 4000 Series devices from Infineon require a special library -->
865 <condition id="CM4_LE_GCC_STD">
866 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
867 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
868 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
869 <require Tcompiler="GCC"/>
870 </condition>
871 <condition id="CM4_LE_GCC_IFX">
872 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
873 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
874 <require Tcompiler="GCC"/>
875 </condition>
876 <condition id="CM4F_LE_GCC_STD">
877 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
878 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
879 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
880 <require Tcompiler="GCC"/>
881 </condition>
882 <condition id="CM4F_LE_GCC_IFX">
883 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
884 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
885 <require Tcompiler="GCC"/>
886 </condition>
887
888 <condition id="CM7_LE_GCC">
889 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
890 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
891 <require Tcompiler="GCC"/>
892 </condition>
893
894 <condition id="CM7_BE_GCC">
895 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
896 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
897 <require Tcompiler="GCC"/>
898 </condition>
899
900 <condition id="CM7F_LE_GCC">
901 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
902 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
903 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
904 <require Tcompiler="GCC"/>
905 </condition>
906
907 <condition id="CM7F_BE_GCC">
908 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
909 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
910 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
911 <require Tcompiler="GCC"/>
912 </condition>
913
914 <condition id="CM7FSP_LE_GCC">
915 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
916 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
917 <require Tcompiler="GCC"/>
918 </condition>
919
920 <condition id="CM7FSP_BE_GCC">
921 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
922 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
923 <require Tcompiler="GCC"/>
924 </condition>
925
926 <condition id="CM7FDP_LE_GCC">
927 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
928 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
929 <require Tcompiler="GCC"/>
930 </condition>
931
932 <condition id="CM7FDP_BE_GCC">
933 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
934 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
935 <require Tcompiler="GCC"/>
936 </condition>
937
938 <!-- IAR compiler -->
939 <condition id="CM0_LE_IAR">
940 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
941 <accept Dcore="Cortex-M0"/>
942 <accept Dcore="Cortex-M0+"/>
943 <accept Dcore="SC000"/>
944 <require Dendian="Little-endian"/>
945 <require Tcompiler="IAR"/>
946 </condition>
947
948 <condition id="CM0_BE_IAR">
949 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
950 <accept Dcore="Cortex-M0"/>
951 <accept Dcore="Cortex-M0+"/>
952 <accept Dcore="SC000"/>
953 <require Dendian="Big-endian"/>
954 <require Tcompiler="IAR"/>
955 </condition>
956
957 <condition id="CM3_LE_IAR">
958 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
959 <accept Dcore="Cortex-M3"/>
960 <accept Dcore="SC300"/>
961 <require Dendian="Little-endian"/>
962 <require Tcompiler="IAR"/>
963 </condition>
964
965 <condition id="CM3_BE_IAR">
966 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
967 <accept Dcore="Cortex-M3"/>
968 <accept Dcore="SC300"/>
969 <require Dendian="Big-endian"/>
970 <require Tcompiler="IAR"/>
971 </condition>
972
973 <condition id="CM4_LE_IAR">
974 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
975 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
976 <require Tcompiler="IAR"/>
977 </condition>
978
979 <condition id="CM4_BE_IAR">
980 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
981 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
982 <require Tcompiler="IAR"/>
983 </condition>
984
985 <condition id="CM4F_LE_IAR">
986 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
987 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
988 <require Tcompiler="IAR"/>
989 </condition>
990
991 <condition id="CM4F_BE_IAR">
992 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
993 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
994 <require Tcompiler="IAR"/>
995 </condition>
996
997 <condition id="CM7_LE_IAR">
998 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
999 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1000 <require Tcompiler="IAR"/>
1001 </condition>
1002
1003 <condition id="CM7_BE_IAR">
1004 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1005 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1006 <require Tcompiler="IAR"/>
1007 </condition>
1008
1009 <condition id="CM7F_LE_IAR">
1010 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1011 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1012 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1013 <require Tcompiler="IAR"/>
1014 </condition>
1015
1016 <condition id="CM7F_BE_IAR">
1017 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1018 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1019 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1020 <require Tcompiler="IAR"/>
1021 </condition>
1022
1023 <condition id="CM7FSP_LE_IAR">
1024 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1025 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1026 <require Tcompiler="IAR"/>
1027 </condition>
1028
1029 <condition id="CM7FSP_BE_IAR">
1030 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1031 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1032 <require Tcompiler="IAR"/>
1033 </condition>
1034
1035 <condition id="CM7FDP_LE_IAR">
1036 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1037 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1038 <require Tcompiler="IAR"/>
1039 </condition>
1040
1041 <condition id="CM7FDP_BE_IAR">
1042 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1043 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1044 <require Tcompiler="IAR"/>
1045 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1046
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1047 <condition id="RTOS RTX Dependency">
1048 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1049 <require condition="Cortex-M Device"/>
1050 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1051 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/> -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1052 </condition>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1053 <condition id="RTOS RTX5 Dependency">
1054 <description>Components required for RTOS RTX5</description>
1055 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/> -->
1056 </condition>
1057 <condition id="RTOS2 RTX5 Dependency">
1058 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1059 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1060 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1061 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1062 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1063 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1064 </conditions>
1065
1066 <components>
1067 <!-- CMSIS-Core component -->
1068 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1069 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1070 <files>
1071 <!-- CPU independent -->
1072 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1073 <file category="include" name="CMSIS/Include/"/>
1074 </files>
1075 </component>
1076
1077 <!-- CMSIS-Startup components -->
1078 <!-- Cortex-M0 -->
1079 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1080 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1081 <files>
1082 <!-- include folder / device header file -->
1083 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1084 <!-- startup / system file -->
1085 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1086 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1087 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1088 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1089 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1090 </files>
1091 </component>
1092 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1093 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1094 <files>
1095 <!-- include folder / device header file -->
1096 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1097 <!-- startup / system file -->
1098 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1099 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1100 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1101 </files>
1102 </component>
1103
1104 <!-- Cortex-M0+ -->
1105 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1106 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1107 <files>
1108 <!-- include folder / device header file -->
1109 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1110 <!-- startup / system file -->
1111 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1112 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1113 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1114 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1115 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1116 </files>
1117 </component>
1118 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1119 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1120 <files>
1121 <!-- include folder / device header file -->
1122 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1123 <!-- startup / system file -->
1124 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1125 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1126 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1127 </files>
1128 </component>
1129
1130 <!-- Cortex-M3 -->
1131 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1132 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1133 <files>
1134 <!-- include folder / device header file -->
1135 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1136 <!-- startup / system file -->
1137 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1138 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1139 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1140 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1141 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1142 </files>
1143 </component>
1144 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1145 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1146 <files>
1147 <!-- include folder / device header file -->
1148 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1149 <!-- startup / system file -->
1150 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1151 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1152 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1153 </files>
1154 </component>
1155
1156 <!-- Cortex-M4 -->
1157 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1158 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1159 <files>
1160 <!-- include folder / device header file -->
1161 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1162 <!-- startup / system file -->
1163 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1164 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1165 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1166 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1167 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1168 </files>
1169 </component>
1170 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1171 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1172 <files>
1173 <!-- include folder / device header file -->
1174 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1175 <!-- startup / system file -->
1176 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1177 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1178 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1179 </files>
1180 </component>
1181
1182 <!-- Cortex-M7 -->
1183 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1184 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1185 <files>
1186 <!-- include folder / device header file -->
1187 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1188 <!-- startup / system file -->
1189 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1190 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1191 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1192 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1193 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1194 </files>
1195 </component>
1196 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1197 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1198 <files>
1199 <!-- include folder / device header file -->
1200 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1201 <!-- startup / system file -->
1202 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1203 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1204 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1205 </files>
1206 </component>
1207
1208 <!-- Cortex-SC000 -->
1209 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1210 <description>System and Startup for Generic ARM SC000 device</description>
1211 <files>
1212 <!-- include folder / device header file -->
1213 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1214 <!-- startup / system file -->
1215 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1216 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1217 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1218 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1219 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1220 </files>
1221 </component>
1222 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1223 <description>System and Startup for Generic ARM SC000 device</description>
1224 <files>
1225 <!-- include folder / device header file -->
1226 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1227 <!-- startup / system file -->
1228 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1229 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1230 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1231 </files>
1232 </component>
1233
1234 <!-- Cortex-SC300 -->
1235 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1236 <description>System and Startup for Generic ARM SC300 device</description>
1237 <files>
1238 <!-- include folder / device header file -->
1239 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1240 <!-- startup / system file -->
1241 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1242 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1243 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1244 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1245 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1246 </files>
1247 </component>
1248 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1249 <description>System and Startup for Generic ARM SC300 device</description>
1250 <files>
1251 <!-- include folder / device header file -->
1252 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1253 <!-- startup / system file -->
1254 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1255 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1256 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1257 </files>
1258 </component>
1259
1260 <!-- ARMv8MBL -->
1261 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1262 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1263 <files>
1264 <!-- include folder / device header file -->
1265 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1266 <!-- startup / system file -->
1267 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1268 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1269 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1270 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1271 <!-- SAU configuration -->
1272 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1273 </files>
1274 </component>
1275 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1276 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1277 <files>
1278 <!-- include folder / device header file -->
1279 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1280 <!-- startup / system file -->
1281 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1282 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1283 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1284 </files>
1285 </component>
1286
1287 <!-- ARMv8MML -->
1288 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1289 <description>System and Startup for Generic ARM ARMv8MML device</description>
1290 <files>
1291 <!-- include folder / device header file -->
1292 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1293 <!-- startup / system file -->
1294 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1295 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1296 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1297 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1298 <!-- SAU configuration -->
1299 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1300 </files>
1301 </component>
1302 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1303 <description>System and Startup for Generic ARM ARMv8MML device</description>
1304 <files>
1305 <!-- include folder / device header file -->
1306 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1307 <!-- startup / system file -->
1308 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1309 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1310 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1311 </files>
1312 </component>
1313
1314
1315 <!-- CMSIS-DSP component -->
1316 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1317 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1318 <files>
1319 <!-- CPU independent -->
1320 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1321 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1322 <file category="header" name="CMSIS/Include/arm_math.h"/>
1323 <!-- CPU and Compiler dependent -->
1324 <!-- ARMCC -->
1325 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1326 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1327 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1328 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1329 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1330 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1331 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1332 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1333 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1334 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1335 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1336 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1337 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1338 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1339 <!-- GCC -->
1340 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1341 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1342 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1343 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1344 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1345 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1346 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1347 </files>
1348 </component>
1349
1350 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1351 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX Dependency">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1352 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1353 <RTE_Components_h>
1354 <!-- the following content goes into file 'RTE_Components.h' -->
1355 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1356 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1357 </RTE_Components_h>
1358 <files>
1359 <!-- CPU independent -->
1360 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1361 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1362 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1363
1364 <!-- RTX templates -->
1365 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1366 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1367 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1368 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1369 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1370 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1371 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1372 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1373 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1374 <!-- tool-chain specific template file -->
1375 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1376 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1377 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1378
1379 <!-- CPU and Compiler dependent -->
1380 <!-- ARMCC -->
1381 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1382 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1383 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1384 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1385 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1386 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1387 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1388 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1389 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1390 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1391 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1392 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1393 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1394 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1395 <!-- GCC -->
1396 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1397 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1398 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1399 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1400 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1401 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1402 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1403 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1404 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1405 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1406 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1407 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1408 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1409 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1410 <!-- IAR -->
1411 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1412 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1413 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1414 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1415 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1416 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1417 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1418 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1419 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1420 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1421 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1422 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1423 </files>
1424 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1425
1426 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1427 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5 Dependency">
1428 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1429 <RTE_Components_h>
1430 <!-- the following content goes into file 'RTE_Components.h' -->
1431 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame^]1432 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1433 </RTE_Components_h>
1434 <files>
1435 <!-- RTX header file -->
1436 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1437 <!-- RTX compatibility module for API V1 -->
1438 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1439 </files>
1440 </component>
1441
1442 <!-- CMSIS-RTOS2 Keil RTX5 component -->
1443 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 Dependency">
1444 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1445 <RTE_Components_h>
1446 <!-- the following content goes into file 'RTE_Components.h' -->
1447 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1448 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1449 </RTE_Components_h>
1450 <files>
1451 <!-- RTX documentation -->
1452 <!-- <file category="doc" name="CMSIS/Documentation/RTOS2/html/_r_t_x_implementation.html"/> -->
1453
1454 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1455 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1456 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1457
1458 <!-- RTX configuration -->
1459 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1460
1461 <!-- RTX templates -->
1462 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1463 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1464
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1465 <!-- RTX libraries (CPU and Compiler dependent) -->
1466 <!-- ARMCC -->
1467 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1468 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1469 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1470 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1471 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1472 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1473 <!-- GCC -->
1474 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1475 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1476 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1477 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1478 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1479 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1480 </files>
1481 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1482 </components>
1483
1484 <boards>
1485 <board name="uVision Simulator" vendor="Keil">
1486 <description>uVision Simulator</description>
1487 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1488 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1489 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1490 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1491 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1492 </board>
1493 </boards>
1494
1495 <examples>
1496 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1497 <description>DSP_Lib Class Marks example</description>
1498 <board name="uVision Simulator" vendor="Keil"/>
1499 <project>
1500 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1501 </project>
1502 <attributes>
1503 <component Cclass="CMSIS" Cgroup="CORE"/>
1504 <component Cclass="CMSIS" Cgroup="DSP"/>
1505 <component Cclass="Device" Cgroup="Startup"/>
1506 <category>Getting Started</category>
1507 </attributes>
1508 </example>
1509
1510 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1511 <description>DSP_Lib Convolution example</description>
1512 <board name="uVision Simulator" vendor="Keil"/>
1513 <project>
1514 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1515 </project>
1516 <attributes>
1517 <component Cclass="CMSIS" Cgroup="CORE"/>
1518 <component Cclass="CMSIS" Cgroup="DSP"/>
1519 <component Cclass="Device" Cgroup="Startup"/>
1520 <category>Getting Started</category>
1521 </attributes>
1522 </example>
1523
1524 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1525 <description>DSP_Lib Dotproduct example</description>
1526 <board name="uVision Simulator" vendor="Keil"/>
1527 <project>
1528 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1529 </project>
1530 <attributes>
1531 <component Cclass="CMSIS" Cgroup="CORE"/>
1532 <component Cclass="CMSIS" Cgroup="DSP"/>
1533 <component Cclass="Device" Cgroup="Startup"/>
1534 <category>Getting Started</category>
1535 </attributes>
1536 </example>
1537
1538 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1539 <description>DSP_Lib FFT Bin example</description>
1540 <board name="uVision Simulator" vendor="Keil"/>
1541 <project>
1542 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1543 </project>
1544 <attributes>
1545 <component Cclass="CMSIS" Cgroup="CORE"/>
1546 <component Cclass="CMSIS" Cgroup="DSP"/>
1547 <component Cclass="Device" Cgroup="Startup"/>
1548 <category>Getting Started</category>
1549 </attributes>
1550 </example>
1551
1552 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1553 <description>DSP_Lib FIR example</description>
1554 <board name="uVision Simulator" vendor="Keil"/>
1555 <project>
1556 <environment name="uv" load="arm_fir_example.uvprojx"/>
1557 </project>
1558 <attributes>
1559 <component Cclass="CMSIS" Cgroup="CORE"/>
1560 <component Cclass="CMSIS" Cgroup="DSP"/>
1561 <component Cclass="Device" Cgroup="Startup"/>
1562 <category>Getting Started</category>
1563 </attributes>
1564 </example>
1565
1566 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1567 <description>DSP_Lib Graphic Equalizer example</description>
1568 <board name="uVision Simulator" vendor="Keil"/>
1569 <project>
1570 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1571 </project>
1572 <attributes>
1573 <component Cclass="CMSIS" Cgroup="CORE"/>
1574 <component Cclass="CMSIS" Cgroup="DSP"/>
1575 <component Cclass="Device" Cgroup="Startup"/>
1576 <category>Getting Started</category>
1577 </attributes>
1578 </example>
1579
1580 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1581 <description>DSP_Lib Linear Interpolation example</description>
1582 <board name="uVision Simulator" vendor="Keil"/>
1583 <project>
1584 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1585 </project>
1586 <attributes>
1587 <component Cclass="CMSIS" Cgroup="CORE"/>
1588 <component Cclass="CMSIS" Cgroup="DSP"/>
1589 <component Cclass="Device" Cgroup="Startup"/>
1590 <category>Getting Started</category>
1591 </attributes>
1592 </example>
1593
1594 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1595 <description>DSP_Lib Matrix example</description>
1596 <board name="uVision Simulator" vendor="Keil"/>
1597 <project>
1598 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1599 </project>
1600 <attributes>
1601 <component Cclass="CMSIS" Cgroup="CORE"/>
1602 <component Cclass="CMSIS" Cgroup="DSP"/>
1603 <component Cclass="Device" Cgroup="Startup"/>
1604 <category>Getting Started</category>
1605 </attributes>
1606 </example>
1607
1608 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1609 <description>DSP_Lib Signal Convergence example</description>
1610 <board name="uVision Simulator" vendor="Keil"/>
1611 <project>
1612 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1613 </project>
1614 <attributes>
1615 <component Cclass="CMSIS" Cgroup="CORE"/>
1616 <component Cclass="CMSIS" Cgroup="DSP"/>
1617 <component Cclass="Device" Cgroup="Startup"/>
1618 <category>Getting Started</category>
1619 </attributes>
1620 </example>
1621
1622 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1623 <description>DSP_Lib Sinus/Cosinus example</description>
1624 <board name="uVision Simulator" vendor="Keil"/>
1625 <project>
1626 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1627 </project>
1628 <attributes>
1629 <component Cclass="CMSIS" Cgroup="CORE"/>
1630 <component Cclass="CMSIS" Cgroup="DSP"/>
1631 <component Cclass="Device" Cgroup="Startup"/>
1632 <category>Getting Started</category>
1633 </attributes>
1634 </example>
1635
1636 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1637 <description>DSP_Lib Variance example</description>
1638 <board name="uVision Simulator" vendor="Keil"/>
1639 <project>
1640 <environment name="uv" load="arm_variance_example.uvprojx"/>
1641 </project>
1642 <attributes>
1643 <component Cclass="CMSIS" Cgroup="CORE"/>
1644 <component Cclass="CMSIS" Cgroup="DSP"/>
1645 <component Cclass="Device" Cgroup="Startup"/>
1646 <category>Getting Started</category>
1647 </attributes>
1648 </example>
1649 </examples>
1650
1651</package>