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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 4868c88b763f9923330359cec1e522555f093777 / . / ARM.CMSIS.pdsc
blob: c30eff0dc67ac4b47e9cfd2b9b7c819b38228326 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame^]11 <release version="5.0.0-Beta8">
12 CMSIS-RTOS:
13 - API 2.0
14 - RTX 5.0.0-Alpha
15 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]16 <release version="5.0.0-Beta7">
17 CMSIS_Core:
18 - Added macro __ALIGNED.
19 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]20 <release version="5.0.0-Beta6">
21 CMSIS_Core:
22 - Added SCB_CFSR register bit definitions in core_*.h.
23 - Added NVIC_GetEnableIRQ function in core_*.h.
24 - Updated core instruction macros in cmsis_gcc.h.
25 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]26 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]27 CMSIS_DSP:
28 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
29 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]30 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]31 <release version="5.0.0-Beta4">
32 Updated ARMv8MML device files.
33 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
34 Updated CMSIS core files.
35 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
36 </release>
37 <release version="5.0.0-Beta3">
38 Updated CMSIS ARMv8M core / device files
39 - increased SAU regions to 8.
40 - moved TZ_SAU_Setup() to partition_#device#.h.
41 </release>
42 <release version="5.0.0-Beta2">
43 - renamed core_*.h to lower case.
44 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
45 - updated ARMv8M?L.svd.
46 </release>
47 <release version="5.0.0-Beta1">
48 - added function SCB_GetFPUType() to all CMSIS cores.
49 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
50 - updated CMSIS core files to V5.0
51 - updated CMSIS Core change log.
52 - updated CMSIS DSP_Lib change log.
53 - updated CMSIS DSP_Lib libraries.
54 </release>
55 <release version="5.0.0-Beta" date="2015-12-15">
56 Added ARMv8M support to CMSIS-Core.
57 - CMSIS-Core 5.0.0 Beta (see revision history for details)
58 - CMSIS-RTOS
59 -- API 1.02 (unchanged)
60 -- RTX 4.81.0 (see revision history for details)
61 - CMSIS-SVD 1.3.2 (see revision history for details)
62 </release>
63 <release version="4.5.0" date="2015-10-28">
64 - CMSIS-Core 4.30.0 (see revision history for details)
65 - CMSIS-DAP 1.1.0 (unchanged)
66 - CMSIS-Driver 2.04.0 (see revision history for details)
67 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
68 - CMSIS-PACK 1.4.1 (see revision history for details)
69 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
70 - CMSIS-SVD 1.3.1 (see revision history for details)
71 </release>
72 <release version="4.4.0" date="2015-09-11">
73 - CMSIS-Core 4.20 (see revision history for details)
74 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
75 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
76 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
77 - CMSIS-RTOS
78 -- API 1.02 (unchanged)
79 -- RTX 4.79 (see revision history for details)
80 - CMSIS-SVD 1.3.0 (see revision history for details)
81 - CMSIS-DAP 1.1.0 (extended with SWO support)
82 </release>
83 <release version="4.3.0" date="2015-03-20">
84 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
85 - CMSIS-DSP 1.4.5 (see revision history for details)
86 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
87 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
88 - CMSIS-RTOS
89 -- API 1.02 (unchanged)
90 -- RTX 4.78 (see revision history for details)
91 - CMSIS-SVD 1.2 (unchanged)
92 </release>
93 <release version="4.2.0" date="2014-09-24">
94 Adding Cortex-M7 support
95 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
96 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
97 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
98 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
99 - CMSIS-RTOS RTX 4.75 (see revision history for details)
100 </release>
101 <release version="4.1.1" date="2014-06-30">
102 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
103 </release>
104 <release version="4.1.0" date="2014-06-12">
105 - CMSIS-Driver 2.02 (incompatible update)
106 - CMSIS-Pack 1.3 (see revision history for details)
107 - CMSIS-DSP 1.4.2 (unchanged)
108 - CMSIS-Core 3.30 (unchanged)
109 - CMSIS-RTOS RTX 4.74 (unchanged)
110 - CMSIS-RTOS API 1.02 (unchanged)
111 - CMSIS-SVD 1.10 (unchanged)
112 PACK:
113 - removed G++ specific files from PACK
114 - added Component Startup variant "C Startup"
115 - added Pack Checking Utility
116 - updated conditions to reflect tool-chain dependency
117 - added Taxonomy for Graphics
118 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
119 </release>
120 <release version="4.0.0">
121 - CMSIS-Driver 2.00 Preliminary (incompatible update)
122 - CMSIS-Pack 1.1 Preliminary
123 - CMSIS-DSP 1.4.2 (see revision history for details)
124 - CMSIS-Core 3.30 (see revision history for details)
125 - CMSIS-RTOS RTX 4.74 (see revision history for details)
126 - CMSIS-RTOS API 1.02 (unchanged)
127 - CMSIS-SVD 1.10 (unchanged)
128 </release>
129 <release version="3.20.4">
130 - CMSIS-RTOS 4.74 (see revision history for details)
131 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
132 </release>
133 <release version="3.20.3">
134 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
135 - CMSIS-RTOS 4.73 (see revision history for details)
136 </release>
137 <release version="3.20.2">
138 - CMSIS-Pack documentation has been added
139 - CMSIS-Drivers header and documentation have been added to PACK
140 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
141 </release>
142 <release version="3.20.1">
143 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
144 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
145 </release>
146 <release version="3.20.0">
147 The software portions that are deployed in the application program are now under a BSD license which allows usage
148 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
149 The individual components have been update as listed below:
150 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
151 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
152 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
153 - CMSIS-SVD is unchanged.
154 </release>
155 </releases>
156
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]157 <taxonomy>
158 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
159 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
160 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
161 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
162 <description Cclass="File System">File Drive Support and File System</description>
163 <description Cclass="Graphics">Graphical User Interface</description>
164 <description Cclass="Network">Network Stack using Internet Protocols</description>
165 <description Cclass="USB">Universal Serial Bus Stack</description>
166 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
167 </taxonomy>
168
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]169 <devices>
170 <!-- ****************************** Cortex-M0 ****************************** -->
171 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]172 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]173 <description>
174The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
175- simple, easy-to-use programmers model
176- highly efficient ultra-low power operation
177- excellent code density
178- deterministic, high-performance interrupt handling
179- upward compatibility with the rest of the Cortex-M processor family.
180 </description>
181 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
182 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
183 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
184 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
185
186 <device Dname="ARMCM0">
187 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
188 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
189 </device>
190 </family>
191
192 <!-- ****************************** Cortex-M0P ****************************** -->
193 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]194 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]195 <description>
196The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
197- simple, easy-to-use programmers model
198- highly efficient ultra-low power operation
199- excellent code density
200- deterministic, high-performance interrupt handling
201- upward compatibility with the rest of the Cortex-M processor family.
202 </description>
203 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
204 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
205 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
206 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
207
208 <device Dname="ARMCM0P">
209 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
210 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
211 </device>
212 </family>
213
214 <!-- ****************************** Cortex-M3 ****************************** -->
215 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]216 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]217 <description>
218The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
219- simple, easy-to-use programmers model
220- highly efficient ultra-low power operation
221- excellent code density
222- deterministic, high-performance interrupt handling
223- upward compatibility with the rest of the Cortex-M processor family.
224 </description>
225 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
226 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
227 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
228 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
229
230 <device Dname="ARMCM3">
231 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
232 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
233 </device>
234 </family>
235
236 <!-- ****************************** Cortex-M4 ****************************** -->
237 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]238 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]239 <description>
240The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
241- simple, easy-to-use programmers model
242- highly efficient ultra-low power operation
243- excellent code density
244- deterministic, high-performance interrupt handling
245- upward compatibility with the rest of the Cortex-M processor family.
246 </description>
247 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
248 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
249 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
250 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
251
252 <device Dname="ARMCM4">
253 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
254 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
255 </device>
256
257 <device Dname="ARMCM4_FP">
258 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
259 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
260 </device>
261 </family>
262
263 <!-- ****************************** Cortex-M7 ****************************** -->
264 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]265 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]266 <description>
267The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
268- simple, easy-to-use programmers model
269- highly efficient ultra-low power operation
270- excellent code density
271- deterministic, high-performance interrupt handling
272- upward compatibility with the rest of the Cortex-M processor family.
273 </description>
274 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
275 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
276 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
277 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
278
279 <device Dname="ARMCM7">
280 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
281 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
282 </device>
283
284 <device Dname="ARMCM7_SP">
285 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
286 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
287 </device>
288
289 <device Dname="ARMCM7_DP">
290 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
291 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
292 </device>
293 </family>
294
295 <!-- ****************************** ARMSC000 ****************************** -->
296 <family Dfamily="ARM SC000" Dvendor="ARM:82">
297 <description>
298The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
299- simple, easy-to-use programmers model
300- highly efficient ultra-low power operation
301- excellent code density
302- deterministic, high-performance interrupt handling
303 </description>
304 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
305 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
306 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
307 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
308
309 <device Dname="ARMSC000">
310 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
311 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
312 </device>
313 </family>
314
315 <!-- ****************************** ARMSC300 ****************************** -->
316 <family Dfamily="ARM SC300" Dvendor="ARM:82">
317 <description>
318The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
319- simple, easy-to-use programmers model
320- highly efficient ultra-low power operation
321- excellent code density
322- deterministic, high-performance interrupt handling
323 </description>
324 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
325 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
326 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
327 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
328
329 <device Dname="ARMSC300">
330 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
332 </device>
333 </family>
334
335 <!-- ****************************** ARMv8-M Baseline ********************** -->
336 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
337 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
338 <description>
339The ARMv8MBL processor is brand new.
340 </description>
341 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
342 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
343 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
344 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
345
346 <device Dname="ARMv8MBL">
347 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
348 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
349 </device>
350 </family>
351
352 <!-- ****************************** ARMv8-M Mainline ****************************** -->
353 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
354 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
355 <description>
356The ARMv8MML processor is brand new.
357 </description>
358 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
359 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
360 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
361 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
362
363 <device Dname="ARMv8MML">
364 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
365 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
366 </device>
367
368 <device Dname="ARMv8MML_SP">
369 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
370 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
371 </device>
372
373 <device Dname="ARMv8MML_DP">
374 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
375 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
376 </device>
377 </family>
378
379 </devices>
380
381
382 <apis>
383 <!-- CMSIS-RTOS API -->
384 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
385 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
386 <files>
387 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
388 </files>
389 </api>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame^]390 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="2.0" exclusive="1">
391 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
392 <files>
393 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
394 </files>
395 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]396 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
397 <description>USART Driver API for Cortex-M</description>
398 <files>
399 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
400 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
401 </files>
402 </api>
403 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
404 <description>SPI Driver API for Cortex-M</description>
405 <files>
406 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
407 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
408 </files>
409 </api>
410 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
411 <description>SAI Driver API for Cortex-M</description>
412 <files>
413 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
414 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
415 </files>
416 </api>
417 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
418 <description>I2C Driver API for Cortex-M</description>
419 <files>
420 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
421 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
422 </files>
423 </api>
424 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
425 <description>CAN Driver API for Cortex-M</description>
426 <files>
427 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
428 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
429 </files>
430 </api>
431 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
432 <description>Flash Driver API for Cortex-M</description>
433 <files>
434 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
435 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
436 </files>
437 </api>
438 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
439 <description>MCI Driver API for Cortex-M</description>
440 <files>
441 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
442 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
446 <description>NAND Flash Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
453 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
456 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
457 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
458 </files>
459 </api>
460 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
461 <description>Ethernet MAC Driver API for Cortex-M</description>
462 <files>
463 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
464 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
465 </files>
466 </api>
467 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
468 <description>Ethernet PHY Driver API for Cortex-M</description>
469 <files>
470 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
471 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
472 </files>
473 </api>
474 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
475 <description>USB Device Driver API for Cortex-M</description>
476 <files>
477 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
478 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
479 </files>
480 </api>
481 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
482 <description>USB Host Driver API for Cortex-M</description>
483 <files>
484 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
485 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
486 </files>
487 </api>
488 </apis>
489
490 <!-- conditions are dependency rules that can apply to a component or an individual file -->
491 <conditions>
492 <condition id="ARMCC">
493 <require Tcompiler="ARMCC"/>
494 </condition>
495
496 <condition id="GCC">
497 <require Tcompiler="GCC"/>
498 </condition>
499
500 <condition id="IAR">
501 <require Tcompiler="IAR"/>
502 </condition>
503
504 <condition id="ARMCC GCC">
505 <accept Tcompiler="ARMCC"/>
506 <accept Tcompiler="GCC"/>
507 </condition>
508
509 <condition id="Cortex-M Device">
510 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
511 <accept Dcore="Cortex-M0"/>
512 <accept Dcore="Cortex-M0+"/>
513 <accept Dcore="Cortex-M3"/>
514 <accept Dcore="Cortex-M4"/>
515 <accept Dcore="Cortex-M7"/>
516 <accept Dcore="SC000"/>
517 <accept Dcore="SC300"/>
518 </condition>
519
520 <condition id="Cortex-M ARMv8-M Device">
521 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
522 <accept Dcore="Cortex-M0"/>
523 <accept Dcore="Cortex-M0+"/>
524 <accept Dcore="Cortex-M3"/>
525 <accept Dcore="Cortex-M4"/>
526 <accept Dcore="Cortex-M7"/>
527 <accept Dcore="SC000"/>
528 <accept Dcore="SC300"/>
529 <accept Dcore="ARMV8MBL"/>
530 <accept Dcore="ARMV8MML"/>
531 </condition>
532
533 <condition id="Cortex-M Device CMSIS Core">
534 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
535 <require condition="Cortex-M Device"/>
536 <require Cclass="CMSIS" Cgroup="CORE"/>
537 </condition>
538
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]539 <condition id="CMSIS Core">
540 <description>CMSIS CORE processor and device specific Startup files</description>
541 <require Cclass="CMSIS" Cgroup="CORE"/>
542 </condition>
543
544 <condition id="ARMCM0 CMSIS">
545 <!-- conditions selecting Devices -->
546 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
547 <require Dvendor="ARM:82" Dname="ARMCM0"/>
548 <require Cclass="CMSIS" Cgroup="CORE"/>
549 </condition>
550
551 <condition id="ARMCM0 CMSIS GCC">
552 <!-- conditions selecting Devices -->
553 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
554 <require condition="ARMCM0 CMSIS"/>
555 <require condition="GCC"/>
556 </condition>
557
558 <condition id="ARMCM0+ CMSIS">
559 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
560 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
561 <require Cclass="CMSIS" Cgroup="CORE"/>
562 </condition>
563
564 <condition id="ARMCM0+ CMSIS GCC">
565 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
566 <require condition="ARMCM0+ CMSIS"/>
567 <require condition="GCC"/>
568 </condition>
569
570 <condition id="ARMCM3 CMSIS">
571 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
572 <require Dvendor="ARM:82" Dname="ARMCM3"/>
573 <require Cclass="CMSIS" Cgroup="CORE"/>
574 </condition>
575
576 <condition id="ARMCM3 CMSIS GCC">
577 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
578 <require condition="ARMCM3 CMSIS"/>
579 <require condition="GCC"/>
580 </condition>
581
582 <condition id="ARMCM4 CMSIS">
583 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
584 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
585 <require Cclass="CMSIS" Cgroup="CORE"/>
586 </condition>
587
588 <condition id="ARMCM4 CMSIS GCC">
589 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
590 <require condition="ARMCM4 CMSIS"/>
591 <require condition="GCC"/>
592 </condition>
593
594 <condition id="ARMCM7 CMSIS">
595 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
596 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
597 <require Cclass="CMSIS" Cgroup="CORE"/>
598 </condition>
599
600 <condition id="ARMCM7 CMSIS GCC">
601 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
602 <require condition="ARMCM7 CMSIS"/>
603 <require condition="GCC"/>
604 </condition>
605
606 <condition id="ARMSC000 CMSIS">
607 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
608 <require Dvendor="ARM:82" Dname="ARMSC000"/>
609 <require Cclass="CMSIS" Cgroup="CORE"/>
610 </condition>
611
612 <condition id="ARMSC000 CMSIS GCC">
613 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
614 <require condition="ARMSC000 CMSIS"/>
615 <require condition="GCC"/>
616 </condition>
617
618 <condition id="ARMSC300 CMSIS">
619 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
620 <require Dvendor="ARM:82" Dname="ARMSC300"/>
621 <require Cclass="CMSIS" Cgroup="CORE"/>
622 </condition>
623
624 <condition id="ARMSC300 CMSIS GCC">
625 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
626 <require condition="ARMSC300 CMSIS"/>
627 <require condition="GCC"/>
628 </condition>
629
630 <condition id="ARMv8MBL CMSIS">
631 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
632 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
633 <require Cclass="CMSIS" Cgroup="CORE"/>
634 </condition>
635
636 <condition id="ARMv8MBL CMSIS GCC">
637 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
638 <require condition="ARMv8MBL CMSIS"/>
639 <require condition="GCC"/>
640 </condition>
641
642 <condition id="ARMv8MML CMSIS">
643 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
644 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
645 <require Cclass="CMSIS" Cgroup="CORE"/>
646 </condition>
647
648 <condition id="ARMv8MML CMSIS GCC">
649 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
650 <require condition="ARMv8MML CMSIS"/>
651 <require condition="GCC"/>
652 </condition>
653
654 <condition id="CMSIS DSP">
655 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
656 <require condition="Cortex-M Device CMSIS Core"/>
657 <accept Tcompiler="GCC"/>
658 <accept Tcompiler="ARMCC"/>
659 <accept Tcompiler="IAR"/>
660 </condition>
661
662 <!-- ARMCC compiler -->
663 <condition id="CM0_LE_ARMCC">
664 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
665 <accept Dcore="Cortex-M0"/>
666 <accept Dcore="Cortex-M0+"/>
667 <accept Dcore="SC000"/>
668 <require Dendian="Little-endian"/>
669 <require Tcompiler="ARMCC"/>
670 </condition>
671
672 <condition id="CM0_BE_ARMCC">
673 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
674 <accept Dcore="Cortex-M0"/>
675 <accept Dcore="Cortex-M0+"/>
676 <accept Dcore="SC000"/>
677 <require Dendian="Big-endian"/>
678 <require Tcompiler="ARMCC"/>
679 </condition>
680
681 <condition id="CM3_LE_ARMCC">
682 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
683 <accept Dcore="Cortex-M3"/>
684 <accept Dcore="SC300"/>
685 <require Dendian="Little-endian"/>
686 <require Tcompiler="ARMCC"/>
687 </condition>
688
689 <condition id="CM3_BE_ARMCC">
690 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
691 <accept Dcore="Cortex-M3"/>
692 <accept Dcore="SC300"/>
693 <require Dendian="Big-endian"/>
694 <require Tcompiler="ARMCC"/>
695 </condition>
696
697 <condition id="CM4_LE_ARMCC">
698 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
699 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
700 <require Tcompiler="ARMCC"/>
701 </condition>
702
703 <condition id="CM4_BE_ARMCC">
704 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
705 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
706 <require Tcompiler="ARMCC"/>
707 </condition>
708
709 <condition id="CM4F_LE_ARMCC">
710 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
711 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
712 <require Tcompiler="ARMCC"/>
713 </condition>
714
715 <condition id="CM4F_BE_ARMCC">
716 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
717 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
718 <require Tcompiler="ARMCC"/>
719 </condition>
720
721 <!-- XMC 4000 Series devices from Infineon require a special library -->
722 <condition id="CM4_LE_ARMCC_STD">
723 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
724 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
725 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728 <condition id="CM4_LE_ARMCC_IFX">
729 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
730 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
731 <require Tcompiler="ARMCC"/>
732 </condition>
733 <condition id="CM4F_LE_ARMCC_STD">
734 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
735 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
736 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
737 <require Tcompiler="ARMCC"/>
738 </condition>
739 <condition id="CM4F_LE_ARMCC_IFX">
740 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
741 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
742 <require Tcompiler="ARMCC"/>
743 </condition>
744
745 <condition id="CM7_LE_ARMCC">
746 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
747 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750
751 <condition id="CM7_BE_ARMCC">
752 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
753 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
754 <require Tcompiler="ARMCC"/>
755 </condition>
756
757 <condition id="CM7F_LE_ARMCC">
758 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
759 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
760 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
761 <require Tcompiler="ARMCC"/>
762 </condition>
763
764 <condition id="CM7F_BE_ARMCC">
765 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
766 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
767 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
768 <require Tcompiler="ARMCC"/>
769 </condition>
770
771 <condition id="CM7FSP_LE_ARMCC">
772 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
773 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
774 <require Tcompiler="ARMCC"/>
775 </condition>
776
777 <condition id="CM7FSP_BE_ARMCC">
778 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
779 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
780 <require Tcompiler="ARMCC"/>
781 </condition>
782
783 <condition id="CM7FDP_LE_ARMCC">
784 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
785 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
786 <require Tcompiler="ARMCC"/>
787 </condition>
788
789 <condition id="CM7FDP_BE_ARMCC">
790 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
791 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
792 <require Tcompiler="ARMCC"/>
793 </condition>
794
795 <!-- GCC compiler -->
796 <condition id="CM0_LE_GCC">
797 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
798 <accept Dcore="Cortex-M0"/>
799 <accept Dcore="Cortex-M0+"/>
800 <accept Dcore="SC000"/>
801 <require Dendian="Little-endian"/>
802 <require Tcompiler="GCC"/>
803 </condition>
804
805 <condition id="CM0_BE_GCC">
806 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
807 <accept Dcore="Cortex-M0"/>
808 <accept Dcore="Cortex-M0+"/>
809 <accept Dcore="SC000"/>
810 <require Dendian="Big-endian"/>
811 <require Tcompiler="GCC"/>
812 </condition>
813
814 <condition id="CM3_LE_GCC">
815 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
816 <accept Dcore="Cortex-M3"/>
817 <accept Dcore="SC300"/>
818 <require Dendian="Little-endian"/>
819 <require Tcompiler="GCC"/>
820 </condition>
821
822 <condition id="CM3_BE_GCC">
823 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
824 <accept Dcore="Cortex-M3"/>
825 <accept Dcore="SC300"/>
826 <require Dendian="Big-endian"/>
827 <require Tcompiler="GCC"/>
828 </condition>
829
830 <condition id="CM4_LE_GCC">
831 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
832 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
833 <require Tcompiler="GCC"/>
834 </condition>
835
836 <condition id="CM4_BE_GCC">
837 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
838 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
839 <require Tcompiler="GCC"/>
840 </condition>
841
842 <condition id="CM4F_LE_GCC">
843 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
844 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
845 <require Tcompiler="GCC"/>
846 </condition>
847
848 <condition id="CM4F_BE_GCC">
849 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
850 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
851 <require Tcompiler="GCC"/>
852 </condition>
853
854 <!-- XMC 4000 Series devices from Infineon require a special library -->
855 <condition id="CM4_LE_GCC_STD">
856 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
857 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
858 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
859 <require Tcompiler="GCC"/>
860 </condition>
861 <condition id="CM4_LE_GCC_IFX">
862 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
863 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
864 <require Tcompiler="GCC"/>
865 </condition>
866 <condition id="CM4F_LE_GCC_STD">
867 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
868 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
869 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
870 <require Tcompiler="GCC"/>
871 </condition>
872 <condition id="CM4F_LE_GCC_IFX">
873 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
874 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
875 <require Tcompiler="GCC"/>
876 </condition>
877
878 <condition id="CM7_LE_GCC">
879 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
880 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
881 <require Tcompiler="GCC"/>
882 </condition>
883
884 <condition id="CM7_BE_GCC">
885 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
886 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
887 <require Tcompiler="GCC"/>
888 </condition>
889
890 <condition id="CM7F_LE_GCC">
891 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
892 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
893 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
894 <require Tcompiler="GCC"/>
895 </condition>
896
897 <condition id="CM7F_BE_GCC">
898 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
899 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
900 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
901 <require Tcompiler="GCC"/>
902 </condition>
903
904 <condition id="CM7FSP_LE_GCC">
905 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
906 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
907 <require Tcompiler="GCC"/>
908 </condition>
909
910 <condition id="CM7FSP_BE_GCC">
911 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
912 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
913 <require Tcompiler="GCC"/>
914 </condition>
915
916 <condition id="CM7FDP_LE_GCC">
917 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
918 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
919 <require Tcompiler="GCC"/>
920 </condition>
921
922 <condition id="CM7FDP_BE_GCC">
923 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
924 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
925 <require Tcompiler="GCC"/>
926 </condition>
927
928 <!-- IAR compiler -->
929 <condition id="CM0_LE_IAR">
930 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
931 <accept Dcore="Cortex-M0"/>
932 <accept Dcore="Cortex-M0+"/>
933 <accept Dcore="SC000"/>
934 <require Dendian="Little-endian"/>
935 <require Tcompiler="IAR"/>
936 </condition>
937
938 <condition id="CM0_BE_IAR">
939 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
940 <accept Dcore="Cortex-M0"/>
941 <accept Dcore="Cortex-M0+"/>
942 <accept Dcore="SC000"/>
943 <require Dendian="Big-endian"/>
944 <require Tcompiler="IAR"/>
945 </condition>
946
947 <condition id="CM3_LE_IAR">
948 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
949 <accept Dcore="Cortex-M3"/>
950 <accept Dcore="SC300"/>
951 <require Dendian="Little-endian"/>
952 <require Tcompiler="IAR"/>
953 </condition>
954
955 <condition id="CM3_BE_IAR">
956 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
957 <accept Dcore="Cortex-M3"/>
958 <accept Dcore="SC300"/>
959 <require Dendian="Big-endian"/>
960 <require Tcompiler="IAR"/>
961 </condition>
962
963 <condition id="CM4_LE_IAR">
964 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
965 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
966 <require Tcompiler="IAR"/>
967 </condition>
968
969 <condition id="CM4_BE_IAR">
970 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
971 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
972 <require Tcompiler="IAR"/>
973 </condition>
974
975 <condition id="CM4F_LE_IAR">
976 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
977 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
978 <require Tcompiler="IAR"/>
979 </condition>
980
981 <condition id="CM4F_BE_IAR">
982 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
983 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
984 <require Tcompiler="IAR"/>
985 </condition>
986
987 <condition id="CM7_LE_IAR">
988 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
989 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
990 <require Tcompiler="IAR"/>
991 </condition>
992
993 <condition id="CM7_BE_IAR">
994 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
995 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
996 <require Tcompiler="IAR"/>
997 </condition>
998
999 <condition id="CM7F_LE_IAR">
1000 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1001 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1002 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1003 <require Tcompiler="IAR"/>
1004 </condition>
1005
1006 <condition id="CM7F_BE_IAR">
1007 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1008 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1009 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1010 <require Tcompiler="IAR"/>
1011 </condition>
1012
1013 <condition id="CM7FSP_LE_IAR">
1014 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1015 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1016 <require Tcompiler="IAR"/>
1017 </condition>
1018
1019 <condition id="CM7FSP_BE_IAR">
1020 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1021 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1022 <require Tcompiler="IAR"/>
1023 </condition>
1024
1025 <condition id="CM7FDP_LE_IAR">
1026 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1027 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1028 <require Tcompiler="IAR"/>
1029 </condition>
1030
1031 <condition id="CM7FDP_BE_IAR">
1032 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1033 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1034 <require Tcompiler="IAR"/>
1035 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame^]1036
1037 <condition id="RTX Dependency">
1038 <description>Components required for RTX</description>
1039 <require condition="Cortex-M Device"/>
1040 <require Cclass="Device" Cgroup="Startup"/>
1041 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5"/>
1042 </condition>
1043
1044 <condition id="RTX5 Dependency">
1045 <description>Components required for RTX5</description>
1046 <require condition="Cortex-M Device"/>
1047 <require Cclass="CMSIS" Cgroup="CORE"/>
1048 <require Cclass="Device" Cgroup="Startup"/>
1049 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
1050 </condition>
1051
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1052 </conditions>
1053
1054 <components>
1055 <!-- CMSIS-Core component -->
1056 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1057 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1058 <files>
1059 <!-- CPU independent -->
1060 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1061 <file category="include" name="CMSIS/Include/"/>
1062 </files>
1063 </component>
1064
1065 <!-- CMSIS-Startup components -->
1066 <!-- Cortex-M0 -->
1067 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1068 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1069 <files>
1070 <!-- include folder / device header file -->
1071 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1072 <!-- startup / system file -->
1073 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1074 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1075 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1076 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1077 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1078 </files>
1079 </component>
1080 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1081 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1082 <files>
1083 <!-- include folder / device header file -->
1084 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1085 <!-- startup / system file -->
1086 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1087 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1088 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1089 </files>
1090 </component>
1091
1092 <!-- Cortex-M0+ -->
1093 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1094 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1095 <files>
1096 <!-- include folder / device header file -->
1097 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1098 <!-- startup / system file -->
1099 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1100 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1101 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1102 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1103 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1104 </files>
1105 </component>
1106 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1107 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1108 <files>
1109 <!-- include folder / device header file -->
1110 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1111 <!-- startup / system file -->
1112 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1113 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1114 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1115 </files>
1116 </component>
1117
1118 <!-- Cortex-M3 -->
1119 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1120 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1121 <files>
1122 <!-- include folder / device header file -->
1123 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1124 <!-- startup / system file -->
1125 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1126 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1127 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1128 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1129 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1130 </files>
1131 </component>
1132 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1133 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1134 <files>
1135 <!-- include folder / device header file -->
1136 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1137 <!-- startup / system file -->
1138 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1139 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1140 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1141 </files>
1142 </component>
1143
1144 <!-- Cortex-M4 -->
1145 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1146 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1147 <files>
1148 <!-- include folder / device header file -->
1149 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1150 <!-- startup / system file -->
1151 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1152 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1153 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1154 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1155 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1156 </files>
1157 </component>
1158 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1159 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1160 <files>
1161 <!-- include folder / device header file -->
1162 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1163 <!-- startup / system file -->
1164 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1165 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1166 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1167 </files>
1168 </component>
1169
1170 <!-- Cortex-M7 -->
1171 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1172 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1173 <files>
1174 <!-- include folder / device header file -->
1175 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1176 <!-- startup / system file -->
1177 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1178 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1179 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1180 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1181 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1182 </files>
1183 </component>
1184 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1185 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1186 <files>
1187 <!-- include folder / device header file -->
1188 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1189 <!-- startup / system file -->
1190 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1191 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1192 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1193 </files>
1194 </component>
1195
1196 <!-- Cortex-SC000 -->
1197 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1198 <description>System and Startup for Generic ARM SC000 device</description>
1199 <files>
1200 <!-- include folder / device header file -->
1201 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1202 <!-- startup / system file -->
1203 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1204 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1205 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1206 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1207 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1208 </files>
1209 </component>
1210 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1211 <description>System and Startup for Generic ARM SC000 device</description>
1212 <files>
1213 <!-- include folder / device header file -->
1214 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1215 <!-- startup / system file -->
1216 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1217 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1218 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1219 </files>
1220 </component>
1221
1222 <!-- Cortex-SC300 -->
1223 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1224 <description>System and Startup for Generic ARM SC300 device</description>
1225 <files>
1226 <!-- include folder / device header file -->
1227 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1228 <!-- startup / system file -->
1229 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1230 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1231 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1232 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1233 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1234 </files>
1235 </component>
1236 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1237 <description>System and Startup for Generic ARM SC300 device</description>
1238 <files>
1239 <!-- include folder / device header file -->
1240 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1241 <!-- startup / system file -->
1242 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1243 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1244 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1245 </files>
1246 </component>
1247
1248 <!-- ARMv8MBL -->
1249 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1250 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1251 <files>
1252 <!-- include folder / device header file -->
1253 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1254 <!-- startup / system file -->
1255 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1256 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1257 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1258 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1259 <!-- SAU configuration -->
1260 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1261 </files>
1262 </component>
1263 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1264 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1265 <files>
1266 <!-- include folder / device header file -->
1267 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1268 <!-- startup / system file -->
1269 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1270 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1271 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1272 </files>
1273 </component>
1274
1275 <!-- ARMv8MML -->
1276 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1277 <description>System and Startup for Generic ARM ARMv8MML device</description>
1278 <files>
1279 <!-- include folder / device header file -->
1280 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1281 <!-- startup / system file -->
1282 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1283 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1284 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1285 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1286 <!-- SAU configuration -->
1287 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1288 </files>
1289 </component>
1290 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1291 <description>System and Startup for Generic ARM ARMv8MML device</description>
1292 <files>
1293 <!-- include folder / device header file -->
1294 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1295 <!-- startup / system file -->
1296 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1297 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1298 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1299 </files>
1300 </component>
1301
1302
1303 <!-- CMSIS-DSP component -->
1304 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1305 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1306 <files>
1307 <!-- CPU independent -->
1308 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1309 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1310 <file category="header" name="CMSIS/Include/arm_math.h"/>
1311 <!-- CPU and Compiler dependent -->
1312 <!-- ARMCC -->
1313 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1314 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1315 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1316 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1317 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1318 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1319 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1320 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1321 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1322 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1323 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1324 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1325 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1326 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1327 <!-- GCC -->
1328 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1329 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1330 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1331 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1332 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1333 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1334 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1335 </files>
1336 </component>
1337
1338 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame^]1339 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTX Dependency">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1340 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1341 <RTE_Components_h>
1342 <!-- the following content goes into file 'RTE_Components.h' -->
1343 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1344 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1345 </RTE_Components_h>
1346 <files>
1347 <!-- CPU independent -->
1348 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1349 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1350 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1351
1352 <!-- RTX templates -->
1353 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1354 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1355 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1356 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1357 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1358 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1359 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1360 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1361 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1362 <!-- tool-chain specific template file -->
1363 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1364 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1365 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1366
1367 <!-- CPU and Compiler dependent -->
1368 <!-- ARMCC -->
1369 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1370 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1371 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1372 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1373 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1374 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1375 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1376 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1377 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1378 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1379 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1380 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1381 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1382 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1383 <!-- GCC -->
1384 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1385 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1386 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1387 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1388 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1389 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1390 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1391 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1392 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1393 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1394 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1395 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1396 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1397 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1398 <!-- IAR -->
1399 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1400 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1401 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1402 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1403 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1404 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1405 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1406 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1407 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1408 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1409 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1410 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1411 </files>
1412 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame^]1413
1414 <!-- CMSIS-RTOS Keil RTX5 component -->
1415 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTX5 Dependency">
1416 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1417 <RTE_Components_h>
1418 <!-- the following content goes into file 'RTE_Components.h' -->
1419 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1420 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1421 </RTE_Components_h>
1422 <files>
1423 <!-- RTX documentation -->
1424 <!-- <file category="doc" name="CMSIS/Documentation/RTOS2/html/_r_t_x_implementation.html"/> -->
1425
1426 <!-- RTX header files -->
1427 <file category="header" name="CMSIS/RTOS2/RTX/Include/cmsis_os.h"/>
1428 <file category="header" name="CMSIS/RTOS2/RTX/Include/cmsis_os2.h"/>
1429 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1430
1431 <!-- RTX configuration -->
1432 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1433
1434 <!-- RTX templates -->
1435 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1436 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1437
1438 <!-- RTX compatibility module for API V1 -->
1439 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1440
1441 <!-- RTX libraries (CPU and Compiler dependent) -->
1442 <!-- ARMCC -->
1443 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1444 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1445 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1446 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1447 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1448 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1449 <!-- GCC -->
1450 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1451 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1452 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1453 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1454 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1455 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1456 </files>
1457 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1458 </components>
1459
1460 <boards>
1461 <board name="uVision Simulator" vendor="Keil">
1462 <description>uVision Simulator</description>
1463 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1464 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1465 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1466 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1467 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1468 </board>
1469 </boards>
1470
1471 <examples>
1472 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1473 <description>DSP_Lib Class Marks example</description>
1474 <board name="uVision Simulator" vendor="Keil"/>
1475 <project>
1476 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1477 </project>
1478 <attributes>
1479 <component Cclass="CMSIS" Cgroup="CORE"/>
1480 <component Cclass="CMSIS" Cgroup="DSP"/>
1481 <component Cclass="Device" Cgroup="Startup"/>
1482 <category>Getting Started</category>
1483 </attributes>
1484 </example>
1485
1486 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1487 <description>DSP_Lib Convolution example</description>
1488 <board name="uVision Simulator" vendor="Keil"/>
1489 <project>
1490 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1491 </project>
1492 <attributes>
1493 <component Cclass="CMSIS" Cgroup="CORE"/>
1494 <component Cclass="CMSIS" Cgroup="DSP"/>
1495 <component Cclass="Device" Cgroup="Startup"/>
1496 <category>Getting Started</category>
1497 </attributes>
1498 </example>
1499
1500 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1501 <description>DSP_Lib Dotproduct example</description>
1502 <board name="uVision Simulator" vendor="Keil"/>
1503 <project>
1504 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1505 </project>
1506 <attributes>
1507 <component Cclass="CMSIS" Cgroup="CORE"/>
1508 <component Cclass="CMSIS" Cgroup="DSP"/>
1509 <component Cclass="Device" Cgroup="Startup"/>
1510 <category>Getting Started</category>
1511 </attributes>
1512 </example>
1513
1514 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1515 <description>DSP_Lib FFT Bin example</description>
1516 <board name="uVision Simulator" vendor="Keil"/>
1517 <project>
1518 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1519 </project>
1520 <attributes>
1521 <component Cclass="CMSIS" Cgroup="CORE"/>
1522 <component Cclass="CMSIS" Cgroup="DSP"/>
1523 <component Cclass="Device" Cgroup="Startup"/>
1524 <category>Getting Started</category>
1525 </attributes>
1526 </example>
1527
1528 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1529 <description>DSP_Lib FIR example</description>
1530 <board name="uVision Simulator" vendor="Keil"/>
1531 <project>
1532 <environment name="uv" load="arm_fir_example.uvprojx"/>
1533 </project>
1534 <attributes>
1535 <component Cclass="CMSIS" Cgroup="CORE"/>
1536 <component Cclass="CMSIS" Cgroup="DSP"/>
1537 <component Cclass="Device" Cgroup="Startup"/>
1538 <category>Getting Started</category>
1539 </attributes>
1540 </example>
1541
1542 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1543 <description>DSP_Lib Graphic Equalizer example</description>
1544 <board name="uVision Simulator" vendor="Keil"/>
1545 <project>
1546 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1547 </project>
1548 <attributes>
1549 <component Cclass="CMSIS" Cgroup="CORE"/>
1550 <component Cclass="CMSIS" Cgroup="DSP"/>
1551 <component Cclass="Device" Cgroup="Startup"/>
1552 <category>Getting Started</category>
1553 </attributes>
1554 </example>
1555
1556 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1557 <description>DSP_Lib Linear Interpolation example</description>
1558 <board name="uVision Simulator" vendor="Keil"/>
1559 <project>
1560 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1561 </project>
1562 <attributes>
1563 <component Cclass="CMSIS" Cgroup="CORE"/>
1564 <component Cclass="CMSIS" Cgroup="DSP"/>
1565 <component Cclass="Device" Cgroup="Startup"/>
1566 <category>Getting Started</category>
1567 </attributes>
1568 </example>
1569
1570 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1571 <description>DSP_Lib Matrix example</description>
1572 <board name="uVision Simulator" vendor="Keil"/>
1573 <project>
1574 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1575 </project>
1576 <attributes>
1577 <component Cclass="CMSIS" Cgroup="CORE"/>
1578 <component Cclass="CMSIS" Cgroup="DSP"/>
1579 <component Cclass="Device" Cgroup="Startup"/>
1580 <category>Getting Started</category>
1581 </attributes>
1582 </example>
1583
1584 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1585 <description>DSP_Lib Signal Convergence example</description>
1586 <board name="uVision Simulator" vendor="Keil"/>
1587 <project>
1588 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1589 </project>
1590 <attributes>
1591 <component Cclass="CMSIS" Cgroup="CORE"/>
1592 <component Cclass="CMSIS" Cgroup="DSP"/>
1593 <component Cclass="Device" Cgroup="Startup"/>
1594 <category>Getting Started</category>
1595 </attributes>
1596 </example>
1597
1598 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1599 <description>DSP_Lib Sinus/Cosinus example</description>
1600 <board name="uVision Simulator" vendor="Keil"/>
1601 <project>
1602 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1603 </project>
1604 <attributes>
1605 <component Cclass="CMSIS" Cgroup="CORE"/>
1606 <component Cclass="CMSIS" Cgroup="DSP"/>
1607 <component Cclass="Device" Cgroup="Startup"/>
1608 <category>Getting Started</category>
1609 </attributes>
1610 </example>
1611
1612 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1613 <description>DSP_Lib Variance example</description>
1614 <board name="uVision Simulator" vendor="Keil"/>
1615 <project>
1616 <environment name="uv" load="arm_variance_example.uvprojx"/>
1617 </project>
1618 <attributes>
1619 <component Cclass="CMSIS" Cgroup="CORE"/>
1620 <component Cclass="CMSIS" Cgroup="DSP"/>
1621 <component Cclass="Device" Cgroup="Startup"/>
1622 <category>Getting Started</category>
1623 </attributes>
1624 </example>
1625 </examples>
1626
1627</package>