blob: b963aaa394ea554b06c691195b5a44091e43e1f1 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +02001<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +020010 <releases>
Martin Günther10babd82016-06-14 14:10:36 +020011 <release version="5.0.0-Beta5">
12 Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
13 Added DSP libraries build projects to CMSIS pack.
14 </release>
Martin Günther89be6522016-05-13 07:57:31 +020015 <release version="5.0.0-Beta4">
16 Updated ARMv8MML device files.
17 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
18 Updated CMSIS core files.
19 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
20 </release>
21 <release version="5.0.0-Beta3">
22 Updated CMSIS ARMv8M core / device files
23 - increased SAU regions to 8.
24 - moved TZ_SAU_Setup() to partition_#device#.h.
25 </release>
26 <release version="5.0.0-Beta2">
27 - renamed core_*.h to lower case.
28 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
29 - updated ARMv8M?L.svd.
30 </release>
31 <release version="5.0.0-Beta1">
32 - added function SCB_GetFPUType() to all CMSIS cores.
33 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
34 - updated CMSIS core files to V5.0
35 - updated CMSIS Core change log.
36 - updated CMSIS DSP_Lib change log.
37 - updated CMSIS DSP_Lib libraries.
38 </release>
39 <release version="5.0.0-Beta" date="2015-12-15">
40 Added ARMv8M support to CMSIS-Core.
41 - CMSIS-Core 5.0.0 Beta (see revision history for details)
42 - CMSIS-RTOS
43 -- API 1.02 (unchanged)
44 -- RTX 4.81.0 (see revision history for details)
45 - CMSIS-SVD 1.3.2 (see revision history for details)
46 </release>
47 <release version="4.5.0" date="2015-10-28">
48 - CMSIS-Core 4.30.0 (see revision history for details)
49 - CMSIS-DAP 1.1.0 (unchanged)
50 - CMSIS-Driver 2.04.0 (see revision history for details)
51 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
52 - CMSIS-PACK 1.4.1 (see revision history for details)
53 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
54 - CMSIS-SVD 1.3.1 (see revision history for details)
55 </release>
56 <release version="4.4.0" date="2015-09-11">
57 - CMSIS-Core 4.20 (see revision history for details)
58 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
59 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
60 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
61 - CMSIS-RTOS
62 -- API 1.02 (unchanged)
63 -- RTX 4.79 (see revision history for details)
64 - CMSIS-SVD 1.3.0 (see revision history for details)
65 - CMSIS-DAP 1.1.0 (extended with SWO support)
66 </release>
67 <release version="4.3.0" date="2015-03-20">
68 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
69 - CMSIS-DSP 1.4.5 (see revision history for details)
70 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
71 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
72 - CMSIS-RTOS
73 -- API 1.02 (unchanged)
74 -- RTX 4.78 (see revision history for details)
75 - CMSIS-SVD 1.2 (unchanged)
76 </release>
77 <release version="4.2.0" date="2014-09-24">
78 Adding Cortex-M7 support
79 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
80 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
81 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
82 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
83 - CMSIS-RTOS RTX 4.75 (see revision history for details)
84 </release>
85 <release version="4.1.1" date="2014-06-30">
86 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
87 </release>
88 <release version="4.1.0" date="2014-06-12">
89 - CMSIS-Driver 2.02 (incompatible update)
90 - CMSIS-Pack 1.3 (see revision history for details)
91 - CMSIS-DSP 1.4.2 (unchanged)
92 - CMSIS-Core 3.30 (unchanged)
93 - CMSIS-RTOS RTX 4.74 (unchanged)
94 - CMSIS-RTOS API 1.02 (unchanged)
95 - CMSIS-SVD 1.10 (unchanged)
96 PACK:
97 - removed G++ specific files from PACK
98 - added Component Startup variant "C Startup"
99 - added Pack Checking Utility
100 - updated conditions to reflect tool-chain dependency
101 - added Taxonomy for Graphics
102 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
103 </release>
104 <release version="4.0.0">
105 - CMSIS-Driver 2.00 Preliminary (incompatible update)
106 - CMSIS-Pack 1.1 Preliminary
107 - CMSIS-DSP 1.4.2 (see revision history for details)
108 - CMSIS-Core 3.30 (see revision history for details)
109 - CMSIS-RTOS RTX 4.74 (see revision history for details)
110 - CMSIS-RTOS API 1.02 (unchanged)
111 - CMSIS-SVD 1.10 (unchanged)
112 </release>
113 <release version="3.20.4">
114 - CMSIS-RTOS 4.74 (see revision history for details)
115 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
116 </release>
117 <release version="3.20.3">
118 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
119 - CMSIS-RTOS 4.73 (see revision history for details)
120 </release>
121 <release version="3.20.2">
122 - CMSIS-Pack documentation has been added
123 - CMSIS-Drivers header and documentation have been added to PACK
124 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
125 </release>
126 <release version="3.20.1">
127 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
128 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
129 </release>
130 <release version="3.20.0">
131 The software portions that are deployed in the application program are now under a BSD license which allows usage
132 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
133 The individual components have been update as listed below:
134 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
135 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
136 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
137 - CMSIS-SVD is unchanged.
138 </release>
139 </releases>
140
Martin Günther2d0f0e82016-05-17 09:06:12 +0200141 <taxonomy>
142 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
143 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
144 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
145 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
146 <description Cclass="File System">File Drive Support and File System</description>
147 <description Cclass="Graphics">Graphical User Interface</description>
148 <description Cclass="Network">Network Stack using Internet Protocols</description>
149 <description Cclass="USB">Universal Serial Bus Stack</description>
150 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
151 </taxonomy>
152
Martin Günther89be6522016-05-13 07:57:31 +0200153 <devices>
154 <!-- ****************************** Cortex-M0 ****************************** -->
155 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200156 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200157 <description>
158The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
159- simple, easy-to-use programmers model
160- highly efficient ultra-low power operation
161- excellent code density
162- deterministic, high-performance interrupt handling
163- upward compatibility with the rest of the Cortex-M processor family.
164 </description>
165 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
166 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
167 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
168 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
169
170 <device Dname="ARMCM0">
171 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
172 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
173 </device>
174 </family>
175
176 <!-- ****************************** Cortex-M0P ****************************** -->
177 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200178 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200179 <description>
180The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
181- simple, easy-to-use programmers model
182- highly efficient ultra-low power operation
183- excellent code density
184- deterministic, high-performance interrupt handling
185- upward compatibility with the rest of the Cortex-M processor family.
186 </description>
187 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
188 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
189 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
190 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
191
192 <device Dname="ARMCM0P">
193 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
194 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
195 </device>
196 </family>
197
198 <!-- ****************************** Cortex-M3 ****************************** -->
199 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200200 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200201 <description>
202The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
203- simple, easy-to-use programmers model
204- highly efficient ultra-low power operation
205- excellent code density
206- deterministic, high-performance interrupt handling
207- upward compatibility with the rest of the Cortex-M processor family.
208 </description>
209 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
210 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
211 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
212 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
213
214 <device Dname="ARMCM3">
215 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
216 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
217 </device>
218 </family>
219
220 <!-- ****************************** Cortex-M4 ****************************** -->
221 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200222 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200223 <description>
224The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
225- simple, easy-to-use programmers model
226- highly efficient ultra-low power operation
227- excellent code density
228- deterministic, high-performance interrupt handling
229- upward compatibility with the rest of the Cortex-M processor family.
230 </description>
231 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
232 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
233 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
234 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
235
236 <device Dname="ARMCM4">
237 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
238 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
239 </device>
240
241 <device Dname="ARMCM4_FP">
242 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
243 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
244 </device>
245 </family>
246
247 <!-- ****************************** Cortex-M7 ****************************** -->
248 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200249 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200250 <description>
251The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
252- simple, easy-to-use programmers model
253- highly efficient ultra-low power operation
254- excellent code density
255- deterministic, high-performance interrupt handling
256- upward compatibility with the rest of the Cortex-M processor family.
257 </description>
258 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
259 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
260 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
261 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
262
263 <device Dname="ARMCM7">
264 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
265 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
266 </device>
267
268 <device Dname="ARMCM7_SP">
269 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
270 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
271 </device>
272
273 <device Dname="ARMCM7_DP">
274 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
275 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
276 </device>
277 </family>
278
279 <!-- ****************************** ARMSC000 ****************************** -->
280 <family Dfamily="ARM SC000" Dvendor="ARM:82">
281 <description>
282The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
283- simple, easy-to-use programmers model
284- highly efficient ultra-low power operation
285- excellent code density
286- deterministic, high-performance interrupt handling
287 </description>
288 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
289 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
290 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
291 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
292
293 <device Dname="ARMSC000">
294 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
295 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
296 </device>
297 </family>
298
299 <!-- ****************************** ARMSC300 ****************************** -->
300 <family Dfamily="ARM SC300" Dvendor="ARM:82">
301 <description>
302The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
303- simple, easy-to-use programmers model
304- highly efficient ultra-low power operation
305- excellent code density
306- deterministic, high-performance interrupt handling
307 </description>
308 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
309 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
310 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
311 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
312
313 <device Dname="ARMSC300">
314 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
315 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
316 </device>
317 </family>
318
319 <!-- ****************************** ARMv8-M Baseline ********************** -->
320 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
321 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
322 <description>
323The ARMv8MBL processor is brand new.
324 </description>
325 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
326 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
327 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
328 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
329
330 <device Dname="ARMv8MBL">
331 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
332 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
333 </device>
334 </family>
335
336 <!-- ****************************** ARMv8-M Mainline ****************************** -->
337 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
338 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
339 <description>
340The ARMv8MML processor is brand new.
341 </description>
342 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
343 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
344 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
345 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
346
347 <device Dname="ARMv8MML">
348 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
349 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
350 </device>
351
352 <device Dname="ARMv8MML_SP">
353 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
354 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
355 </device>
356
357 <device Dname="ARMv8MML_DP">
358 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
359 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
360 </device>
361 </family>
362
363 </devices>
364
365
366 <apis>
367 <!-- CMSIS-RTOS API -->
368 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
369 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
370 <files>
371 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
372 </files>
373 </api>
374 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
375 <description>USART Driver API for Cortex-M</description>
376 <files>
377 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
378 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
379 </files>
380 </api>
381 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
382 <description>SPI Driver API for Cortex-M</description>
383 <files>
384 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
385 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
386 </files>
387 </api>
388 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
389 <description>SAI Driver API for Cortex-M</description>
390 <files>
391 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
392 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
393 </files>
394 </api>
395 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
396 <description>I2C Driver API for Cortex-M</description>
397 <files>
398 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
399 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
400 </files>
401 </api>
402 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
403 <description>CAN Driver API for Cortex-M</description>
404 <files>
405 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
406 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
407 </files>
408 </api>
409 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
410 <description>Flash Driver API for Cortex-M</description>
411 <files>
412 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
413 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
414 </files>
415 </api>
416 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
417 <description>MCI Driver API for Cortex-M</description>
418 <files>
419 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
420 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
421 </files>
422 </api>
423 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
424 <description>NAND Flash Driver API for Cortex-M</description>
425 <files>
426 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
427 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
428 </files>
429 </api>
430 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
431 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
432 <files>
433 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
434 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
435 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
436 </files>
437 </api>
438 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
439 <description>Ethernet MAC Driver API for Cortex-M</description>
440 <files>
441 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
442 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
446 <description>Ethernet PHY Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
453 <description>USB Device Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
456 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
457 </files>
458 </api>
459 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
460 <description>USB Host Driver API for Cortex-M</description>
461 <files>
462 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
463 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
464 </files>
465 </api>
466 </apis>
467
468 <!-- conditions are dependency rules that can apply to a component or an individual file -->
469 <conditions>
470 <condition id="ARMCC">
471 <require Tcompiler="ARMCC"/>
472 </condition>
473
474 <condition id="GCC">
475 <require Tcompiler="GCC"/>
476 </condition>
477
478 <condition id="IAR">
479 <require Tcompiler="IAR"/>
480 </condition>
481
482 <condition id="ARMCC GCC">
483 <accept Tcompiler="ARMCC"/>
484 <accept Tcompiler="GCC"/>
485 </condition>
486
487 <condition id="Cortex-M Device">
488 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
489 <accept Dcore="Cortex-M0"/>
490 <accept Dcore="Cortex-M0+"/>
491 <accept Dcore="Cortex-M3"/>
492 <accept Dcore="Cortex-M4"/>
493 <accept Dcore="Cortex-M7"/>
494 <accept Dcore="SC000"/>
495 <accept Dcore="SC300"/>
496 </condition>
497
498 <condition id="Cortex-M ARMv8-M Device">
499 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
500 <accept Dcore="Cortex-M0"/>
501 <accept Dcore="Cortex-M0+"/>
502 <accept Dcore="Cortex-M3"/>
503 <accept Dcore="Cortex-M4"/>
504 <accept Dcore="Cortex-M7"/>
505 <accept Dcore="SC000"/>
506 <accept Dcore="SC300"/>
507 <accept Dcore="ARMV8MBL"/>
508 <accept Dcore="ARMV8MML"/>
509 </condition>
510
511 <condition id="Cortex-M Device CMSIS Core">
512 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
513 <require condition="Cortex-M Device"/>
514 <require Cclass="CMSIS" Cgroup="CORE"/>
515 </condition>
516
517 <condition id="Cortex-M Device Startup">
518 <description>Only show for Cortex-M based devices. Depends on Device Startup component.</description>
519 <require condition="Cortex-M Device"/>
520 <require Cclass="Device" Cgroup="Startup"/>
521 </condition>
522
523 <condition id="CMSIS Core">
524 <description>CMSIS CORE processor and device specific Startup files</description>
525 <require Cclass="CMSIS" Cgroup="CORE"/>
526 </condition>
527
528 <condition id="ARMCM0 CMSIS">
529 <!-- conditions selecting Devices -->
530 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
531 <require Dvendor="ARM:82" Dname="ARMCM0"/>
532 <require Cclass="CMSIS" Cgroup="CORE"/>
533 </condition>
534
535 <condition id="ARMCM0 CMSIS GCC">
536 <!-- conditions selecting Devices -->
537 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
538 <require condition="ARMCM0 CMSIS"/>
539 <require condition="GCC"/>
540 </condition>
541
542 <condition id="ARMCM0+ CMSIS">
543 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
544 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
545 <require Cclass="CMSIS" Cgroup="CORE"/>
546 </condition>
547
548 <condition id="ARMCM0+ CMSIS GCC">
549 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
550 <require condition="ARMCM0+ CMSIS"/>
551 <require condition="GCC"/>
552 </condition>
553
554 <condition id="ARMCM3 CMSIS">
555 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
556 <require Dvendor="ARM:82" Dname="ARMCM3"/>
557 <require Cclass="CMSIS" Cgroup="CORE"/>
558 </condition>
559
560 <condition id="ARMCM3 CMSIS GCC">
561 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
562 <require condition="ARMCM3 CMSIS"/>
563 <require condition="GCC"/>
564 </condition>
565
566 <condition id="ARMCM4 CMSIS">
567 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
568 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
569 <require Cclass="CMSIS" Cgroup="CORE"/>
570 </condition>
571
572 <condition id="ARMCM4 CMSIS GCC">
573 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
574 <require condition="ARMCM4 CMSIS"/>
575 <require condition="GCC"/>
576 </condition>
577
578 <condition id="ARMCM7 CMSIS">
579 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
580 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
581 <require Cclass="CMSIS" Cgroup="CORE"/>
582 </condition>
583
584 <condition id="ARMCM7 CMSIS GCC">
585 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
586 <require condition="ARMCM7 CMSIS"/>
587 <require condition="GCC"/>
588 </condition>
589
590 <condition id="ARMSC000 CMSIS">
591 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
592 <require Dvendor="ARM:82" Dname="ARMSC000"/>
593 <require Cclass="CMSIS" Cgroup="CORE"/>
594 </condition>
595
596 <condition id="ARMSC000 CMSIS GCC">
597 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
598 <require condition="ARMSC000 CMSIS"/>
599 <require condition="GCC"/>
600 </condition>
601
602 <condition id="ARMSC300 CMSIS">
603 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
604 <require Dvendor="ARM:82" Dname="ARMSC300"/>
605 <require Cclass="CMSIS" Cgroup="CORE"/>
606 </condition>
607
608 <condition id="ARMSC300 CMSIS GCC">
609 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
610 <require condition="ARMSC300 CMSIS"/>
611 <require condition="GCC"/>
612 </condition>
613
614 <condition id="ARMv8MBL CMSIS">
615 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
616 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
617 <require Cclass="CMSIS" Cgroup="CORE"/>
618 </condition>
619
620 <condition id="ARMv8MBL CMSIS GCC">
621 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
622 <require condition="ARMv8MBL CMSIS"/>
623 <require condition="GCC"/>
624 </condition>
625
626 <condition id="ARMv8MML CMSIS">
627 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
628 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
629 <require Cclass="CMSIS" Cgroup="CORE"/>
630 </condition>
631
632 <condition id="ARMv8MML CMSIS GCC">
633 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
634 <require condition="ARMv8MML CMSIS"/>
635 <require condition="GCC"/>
636 </condition>
637
638 <condition id="CMSIS DSP">
639 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
640 <require condition="Cortex-M Device CMSIS Core"/>
641 <accept Tcompiler="GCC"/>
642 <accept Tcompiler="ARMCC"/>
643 <accept Tcompiler="IAR"/>
644 </condition>
645
646 <!-- ARMCC compiler -->
647 <condition id="CM0_LE_ARMCC">
648 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
649 <accept Dcore="Cortex-M0"/>
650 <accept Dcore="Cortex-M0+"/>
651 <accept Dcore="SC000"/>
652 <require Dendian="Little-endian"/>
653 <require Tcompiler="ARMCC"/>
654 </condition>
655
656 <condition id="CM0_BE_ARMCC">
657 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
658 <accept Dcore="Cortex-M0"/>
659 <accept Dcore="Cortex-M0+"/>
660 <accept Dcore="SC000"/>
661 <require Dendian="Big-endian"/>
662 <require Tcompiler="ARMCC"/>
663 </condition>
664
665 <condition id="CM3_LE_ARMCC">
666 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
667 <accept Dcore="Cortex-M3"/>
668 <accept Dcore="SC300"/>
669 <require Dendian="Little-endian"/>
670 <require Tcompiler="ARMCC"/>
671 </condition>
672
673 <condition id="CM3_BE_ARMCC">
674 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
675 <accept Dcore="Cortex-M3"/>
676 <accept Dcore="SC300"/>
677 <require Dendian="Big-endian"/>
678 <require Tcompiler="ARMCC"/>
679 </condition>
680
681 <condition id="CM4_LE_ARMCC">
682 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
683 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
684 <require Tcompiler="ARMCC"/>
685 </condition>
686
687 <condition id="CM4_BE_ARMCC">
688 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
689 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
690 <require Tcompiler="ARMCC"/>
691 </condition>
692
693 <condition id="CM4F_LE_ARMCC">
694 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
695 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
696 <require Tcompiler="ARMCC"/>
697 </condition>
698
699 <condition id="CM4F_BE_ARMCC">
700 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
701 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
702 <require Tcompiler="ARMCC"/>
703 </condition>
704
705 <!-- XMC 4000 Series devices from Infineon require a special library -->
706 <condition id="CM4_LE_ARMCC_STD">
707 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
708 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
709 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
710 <require Tcompiler="ARMCC"/>
711 </condition>
712 <condition id="CM4_LE_ARMCC_IFX">
713 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
714 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
715 <require Tcompiler="ARMCC"/>
716 </condition>
717 <condition id="CM4F_LE_ARMCC_STD">
718 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
719 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
720 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
721 <require Tcompiler="ARMCC"/>
722 </condition>
723 <condition id="CM4F_LE_ARMCC_IFX">
724 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
725 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728
729 <condition id="CM7_LE_ARMCC">
730 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
731 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
734
735 <condition id="CM7_BE_ARMCC">
736 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
737 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
738 <require Tcompiler="ARMCC"/>
739 </condition>
740
741 <condition id="CM7F_LE_ARMCC">
742 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
743 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
744 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
745 <require Tcompiler="ARMCC"/>
746 </condition>
747
748 <condition id="CM7F_BE_ARMCC">
749 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
750 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
751 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
752 <require Tcompiler="ARMCC"/>
753 </condition>
754
755 <condition id="CM7FSP_LE_ARMCC">
756 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
757 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
758 <require Tcompiler="ARMCC"/>
759 </condition>
760
761 <condition id="CM7FSP_BE_ARMCC">
762 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
763 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
764 <require Tcompiler="ARMCC"/>
765 </condition>
766
767 <condition id="CM7FDP_LE_ARMCC">
768 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
769 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
770 <require Tcompiler="ARMCC"/>
771 </condition>
772
773 <condition id="CM7FDP_BE_ARMCC">
774 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
775 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
776 <require Tcompiler="ARMCC"/>
777 </condition>
778
779 <!-- GCC compiler -->
780 <condition id="CM0_LE_GCC">
781 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
782 <accept Dcore="Cortex-M0"/>
783 <accept Dcore="Cortex-M0+"/>
784 <accept Dcore="SC000"/>
785 <require Dendian="Little-endian"/>
786 <require Tcompiler="GCC"/>
787 </condition>
788
789 <condition id="CM0_BE_GCC">
790 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
791 <accept Dcore="Cortex-M0"/>
792 <accept Dcore="Cortex-M0+"/>
793 <accept Dcore="SC000"/>
794 <require Dendian="Big-endian"/>
795 <require Tcompiler="GCC"/>
796 </condition>
797
798 <condition id="CM3_LE_GCC">
799 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
800 <accept Dcore="Cortex-M3"/>
801 <accept Dcore="SC300"/>
802 <require Dendian="Little-endian"/>
803 <require Tcompiler="GCC"/>
804 </condition>
805
806 <condition id="CM3_BE_GCC">
807 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
808 <accept Dcore="Cortex-M3"/>
809 <accept Dcore="SC300"/>
810 <require Dendian="Big-endian"/>
811 <require Tcompiler="GCC"/>
812 </condition>
813
814 <condition id="CM4_LE_GCC">
815 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
816 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
817 <require Tcompiler="GCC"/>
818 </condition>
819
820 <condition id="CM4_BE_GCC">
821 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
822 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
823 <require Tcompiler="GCC"/>
824 </condition>
825
826 <condition id="CM4F_LE_GCC">
827 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
828 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
829 <require Tcompiler="GCC"/>
830 </condition>
831
832 <condition id="CM4F_BE_GCC">
833 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
834 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
835 <require Tcompiler="GCC"/>
836 </condition>
837
838 <!-- XMC 4000 Series devices from Infineon require a special library -->
839 <condition id="CM4_LE_GCC_STD">
840 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
841 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
842 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
843 <require Tcompiler="GCC"/>
844 </condition>
845 <condition id="CM4_LE_GCC_IFX">
846 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
847 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
848 <require Tcompiler="GCC"/>
849 </condition>
850 <condition id="CM4F_LE_GCC_STD">
851 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
852 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
853 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
854 <require Tcompiler="GCC"/>
855 </condition>
856 <condition id="CM4F_LE_GCC_IFX">
857 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
858 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
859 <require Tcompiler="GCC"/>
860 </condition>
861
862 <condition id="CM7_LE_GCC">
863 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
864 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
865 <require Tcompiler="GCC"/>
866 </condition>
867
868 <condition id="CM7_BE_GCC">
869 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
870 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
871 <require Tcompiler="GCC"/>
872 </condition>
873
874 <condition id="CM7F_LE_GCC">
875 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
876 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
877 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880
881 <condition id="CM7F_BE_GCC">
882 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
883 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
884 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
885 <require Tcompiler="GCC"/>
886 </condition>
887
888 <condition id="CM7FSP_LE_GCC">
889 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
890 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
891 <require Tcompiler="GCC"/>
892 </condition>
893
894 <condition id="CM7FSP_BE_GCC">
895 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
896 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
897 <require Tcompiler="GCC"/>
898 </condition>
899
900 <condition id="CM7FDP_LE_GCC">
901 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
902 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
903 <require Tcompiler="GCC"/>
904 </condition>
905
906 <condition id="CM7FDP_BE_GCC">
907 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
908 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
909 <require Tcompiler="GCC"/>
910 </condition>
911
912 <!-- IAR compiler -->
913 <condition id="CM0_LE_IAR">
914 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
915 <accept Dcore="Cortex-M0"/>
916 <accept Dcore="Cortex-M0+"/>
917 <accept Dcore="SC000"/>
918 <require Dendian="Little-endian"/>
919 <require Tcompiler="IAR"/>
920 </condition>
921
922 <condition id="CM0_BE_IAR">
923 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
924 <accept Dcore="Cortex-M0"/>
925 <accept Dcore="Cortex-M0+"/>
926 <accept Dcore="SC000"/>
927 <require Dendian="Big-endian"/>
928 <require Tcompiler="IAR"/>
929 </condition>
930
931 <condition id="CM3_LE_IAR">
932 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
933 <accept Dcore="Cortex-M3"/>
934 <accept Dcore="SC300"/>
935 <require Dendian="Little-endian"/>
936 <require Tcompiler="IAR"/>
937 </condition>
938
939 <condition id="CM3_BE_IAR">
940 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
941 <accept Dcore="Cortex-M3"/>
942 <accept Dcore="SC300"/>
943 <require Dendian="Big-endian"/>
944 <require Tcompiler="IAR"/>
945 </condition>
946
947 <condition id="CM4_LE_IAR">
948 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
949 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
950 <require Tcompiler="IAR"/>
951 </condition>
952
953 <condition id="CM4_BE_IAR">
954 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
955 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
956 <require Tcompiler="IAR"/>
957 </condition>
958
959 <condition id="CM4F_LE_IAR">
960 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
961 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
962 <require Tcompiler="IAR"/>
963 </condition>
964
965 <condition id="CM4F_BE_IAR">
966 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
967 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
968 <require Tcompiler="IAR"/>
969 </condition>
970
971 <condition id="CM7_LE_IAR">
972 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
973 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
974 <require Tcompiler="IAR"/>
975 </condition>
976
977 <condition id="CM7_BE_IAR">
978 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
979 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
980 <require Tcompiler="IAR"/>
981 </condition>
982
983 <condition id="CM7F_LE_IAR">
984 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
985 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
986 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
987 <require Tcompiler="IAR"/>
988 </condition>
989
990 <condition id="CM7F_BE_IAR">
991 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
992 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
993 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
994 <require Tcompiler="IAR"/>
995 </condition>
996
997 <condition id="CM7FSP_LE_IAR">
998 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
999 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1000 <require Tcompiler="IAR"/>
1001 </condition>
1002
1003 <condition id="CM7FSP_BE_IAR">
1004 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1005 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1006 <require Tcompiler="IAR"/>
1007 </condition>
1008
1009 <condition id="CM7FDP_LE_IAR">
1010 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1011 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1012 <require Tcompiler="IAR"/>
1013 </condition>
1014
1015 <condition id="CM7FDP_BE_IAR">
1016 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1017 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1018 <require Tcompiler="IAR"/>
1019 </condition>
1020 </conditions>
1021
1022 <components>
1023 <!-- CMSIS-Core component -->
1024 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1025 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1026 <files>
1027 <!-- CPU independent -->
1028 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1029 <file category="include" name="CMSIS/Include/"/>
1030 </files>
1031 </component>
1032
1033 <!-- CMSIS-Startup components -->
1034 <!-- Cortex-M0 -->
1035 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1036 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1037 <files>
1038 <!-- include folder / device header file -->
1039 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1040 <!-- startup / system file -->
1041 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1042 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1043 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1044 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1045 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1046 </files>
1047 </component>
1048 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1049 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1050 <files>
1051 <!-- include folder / device header file -->
1052 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1053 <!-- startup / system file -->
1054 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1055 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1056 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1057 </files>
1058 </component>
1059
1060 <!-- Cortex-M0+ -->
1061 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1062 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1063 <files>
1064 <!-- include folder / device header file -->
1065 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1066 <!-- startup / system file -->
1067 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1068 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1069 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1070 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1071 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1072 </files>
1073 </component>
1074 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1075 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1076 <files>
1077 <!-- include folder / device header file -->
1078 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1079 <!-- startup / system file -->
1080 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1081 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1082 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1083 </files>
1084 </component>
1085
1086 <!-- Cortex-M3 -->
1087 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1088 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1089 <files>
1090 <!-- include folder / device header file -->
1091 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1092 <!-- startup / system file -->
1093 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1094 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1095 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1096 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1097 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1098 </files>
1099 </component>
1100 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1101 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1102 <files>
1103 <!-- include folder / device header file -->
1104 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1105 <!-- startup / system file -->
1106 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1107 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1108 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1109 </files>
1110 </component>
1111
1112 <!-- Cortex-M4 -->
1113 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1114 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1115 <files>
1116 <!-- include folder / device header file -->
1117 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1118 <!-- startup / system file -->
1119 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1120 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1121 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1122 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1123 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1124 </files>
1125 </component>
1126 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1127 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1128 <files>
1129 <!-- include folder / device header file -->
1130 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1131 <!-- startup / system file -->
1132 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1133 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1134 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1135 </files>
1136 </component>
1137
1138 <!-- Cortex-M7 -->
1139 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1140 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1141 <files>
1142 <!-- include folder / device header file -->
1143 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1144 <!-- startup / system file -->
1145 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1146 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1147 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1148 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1149 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1150 </files>
1151 </component>
1152 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1153 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1154 <files>
1155 <!-- include folder / device header file -->
1156 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1157 <!-- startup / system file -->
1158 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1159 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1160 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1161 </files>
1162 </component>
1163
1164 <!-- Cortex-SC000 -->
1165 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1166 <description>System and Startup for Generic ARM SC000 device</description>
1167 <files>
1168 <!-- include folder / device header file -->
1169 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1170 <!-- startup / system file -->
1171 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1172 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1173 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1174 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1175 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1176 </files>
1177 </component>
1178 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1179 <description>System and Startup for Generic ARM SC000 device</description>
1180 <files>
1181 <!-- include folder / device header file -->
1182 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1183 <!-- startup / system file -->
1184 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1185 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1186 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1187 </files>
1188 </component>
1189
1190 <!-- Cortex-SC300 -->
1191 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1192 <description>System and Startup for Generic ARM SC300 device</description>
1193 <files>
1194 <!-- include folder / device header file -->
1195 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1196 <!-- startup / system file -->
1197 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1198 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1199 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1200 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1201 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1202 </files>
1203 </component>
1204 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1205 <description>System and Startup for Generic ARM SC300 device</description>
1206 <files>
1207 <!-- include folder / device header file -->
1208 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1209 <!-- startup / system file -->
1210 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1211 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1212 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1213 </files>
1214 </component>
1215
1216 <!-- ARMv8MBL -->
1217 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1218 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1219 <files>
1220 <!-- include folder / device header file -->
1221 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1222 <!-- startup / system file -->
1223 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1224 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1225 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1226 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1227 <!-- SAU configuration -->
1228 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1229 </files>
1230 </component>
1231 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1232 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1233 <files>
1234 <!-- include folder / device header file -->
1235 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1236 <!-- startup / system file -->
1237 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1238 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1239 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1240 </files>
1241 </component>
1242
1243 <!-- ARMv8MML -->
1244 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1245 <description>System and Startup for Generic ARM ARMv8MML device</description>
1246 <files>
1247 <!-- include folder / device header file -->
1248 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1249 <!-- startup / system file -->
1250 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1251 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1252 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1253 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1254 <!-- SAU configuration -->
1255 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1256 </files>
1257 </component>
1258 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1259 <description>System and Startup for Generic ARM ARMv8MML device</description>
1260 <files>
1261 <!-- include folder / device header file -->
1262 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1263 <!-- startup / system file -->
1264 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1265 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1266 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1267 </files>
1268 </component>
1269
1270
1271 <!-- CMSIS-DSP component -->
1272 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1273 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1274 <files>
1275 <!-- CPU independent -->
1276 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1277 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1278 <file category="header" name="CMSIS/Include/arm_math.h"/>
1279 <!-- CPU and Compiler dependent -->
1280 <!-- ARMCC -->
1281 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1282 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1283 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1284 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1285 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1286 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1287 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1288 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1289 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1290 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1291 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1292 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1293 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1294 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1295 <!-- GCC -->
1296 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1297 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1298 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1299 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1300 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1301 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1302 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1303 </files>
1304 </component>
1305
1306 <!-- CMSIS-RTOS Keil RTX component -->
1307 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="Cortex-M Device Startup">
1308 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1309 <RTE_Components_h>
1310 <!-- the following content goes into file 'RTE_Components.h' -->
1311 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1312 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1313 </RTE_Components_h>
1314 <files>
1315 <!-- CPU independent -->
1316 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1317 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1318 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1319
1320 <!-- RTX templates -->
1321 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1322 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1323 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1324 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1325 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1326 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1327 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1328 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1329 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1330 <!-- tool-chain specific template file -->
1331 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1332 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1333 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1334
1335 <!-- CPU and Compiler dependent -->
1336 <!-- ARMCC -->
1337 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1338 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1339 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1340 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1341 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1342 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1343 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1344 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1345 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1346 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1347 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1348 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1349 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1350 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1351 <!-- GCC -->
1352 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1353 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1354 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1355 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1356 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1357 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1358 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1359 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1360 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1361 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1362 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1363 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1364 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1365 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1366 <!-- IAR -->
1367 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1368 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1369 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1370 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1371 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1372 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1373 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1374 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1375 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1376 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1377 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1378 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1379 </files>
1380 </component>
1381 </components>
1382
1383 <boards>
1384 <board name="uVision Simulator" vendor="Keil">
1385 <description>uVision Simulator</description>
1386 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1387 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1388 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1389 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1390 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1391 </board>
1392 </boards>
1393
1394 <examples>
1395 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1396 <description>DSP_Lib Class Marks example</description>
1397 <board name="uVision Simulator" vendor="Keil"/>
1398 <project>
1399 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1400 </project>
1401 <attributes>
1402 <component Cclass="CMSIS" Cgroup="CORE"/>
1403 <component Cclass="CMSIS" Cgroup="DSP"/>
1404 <component Cclass="Device" Cgroup="Startup"/>
1405 <category>Getting Started</category>
1406 </attributes>
1407 </example>
1408
1409 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1410 <description>DSP_Lib Convolution example</description>
1411 <board name="uVision Simulator" vendor="Keil"/>
1412 <project>
1413 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1414 </project>
1415 <attributes>
1416 <component Cclass="CMSIS" Cgroup="CORE"/>
1417 <component Cclass="CMSIS" Cgroup="DSP"/>
1418 <component Cclass="Device" Cgroup="Startup"/>
1419 <category>Getting Started</category>
1420 </attributes>
1421 </example>
1422
1423 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1424 <description>DSP_Lib Dotproduct example</description>
1425 <board name="uVision Simulator" vendor="Keil"/>
1426 <project>
1427 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1428 </project>
1429 <attributes>
1430 <component Cclass="CMSIS" Cgroup="CORE"/>
1431 <component Cclass="CMSIS" Cgroup="DSP"/>
1432 <component Cclass="Device" Cgroup="Startup"/>
1433 <category>Getting Started</category>
1434 </attributes>
1435 </example>
1436
1437 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1438 <description>DSP_Lib FFT Bin example</description>
1439 <board name="uVision Simulator" vendor="Keil"/>
1440 <project>
1441 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1442 </project>
1443 <attributes>
1444 <component Cclass="CMSIS" Cgroup="CORE"/>
1445 <component Cclass="CMSIS" Cgroup="DSP"/>
1446 <component Cclass="Device" Cgroup="Startup"/>
1447 <category>Getting Started</category>
1448 </attributes>
1449 </example>
1450
1451 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1452 <description>DSP_Lib FIR example</description>
1453 <board name="uVision Simulator" vendor="Keil"/>
1454 <project>
1455 <environment name="uv" load="arm_fir_example.uvprojx"/>
1456 </project>
1457 <attributes>
1458 <component Cclass="CMSIS" Cgroup="CORE"/>
1459 <component Cclass="CMSIS" Cgroup="DSP"/>
1460 <component Cclass="Device" Cgroup="Startup"/>
1461 <category>Getting Started</category>
1462 </attributes>
1463 </example>
1464
1465 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1466 <description>DSP_Lib Graphic Equalizer example</description>
1467 <board name="uVision Simulator" vendor="Keil"/>
1468 <project>
1469 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1470 </project>
1471 <attributes>
1472 <component Cclass="CMSIS" Cgroup="CORE"/>
1473 <component Cclass="CMSIS" Cgroup="DSP"/>
1474 <component Cclass="Device" Cgroup="Startup"/>
1475 <category>Getting Started</category>
1476 </attributes>
1477 </example>
1478
1479 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1480 <description>DSP_Lib Linear Interpolation example</description>
1481 <board name="uVision Simulator" vendor="Keil"/>
1482 <project>
1483 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1484 </project>
1485 <attributes>
1486 <component Cclass="CMSIS" Cgroup="CORE"/>
1487 <component Cclass="CMSIS" Cgroup="DSP"/>
1488 <component Cclass="Device" Cgroup="Startup"/>
1489 <category>Getting Started</category>
1490 </attributes>
1491 </example>
1492
1493 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1494 <description>DSP_Lib Matrix example</description>
1495 <board name="uVision Simulator" vendor="Keil"/>
1496 <project>
1497 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1498 </project>
1499 <attributes>
1500 <component Cclass="CMSIS" Cgroup="CORE"/>
1501 <component Cclass="CMSIS" Cgroup="DSP"/>
1502 <component Cclass="Device" Cgroup="Startup"/>
1503 <category>Getting Started</category>
1504 </attributes>
1505 </example>
1506
1507 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1508 <description>DSP_Lib Signal Convergence example</description>
1509 <board name="uVision Simulator" vendor="Keil"/>
1510 <project>
1511 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1512 </project>
1513 <attributes>
1514 <component Cclass="CMSIS" Cgroup="CORE"/>
1515 <component Cclass="CMSIS" Cgroup="DSP"/>
1516 <component Cclass="Device" Cgroup="Startup"/>
1517 <category>Getting Started</category>
1518 </attributes>
1519 </example>
1520
1521 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1522 <description>DSP_Lib Sinus/Cosinus example</description>
1523 <board name="uVision Simulator" vendor="Keil"/>
1524 <project>
1525 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1526 </project>
1527 <attributes>
1528 <component Cclass="CMSIS" Cgroup="CORE"/>
1529 <component Cclass="CMSIS" Cgroup="DSP"/>
1530 <component Cclass="Device" Cgroup="Startup"/>
1531 <category>Getting Started</category>
1532 </attributes>
1533 </example>
1534
1535 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1536 <description>DSP_Lib Variance example</description>
1537 <board name="uVision Simulator" vendor="Keil"/>
1538 <project>
1539 <environment name="uv" load="arm_variance_example.uvprojx"/>
1540 </project>
1541 <attributes>
1542 <component Cclass="CMSIS" Cgroup="CORE"/>
1543 <component Cclass="CMSIS" Cgroup="DSP"/>
1544 <component Cclass="Device" Cgroup="Startup"/>
1545 <category>Getting Started</category>
1546 </attributes>
1547 </example>
1548 </examples>
1549
1550</package>