TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 2e8b8142db48ecc98f9f018dd76bce633368899b / . / ARM.CMSIS.pdsc
blob: 9515fdbf1ab9d50bb22769a2366f4a3c1bf5c483 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Robert Rostoharc9453672016-10-24 11:06:40 +0200[diff] [blame]11 <release version="5.0.0-Beta14">
12 CMSIS-RTOS RTX 4.82 (see revision history for details)
13 </release>
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]14 <release version="5.0.0-Beta13" date="2016-10-21">
15 Interim Beta Release:
16 CMSIS-RTOS2 and RTX implementation:
17 - reworked API based on customer feedback
18 CMSIS-SVD:
19 - reworked SVD format documentation
20 </release>
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]21 <release version="5.0.0-Beta12" date="2016-09-29">
22 Interim Beta Release:
23 CMSIS-RTOS2 and RTX implementation:
24 - added context management API for ARMv8-M TrustZone
25 - added ARMv8-M support (ARMClang, GCC)
26 CMSIS-Core:
27 - Updated documentation
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]28 - Added new file cmsis_compiler.h.
29 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]30 - Reworked compiler specific include files.
31 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]32 - Added __PACKED macro.
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]33 CMSIS-DSP:
34 - updated library projects
35 CMSIS-SVD:
36 - removed SVD file database documentation as SVD files are distributed in packs
37 - updated SVDConv for Win32 and Linux
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]38 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]39 <release version="5.0.0-Beta11">
40 CMSIS_Core:
41 - Added CMSE support to cmsis_gcc.h.
42 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]43 <release version="5.0.0-Beta10">
44 CMSIS-RTOS2:
45 - Added RTX5 component.
46 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]47 <release version="5.0.0-Beta9">
48 CMSIS_Core:
49 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
50 - Reworked SAU register and functions.
51 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]52 <release version="5.0.0-Beta8">
53 CMSIS-RTOS:
54 - API 2.0
55 - RTX 5.0.0-Alpha
56 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]57 <release version="5.0.0-Beta7">
58 CMSIS_Core:
59 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]60 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]61 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]62 <release version="5.0.0-Beta6">
63 CMSIS_Core:
64 - Added SCB_CFSR register bit definitions in core_*.h.
65 - Added NVIC_GetEnableIRQ function in core_*.h.
66 - Updated core instruction macros in cmsis_gcc.h.
67 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]68 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]69 CMSIS_DSP:
70 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
71 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]72 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]73 <release version="5.0.0-Beta4">
74 Updated ARMv8MML device files.
75 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
76 Updated CMSIS core files.
77 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
78 </release>
79 <release version="5.0.0-Beta3">
80 Updated CMSIS ARMv8M core / device files
81 - increased SAU regions to 8.
82 - moved TZ_SAU_Setup() to partition_#device#.h.
83 </release>
84 <release version="5.0.0-Beta2">
85 - renamed core_*.h to lower case.
86 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
87 - updated ARMv8M?L.svd.
88 </release>
89 <release version="5.0.0-Beta1">
90 - added function SCB_GetFPUType() to all CMSIS cores.
91 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
92 - updated CMSIS core files to V5.0
93 - updated CMSIS Core change log.
94 - updated CMSIS DSP_Lib change log.
95 - updated CMSIS DSP_Lib libraries.
96 </release>
97 <release version="5.0.0-Beta" date="2015-12-15">
98 Added ARMv8M support to CMSIS-Core.
99 - CMSIS-Core 5.0.0 Beta (see revision history for details)
100 - CMSIS-RTOS
101 -- API 1.02 (unchanged)
102 -- RTX 4.81.0 (see revision history for details)
103 - CMSIS-SVD 1.3.2 (see revision history for details)
104 </release>
105 <release version="4.5.0" date="2015-10-28">
106 - CMSIS-Core 4.30.0 (see revision history for details)
107 - CMSIS-DAP 1.1.0 (unchanged)
108 - CMSIS-Driver 2.04.0 (see revision history for details)
109 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
110 - CMSIS-PACK 1.4.1 (see revision history for details)
111 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
112 - CMSIS-SVD 1.3.1 (see revision history for details)
113 </release>
114 <release version="4.4.0" date="2015-09-11">
115 - CMSIS-Core 4.20 (see revision history for details)
116 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
117 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
118 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
119 - CMSIS-RTOS
120 -- API 1.02 (unchanged)
121 -- RTX 4.79 (see revision history for details)
122 - CMSIS-SVD 1.3.0 (see revision history for details)
123 - CMSIS-DAP 1.1.0 (extended with SWO support)
124 </release>
125 <release version="4.3.0" date="2015-03-20">
126 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
127 - CMSIS-DSP 1.4.5 (see revision history for details)
128 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
129 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
130 - CMSIS-RTOS
131 -- API 1.02 (unchanged)
132 -- RTX 4.78 (see revision history for details)
133 - CMSIS-SVD 1.2 (unchanged)
134 </release>
135 <release version="4.2.0" date="2014-09-24">
136 Adding Cortex-M7 support
137 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
138 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
139 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
140 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
141 - CMSIS-RTOS RTX 4.75 (see revision history for details)
142 </release>
143 <release version="4.1.1" date="2014-06-30">
144 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
145 </release>
146 <release version="4.1.0" date="2014-06-12">
147 - CMSIS-Driver 2.02 (incompatible update)
148 - CMSIS-Pack 1.3 (see revision history for details)
149 - CMSIS-DSP 1.4.2 (unchanged)
150 - CMSIS-Core 3.30 (unchanged)
151 - CMSIS-RTOS RTX 4.74 (unchanged)
152 - CMSIS-RTOS API 1.02 (unchanged)
153 - CMSIS-SVD 1.10 (unchanged)
154 PACK:
155 - removed G++ specific files from PACK
156 - added Component Startup variant "C Startup"
157 - added Pack Checking Utility
158 - updated conditions to reflect tool-chain dependency
159 - added Taxonomy for Graphics
160 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
161 </release>
162 <release version="4.0.0">
163 - CMSIS-Driver 2.00 Preliminary (incompatible update)
164 - CMSIS-Pack 1.1 Preliminary
165 - CMSIS-DSP 1.4.2 (see revision history for details)
166 - CMSIS-Core 3.30 (see revision history for details)
167 - CMSIS-RTOS RTX 4.74 (see revision history for details)
168 - CMSIS-RTOS API 1.02 (unchanged)
169 - CMSIS-SVD 1.10 (unchanged)
170 </release>
171 <release version="3.20.4">
172 - CMSIS-RTOS 4.74 (see revision history for details)
173 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
174 </release>
175 <release version="3.20.3">
176 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
177 - CMSIS-RTOS 4.73 (see revision history for details)
178 </release>
179 <release version="3.20.2">
180 - CMSIS-Pack documentation has been added
181 - CMSIS-Drivers header and documentation have been added to PACK
182 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
183 </release>
184 <release version="3.20.1">
185 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
186 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
187 </release>
188 <release version="3.20.0">
189 The software portions that are deployed in the application program are now under a BSD license which allows usage
190 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
191 The individual components have been update as listed below:
192 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
193 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
194 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
195 - CMSIS-SVD is unchanged.
196 </release>
197 </releases>
198
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]199 <taxonomy>
200 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
201 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
202 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
203 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
204 <description Cclass="File System">File Drive Support and File System</description>
205 <description Cclass="Graphics">Graphical User Interface</description>
206 <description Cclass="Network">Network Stack using Internet Protocols</description>
207 <description Cclass="USB">Universal Serial Bus Stack</description>
208 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
209 </taxonomy>
210
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]211 <devices>
212 <!-- ****************************** Cortex-M0 ****************************** -->
213 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]214 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]215 <description>
216The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
217- simple, easy-to-use programmers model
218- highly efficient ultra-low power operation
219- excellent code density
220- deterministic, high-performance interrupt handling
221- upward compatibility with the rest of the Cortex-M processor family.
222 </description>
223 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
224 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
225 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
226 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
227
228 <device Dname="ARMCM0">
229 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
230 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
231 </device>
232 </family>
233
234 <!-- ****************************** Cortex-M0P ****************************** -->
235 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]236 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]237 <description>
238The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
239- simple, easy-to-use programmers model
240- highly efficient ultra-low power operation
241- excellent code density
242- deterministic, high-performance interrupt handling
243- upward compatibility with the rest of the Cortex-M processor family.
244 </description>
245 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
246 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
247 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
248 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
249
250 <device Dname="ARMCM0P">
251 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
252 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
253 </device>
254 </family>
255
256 <!-- ****************************** Cortex-M3 ****************************** -->
257 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]258 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]259 <description>
260The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
261- simple, easy-to-use programmers model
262- highly efficient ultra-low power operation
263- excellent code density
264- deterministic, high-performance interrupt handling
265- upward compatibility with the rest of the Cortex-M processor family.
266 </description>
267 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
268 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
269 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
270 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
271
272 <device Dname="ARMCM3">
273 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
274 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
275 </device>
276 </family>
277
278 <!-- ****************************** Cortex-M4 ****************************** -->
279 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]280 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]281 <description>
282The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
283- simple, easy-to-use programmers model
284- highly efficient ultra-low power operation
285- excellent code density
286- deterministic, high-performance interrupt handling
287- upward compatibility with the rest of the Cortex-M processor family.
288 </description>
289 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
290 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
291 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
292 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
293
294 <device Dname="ARMCM4">
295 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
296 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
297 </device>
298
299 <device Dname="ARMCM4_FP">
300 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
301 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
302 </device>
303 </family>
304
305 <!-- ****************************** Cortex-M7 ****************************** -->
306 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]307 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]308 <description>
309The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
310- simple, easy-to-use programmers model
311- highly efficient ultra-low power operation
312- excellent code density
313- deterministic, high-performance interrupt handling
314- upward compatibility with the rest of the Cortex-M processor family.
315 </description>
316 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
317 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
318 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
319 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
320
321 <device Dname="ARMCM7">
322 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
323 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
324 </device>
325
326 <device Dname="ARMCM7_SP">
327 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
328 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
329 </device>
330
331 <device Dname="ARMCM7_DP">
332 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
333 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
334 </device>
335 </family>
336
337 <!-- ****************************** ARMSC000 ****************************** -->
338 <family Dfamily="ARM SC000" Dvendor="ARM:82">
339 <description>
340The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
341- simple, easy-to-use programmers model
342- highly efficient ultra-low power operation
343- excellent code density
344- deterministic, high-performance interrupt handling
345 </description>
346 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
347 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
348 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
349 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
350
351 <device Dname="ARMSC000">
352 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
353 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
354 </device>
355 </family>
356
357 <!-- ****************************** ARMSC300 ****************************** -->
358 <family Dfamily="ARM SC300" Dvendor="ARM:82">
359 <description>
360The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
361- simple, easy-to-use programmers model
362- highly efficient ultra-low power operation
363- excellent code density
364- deterministic, high-performance interrupt handling
365 </description>
366 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
367 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
368 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
369 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
370
371 <device Dname="ARMSC300">
372 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
373 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
374 </device>
375 </family>
376
377 <!-- ****************************** ARMv8-M Baseline ********************** -->
378 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
379 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
380 <description>
381The ARMv8MBL processor is brand new.
382 </description>
383 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
384 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
385 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
386 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
387
388 <device Dname="ARMv8MBL">
389 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
390 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
391 </device>
392 </family>
393
394 <!-- ****************************** ARMv8-M Mainline ****************************** -->
395 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
396 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
397 <description>
398The ARMv8MML processor is brand new.
399 </description>
400 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
401 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
402 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
403 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
404
405 <device Dname="ARMv8MML">
406 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
407 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
408 </device>
409
410 <device Dname="ARMv8MML_SP">
411 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
412 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
413 </device>
414
415 <device Dname="ARMv8MML_DP">
416 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
417 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
418 </device>
419 </family>
420
421 </devices>
422
423
424 <apis>
425 <!-- CMSIS-RTOS API -->
426 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
427 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
428 <files>
429 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
430 </files>
431 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]432 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]433 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
434 <files>
435 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
436 </files>
437 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]438 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
439 <description>USART Driver API for Cortex-M</description>
440 <files>
441 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
442 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
446 <description>SPI Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
453 <description>SAI Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
456 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
457 </files>
458 </api>
459 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
460 <description>I2C Driver API for Cortex-M</description>
461 <files>
462 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
463 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
464 </files>
465 </api>
466 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
467 <description>CAN Driver API for Cortex-M</description>
468 <files>
469 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
470 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
471 </files>
472 </api>
473 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
474 <description>Flash Driver API for Cortex-M</description>
475 <files>
476 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
477 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
478 </files>
479 </api>
480 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
481 <description>MCI Driver API for Cortex-M</description>
482 <files>
483 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
484 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
485 </files>
486 </api>
487 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
488 <description>NAND Flash Driver API for Cortex-M</description>
489 <files>
490 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
491 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
492 </files>
493 </api>
494 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
495 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
496 <files>
497 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
498 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
499 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
500 </files>
501 </api>
502 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
503 <description>Ethernet MAC Driver API for Cortex-M</description>
504 <files>
505 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
506 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
507 </files>
508 </api>
509 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
510 <description>Ethernet PHY Driver API for Cortex-M</description>
511 <files>
512 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
513 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
514 </files>
515 </api>
516 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
517 <description>USB Device Driver API for Cortex-M</description>
518 <files>
519 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
520 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
521 </files>
522 </api>
523 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
524 <description>USB Host Driver API for Cortex-M</description>
525 <files>
526 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
527 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
528 </files>
529 </api>
530 </apis>
531
532 <!-- conditions are dependency rules that can apply to a component or an individual file -->
533 <conditions>
534 <condition id="ARMCC">
535 <require Tcompiler="ARMCC"/>
536 </condition>
537
538 <condition id="GCC">
539 <require Tcompiler="GCC"/>
540 </condition>
541
542 <condition id="IAR">
543 <require Tcompiler="IAR"/>
544 </condition>
545
546 <condition id="ARMCC GCC">
547 <accept Tcompiler="ARMCC"/>
548 <accept Tcompiler="GCC"/>
549 </condition>
550
551 <condition id="Cortex-M Device">
552 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
553 <accept Dcore="Cortex-M0"/>
554 <accept Dcore="Cortex-M0+"/>
555 <accept Dcore="Cortex-M3"/>
556 <accept Dcore="Cortex-M4"/>
557 <accept Dcore="Cortex-M7"/>
558 <accept Dcore="SC000"/>
559 <accept Dcore="SC300"/>
560 </condition>
561
562 <condition id="Cortex-M ARMv8-M Device">
563 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
564 <accept Dcore="Cortex-M0"/>
565 <accept Dcore="Cortex-M0+"/>
566 <accept Dcore="Cortex-M3"/>
567 <accept Dcore="Cortex-M4"/>
568 <accept Dcore="Cortex-M7"/>
569 <accept Dcore="SC000"/>
570 <accept Dcore="SC300"/>
571 <accept Dcore="ARMV8MBL"/>
572 <accept Dcore="ARMV8MML"/>
573 </condition>
574
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame^]575 <condition id="ARMv8-M Device">
576 <description>ARMv8-M architecture based device: ARMv8MBL, ARMv8MML</description>
577 <accept Dcore="ARMV8MBL"/>
578 <accept Dcore="ARMV8MML"/>
579 </condition>
580
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]581 <condition id="Cortex-M Device CMSIS Core">
582 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
583 <require condition="Cortex-M Device"/>
584 <require Cclass="CMSIS" Cgroup="CORE"/>
585 </condition>
586
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]587 <condition id="CMSIS Core">
588 <description>CMSIS CORE processor and device specific Startup files</description>
589 <require Cclass="CMSIS" Cgroup="CORE"/>
590 </condition>
591
592 <condition id="ARMCM0 CMSIS">
593 <!-- conditions selecting Devices -->
594 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
595 <require Dvendor="ARM:82" Dname="ARMCM0"/>
596 <require Cclass="CMSIS" Cgroup="CORE"/>
597 </condition>
598
599 <condition id="ARMCM0 CMSIS GCC">
600 <!-- conditions selecting Devices -->
601 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
602 <require condition="ARMCM0 CMSIS"/>
603 <require condition="GCC"/>
604 </condition>
605
606 <condition id="ARMCM0+ CMSIS">
607 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
608 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
609 <require Cclass="CMSIS" Cgroup="CORE"/>
610 </condition>
611
612 <condition id="ARMCM0+ CMSIS GCC">
613 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
614 <require condition="ARMCM0+ CMSIS"/>
615 <require condition="GCC"/>
616 </condition>
617
618 <condition id="ARMCM3 CMSIS">
619 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
620 <require Dvendor="ARM:82" Dname="ARMCM3"/>
621 <require Cclass="CMSIS" Cgroup="CORE"/>
622 </condition>
623
624 <condition id="ARMCM3 CMSIS GCC">
625 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
626 <require condition="ARMCM3 CMSIS"/>
627 <require condition="GCC"/>
628 </condition>
629
630 <condition id="ARMCM4 CMSIS">
631 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
632 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
633 <require Cclass="CMSIS" Cgroup="CORE"/>
634 </condition>
635
636 <condition id="ARMCM4 CMSIS GCC">
637 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
638 <require condition="ARMCM4 CMSIS"/>
639 <require condition="GCC"/>
640 </condition>
641
642 <condition id="ARMCM7 CMSIS">
643 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
644 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
645 <require Cclass="CMSIS" Cgroup="CORE"/>
646 </condition>
647
648 <condition id="ARMCM7 CMSIS GCC">
649 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
650 <require condition="ARMCM7 CMSIS"/>
651 <require condition="GCC"/>
652 </condition>
653
654 <condition id="ARMSC000 CMSIS">
655 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
656 <require Dvendor="ARM:82" Dname="ARMSC000"/>
657 <require Cclass="CMSIS" Cgroup="CORE"/>
658 </condition>
659
660 <condition id="ARMSC000 CMSIS GCC">
661 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
662 <require condition="ARMSC000 CMSIS"/>
663 <require condition="GCC"/>
664 </condition>
665
666 <condition id="ARMSC300 CMSIS">
667 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
668 <require Dvendor="ARM:82" Dname="ARMSC300"/>
669 <require Cclass="CMSIS" Cgroup="CORE"/>
670 </condition>
671
672 <condition id="ARMSC300 CMSIS GCC">
673 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
674 <require condition="ARMSC300 CMSIS"/>
675 <require condition="GCC"/>
676 </condition>
677
678 <condition id="ARMv8MBL CMSIS">
679 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
680 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
681 <require Cclass="CMSIS" Cgroup="CORE"/>
682 </condition>
683
684 <condition id="ARMv8MBL CMSIS GCC">
685 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
686 <require condition="ARMv8MBL CMSIS"/>
687 <require condition="GCC"/>
688 </condition>
689
690 <condition id="ARMv8MML CMSIS">
691 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
692 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
693 <require Cclass="CMSIS" Cgroup="CORE"/>
694 </condition>
695
696 <condition id="ARMv8MML CMSIS GCC">
697 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
698 <require condition="ARMv8MML CMSIS"/>
699 <require condition="GCC"/>
700 </condition>
701
702 <condition id="CMSIS DSP">
703 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
704 <require condition="Cortex-M Device CMSIS Core"/>
705 <accept Tcompiler="GCC"/>
706 <accept Tcompiler="ARMCC"/>
707 <accept Tcompiler="IAR"/>
708 </condition>
709
710 <!-- ARMCC compiler -->
711 <condition id="CM0_LE_ARMCC">
712 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
713 <accept Dcore="Cortex-M0"/>
714 <accept Dcore="Cortex-M0+"/>
715 <accept Dcore="SC000"/>
716 <require Dendian="Little-endian"/>
717 <require Tcompiler="ARMCC"/>
718 </condition>
719
720 <condition id="CM0_BE_ARMCC">
721 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
722 <accept Dcore="Cortex-M0"/>
723 <accept Dcore="Cortex-M0+"/>
724 <accept Dcore="SC000"/>
725 <require Dendian="Big-endian"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728
729 <condition id="CM3_LE_ARMCC">
730 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
731 <accept Dcore="Cortex-M3"/>
732 <accept Dcore="SC300"/>
733 <require Dendian="Little-endian"/>
734 <require Tcompiler="ARMCC"/>
735 </condition>
736
737 <condition id="CM3_BE_ARMCC">
738 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
739 <accept Dcore="Cortex-M3"/>
740 <accept Dcore="SC300"/>
741 <require Dendian="Big-endian"/>
742 <require Tcompiler="ARMCC"/>
743 </condition>
744
745 <condition id="CM4_LE_ARMCC">
746 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
747 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750
751 <condition id="CM4_BE_ARMCC">
752 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
753 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
754 <require Tcompiler="ARMCC"/>
755 </condition>
756
757 <condition id="CM4F_LE_ARMCC">
758 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
759 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
760 <require Tcompiler="ARMCC"/>
761 </condition>
762
763 <condition id="CM4F_BE_ARMCC">
764 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
765 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
766 <require Tcompiler="ARMCC"/>
767 </condition>
768
769 <!-- XMC 4000 Series devices from Infineon require a special library -->
770 <condition id="CM4_LE_ARMCC_STD">
771 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
772 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
773 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
774 <require Tcompiler="ARMCC"/>
775 </condition>
776 <condition id="CM4_LE_ARMCC_IFX">
777 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
778 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
779 <require Tcompiler="ARMCC"/>
780 </condition>
781 <condition id="CM4F_LE_ARMCC_STD">
782 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
783 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
784 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
785 <require Tcompiler="ARMCC"/>
786 </condition>
787 <condition id="CM4F_LE_ARMCC_IFX">
788 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
789 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
790 <require Tcompiler="ARMCC"/>
791 </condition>
792
793 <condition id="CM7_LE_ARMCC">
794 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
795 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
796 <require Tcompiler="ARMCC"/>
797 </condition>
798
799 <condition id="CM7_BE_ARMCC">
800 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
801 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
802 <require Tcompiler="ARMCC"/>
803 </condition>
804
805 <condition id="CM7F_LE_ARMCC">
806 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
807 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
808 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
809 <require Tcompiler="ARMCC"/>
810 </condition>
811
812 <condition id="CM7F_BE_ARMCC">
813 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
814 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
815 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
816 <require Tcompiler="ARMCC"/>
817 </condition>
818
819 <condition id="CM7FSP_LE_ARMCC">
820 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
821 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
822 <require Tcompiler="ARMCC"/>
823 </condition>
824
825 <condition id="CM7FSP_BE_ARMCC">
826 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
827 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
828 <require Tcompiler="ARMCC"/>
829 </condition>
830
831 <condition id="CM7FDP_LE_ARMCC">
832 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
833 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
834 <require Tcompiler="ARMCC"/>
835 </condition>
836
837 <condition id="CM7FDP_BE_ARMCC">
838 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
839 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
840 <require Tcompiler="ARMCC"/>
841 </condition>
842
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]843 <condition id="ARMv8MBL_LE_ARMCC">
844 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
845 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
846 <require Tcompiler="ARMCC"/>
847 </condition>
848
849 <condition id="ARMv8MML_LE_ARMCC">
850 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
851 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
852 <require Tcompiler="ARMCC"/>
853 </condition>
854
855 <condition id="ARMv8MML_FP_LE_ARMCC">
856 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
857 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
858 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
859 <require Tcompiler="ARMCC"/>
860 </condition>
861
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]862 <!-- GCC compiler -->
863 <condition id="CM0_LE_GCC">
864 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
865 <accept Dcore="Cortex-M0"/>
866 <accept Dcore="Cortex-M0+"/>
867 <accept Dcore="SC000"/>
868 <require Dendian="Little-endian"/>
869 <require Tcompiler="GCC"/>
870 </condition>
871
872 <condition id="CM0_BE_GCC">
873 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
874 <accept Dcore="Cortex-M0"/>
875 <accept Dcore="Cortex-M0+"/>
876 <accept Dcore="SC000"/>
877 <require Dendian="Big-endian"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880
881 <condition id="CM3_LE_GCC">
882 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
883 <accept Dcore="Cortex-M3"/>
884 <accept Dcore="SC300"/>
885 <require Dendian="Little-endian"/>
886 <require Tcompiler="GCC"/>
887 </condition>
888
889 <condition id="CM3_BE_GCC">
890 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
891 <accept Dcore="Cortex-M3"/>
892 <accept Dcore="SC300"/>
893 <require Dendian="Big-endian"/>
894 <require Tcompiler="GCC"/>
895 </condition>
896
897 <condition id="CM4_LE_GCC">
898 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
899 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
900 <require Tcompiler="GCC"/>
901 </condition>
902
903 <condition id="CM4_BE_GCC">
904 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
905 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
906 <require Tcompiler="GCC"/>
907 </condition>
908
909 <condition id="CM4F_LE_GCC">
910 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
911 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
912 <require Tcompiler="GCC"/>
913 </condition>
914
915 <condition id="CM4F_BE_GCC">
916 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
917 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
918 <require Tcompiler="GCC"/>
919 </condition>
920
921 <!-- XMC 4000 Series devices from Infineon require a special library -->
922 <condition id="CM4_LE_GCC_STD">
923 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
924 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
925 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
926 <require Tcompiler="GCC"/>
927 </condition>
928 <condition id="CM4_LE_GCC_IFX">
929 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
930 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
931 <require Tcompiler="GCC"/>
932 </condition>
933 <condition id="CM4F_LE_GCC_STD">
934 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
935 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
936 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
937 <require Tcompiler="GCC"/>
938 </condition>
939 <condition id="CM4F_LE_GCC_IFX">
940 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
941 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
942 <require Tcompiler="GCC"/>
943 </condition>
944
945 <condition id="CM7_LE_GCC">
946 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
947 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
948 <require Tcompiler="GCC"/>
949 </condition>
950
951 <condition id="CM7_BE_GCC">
952 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
953 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
954 <require Tcompiler="GCC"/>
955 </condition>
956
957 <condition id="CM7F_LE_GCC">
958 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
959 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
960 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
961 <require Tcompiler="GCC"/>
962 </condition>
963
964 <condition id="CM7F_BE_GCC">
965 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
966 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
967 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
968 <require Tcompiler="GCC"/>
969 </condition>
970
971 <condition id="CM7FSP_LE_GCC">
972 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
973 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
974 <require Tcompiler="GCC"/>
975 </condition>
976
977 <condition id="CM7FSP_BE_GCC">
978 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
979 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
980 <require Tcompiler="GCC"/>
981 </condition>
982
983 <condition id="CM7FDP_LE_GCC">
984 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
985 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
986 <require Tcompiler="GCC"/>
987 </condition>
988
989 <condition id="CM7FDP_BE_GCC">
990 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
991 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
992 <require Tcompiler="GCC"/>
993 </condition>
994
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]995 <condition id="ARMv8MBL_LE_GCC">
996 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
997 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
998 <require Tcompiler="GCC"/>
999 </condition>
1000
1001 <condition id="ARMv8MML_LE_GCC">
1002 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1003 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
1004 <require Tcompiler="GCC"/>
1005 </condition>
1006
1007 <condition id="ARMv8MML_FP_LE_GCC">
1008 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1009 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
1010 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
1011 <require Tcompiler="GCC"/>
1012 </condition>
1013
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1014 <!-- IAR compiler -->
1015 <condition id="CM0_LE_IAR">
1016 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1017 <accept Dcore="Cortex-M0"/>
1018 <accept Dcore="Cortex-M0+"/>
1019 <accept Dcore="SC000"/>
1020 <require Dendian="Little-endian"/>
1021 <require Tcompiler="IAR"/>
1022 </condition>
1023
1024 <condition id="CM0_BE_IAR">
1025 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1026 <accept Dcore="Cortex-M0"/>
1027 <accept Dcore="Cortex-M0+"/>
1028 <accept Dcore="SC000"/>
1029 <require Dendian="Big-endian"/>
1030 <require Tcompiler="IAR"/>
1031 </condition>
1032
1033 <condition id="CM3_LE_IAR">
1034 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1035 <accept Dcore="Cortex-M3"/>
1036 <accept Dcore="SC300"/>
1037 <require Dendian="Little-endian"/>
1038 <require Tcompiler="IAR"/>
1039 </condition>
1040
1041 <condition id="CM3_BE_IAR">
1042 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1043 <accept Dcore="Cortex-M3"/>
1044 <accept Dcore="SC300"/>
1045 <require Dendian="Big-endian"/>
1046 <require Tcompiler="IAR"/>
1047 </condition>
1048
1049 <condition id="CM4_LE_IAR">
1050 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1051 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1052 <require Tcompiler="IAR"/>
1053 </condition>
1054
1055 <condition id="CM4_BE_IAR">
1056 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1057 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
1058 <require Tcompiler="IAR"/>
1059 </condition>
1060
1061 <condition id="CM4F_LE_IAR">
1062 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1063 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1064 <require Tcompiler="IAR"/>
1065 </condition>
1066
1067 <condition id="CM4F_BE_IAR">
1068 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1069 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
1070 <require Tcompiler="IAR"/>
1071 </condition>
1072
1073 <condition id="CM7_LE_IAR">
1074 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1075 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1076 <require Tcompiler="IAR"/>
1077 </condition>
1078
1079 <condition id="CM7_BE_IAR">
1080 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1081 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1082 <require Tcompiler="IAR"/>
1083 </condition>
1084
1085 <condition id="CM7F_LE_IAR">
1086 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1087 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1088 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1089 <require Tcompiler="IAR"/>
1090 </condition>
1091
1092 <condition id="CM7F_BE_IAR">
1093 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1094 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1095 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1096 <require Tcompiler="IAR"/>
1097 </condition>
1098
1099 <condition id="CM7FSP_LE_IAR">
1100 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1101 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1102 <require Tcompiler="IAR"/>
1103 </condition>
1104
1105 <condition id="CM7FSP_BE_IAR">
1106 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1107 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1108 <require Tcompiler="IAR"/>
1109 </condition>
1110
1111 <condition id="CM7FDP_LE_IAR">
1112 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1113 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1114 <require Tcompiler="IAR"/>
1115 </condition>
1116
1117 <condition id="CM7FDP_BE_IAR">
1118 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1119 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1120 <require Tcompiler="IAR"/>
1121 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1122
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1123 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1124 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1125 <require condition="Cortex-M Device"/>
1126 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1127 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1128 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1129 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1130 <description>Components required for RTOS RTX5</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1131 <require condition="Cortex-M Device"/>
1132 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1133 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1134 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1135 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1136 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1137 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1138 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1139 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1140 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1141 <condition id="RTOS2 RTX5 ARMv8M">
1142 <description>Components required for RTOS2 RTX5 on ARMv8M</description>
1143 <accept Dcore="ARMV8MBL"/>
1144 <accept Dcore="ARMV8MML"/>
1145 <require Cclass="CMSIS" Cgroup="CORE"/>
1146 <require Cclass="Device" Cgroup="Startup"/>
1147 </condition>
1148
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1149 </conditions>
1150
1151 <components>
1152 <!-- CMSIS-Core component -->
1153 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1154 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1155 <files>
1156 <!-- CPU independent -->
1157 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1158 <file category="include" name="CMSIS/Include/"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame^]1159 <!-- Code template -->
1160 <file category="sourceC" attr="template" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="CMSIS-Core 'main' function for ARMv8-M" condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1161 </files>
1162 </component>
1163
1164 <!-- CMSIS-Startup components -->
1165 <!-- Cortex-M0 -->
1166 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1167 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1168 <files>
1169 <!-- include folder / device header file -->
1170 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1171 <!-- startup / system file -->
1172 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1173 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1174 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1175 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1176 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1177 </files>
1178 </component>
1179 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1180 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1181 <files>
1182 <!-- include folder / device header file -->
1183 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1184 <!-- startup / system file -->
1185 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1186 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1187 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1188 </files>
1189 </component>
1190
1191 <!-- Cortex-M0+ -->
1192 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1193 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1194 <files>
1195 <!-- include folder / device header file -->
1196 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1197 <!-- startup / system file -->
1198 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1199 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1200 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1201 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1202 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1203 </files>
1204 </component>
1205 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1206 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1207 <files>
1208 <!-- include folder / device header file -->
1209 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1210 <!-- startup / system file -->
1211 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1212 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1213 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1214 </files>
1215 </component>
1216
1217 <!-- Cortex-M3 -->
1218 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1219 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1220 <files>
1221 <!-- include folder / device header file -->
1222 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1223 <!-- startup / system file -->
1224 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1225 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1226 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1227 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1228 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1229 </files>
1230 </component>
1231 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1232 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1233 <files>
1234 <!-- include folder / device header file -->
1235 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1236 <!-- startup / system file -->
1237 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1238 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1239 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1240 </files>
1241 </component>
1242
1243 <!-- Cortex-M4 -->
1244 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1245 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1246 <files>
1247 <!-- include folder / device header file -->
1248 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1249 <!-- startup / system file -->
1250 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1251 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1252 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1253 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1254 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1255 </files>
1256 </component>
1257 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1258 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1259 <files>
1260 <!-- include folder / device header file -->
1261 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1262 <!-- startup / system file -->
1263 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1264 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1265 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1266 </files>
1267 </component>
1268
1269 <!-- Cortex-M7 -->
1270 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1271 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1272 <files>
1273 <!-- include folder / device header file -->
1274 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1275 <!-- startup / system file -->
1276 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1277 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1278 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1279 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1280 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1281 </files>
1282 </component>
1283 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1284 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1285 <files>
1286 <!-- include folder / device header file -->
1287 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1288 <!-- startup / system file -->
1289 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1290 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1291 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1292 </files>
1293 </component>
1294
1295 <!-- Cortex-SC000 -->
1296 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1297 <description>System and Startup for Generic ARM SC000 device</description>
1298 <files>
1299 <!-- include folder / device header file -->
1300 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1301 <!-- startup / system file -->
1302 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1303 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1304 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1305 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1306 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1307 </files>
1308 </component>
1309 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1310 <description>System and Startup for Generic ARM SC000 device</description>
1311 <files>
1312 <!-- include folder / device header file -->
1313 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1314 <!-- startup / system file -->
1315 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1316 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1317 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1318 </files>
1319 </component>
1320
1321 <!-- Cortex-SC300 -->
1322 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1323 <description>System and Startup for Generic ARM SC300 device</description>
1324 <files>
1325 <!-- include folder / device header file -->
1326 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1327 <!-- startup / system file -->
1328 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1329 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1330 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1331 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1332 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1333 </files>
1334 </component>
1335 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1336 <description>System and Startup for Generic ARM SC300 device</description>
1337 <files>
1338 <!-- include folder / device header file -->
1339 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1340 <!-- startup / system file -->
1341 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1342 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1343 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1344 </files>
1345 </component>
1346
1347 <!-- ARMv8MBL -->
1348 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1349 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1350 <files>
1351 <!-- include folder / device header file -->
1352 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1353 <!-- startup / system file -->
1354 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1355 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1356 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1357 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1358 <!-- SAU configuration -->
1359 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1360 </files>
1361 </component>
1362 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1363 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1364 <files>
1365 <!-- include folder / device header file -->
1366 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1367 <!-- startup / system file -->
1368 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1369 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1370 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1371 </files>
1372 </component>
1373
1374 <!-- ARMv8MML -->
1375 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1376 <description>System and Startup for Generic ARM ARMv8MML device</description>
1377 <files>
1378 <!-- include folder / device header file -->
1379 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1380 <!-- startup / system file -->
1381 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1382 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1383 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1384 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1385 <!-- SAU configuration -->
1386 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1387 </files>
1388 </component>
1389 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1390 <description>System and Startup for Generic ARM ARMv8MML device</description>
1391 <files>
1392 <!-- include folder / device header file -->
1393 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1394 <!-- startup / system file -->
1395 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1396 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1397 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1398 </files>
1399 </component>
1400
1401
1402 <!-- CMSIS-DSP component -->
1403 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1404 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1405 <files>
1406 <!-- CPU independent -->
1407 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1408 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1409 <file category="header" name="CMSIS/Include/arm_math.h"/>
1410 <!-- CPU and Compiler dependent -->
1411 <!-- ARMCC -->
1412 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1413 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1414 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1415 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1416 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1417 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1418 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1419 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1420 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1421 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1422 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1423 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1424 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1425 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1426 <!-- GCC -->
1427 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1428 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1429 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1430 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1431 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1432 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1433 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1434 </files>
1435 </component>
1436
1437 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1438 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1439 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1440 <RTE_Components_h>
1441 <!-- the following content goes into file 'RTE_Components.h' -->
1442 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1443 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1444 </RTE_Components_h>
1445 <files>
1446 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1447 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1448 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1449 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1450
1451 <!-- RTX templates -->
1452 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1453 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1454 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1455 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1456 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1457 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1458 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1459 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1460 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1461 <!-- tool-chain specific template file -->
1462 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1463 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1464 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1465
1466 <!-- CPU and Compiler dependent -->
1467 <!-- ARMCC -->
1468 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1469 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1470 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1471 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1472 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1473 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1474 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1475 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1476 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1477 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1478 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1479 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1480 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1481 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1482 <!-- GCC -->
1483 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1484 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1485 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1486 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1487 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1488 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1489 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1490 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1491 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1492 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1493 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1494 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1495 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1496 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1497 <!-- IAR -->
1498 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1499 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1500 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1501 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1502 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1503 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1504 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1505 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1506 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1507 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1508 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1509 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1510 </files>
1511 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1512
1513 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1514 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1515 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1516 <RTE_Components_h>
1517 <!-- the following content goes into file 'RTE_Components.h' -->
1518 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1519 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1520 </RTE_Components_h>
1521 <files>
1522 <!-- RTX header file -->
1523 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1524 <!-- RTX compatibility module for API V1 -->
1525 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1526 </files>
1527 </component>
1528
1529 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1530 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1531 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1532 <RTE_Components_h>
1533 <!-- the following content goes into file 'RTE_Components.h' -->
1534 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1535 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1536 </RTE_Components_h>
1537 <files>
1538 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1539 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1540
1541 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1542 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1543 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1544
1545 <!-- RTX configuration -->
1546 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1547
1548 <!-- RTX templates -->
1549 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1550 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1551 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1552
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1553 <!-- RTX libraries (CPU and Compiler dependent) -->
1554 <!-- ARMCC -->
1555 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1556 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1557 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1558 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1559 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1560 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1561 <!-- GCC -->
1562 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1563 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1564 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1565 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1566 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1567 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1568 </files>
1569 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1570 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
1571 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M</description>
1572 <RTE_Components_h>
1573 <!-- the following content goes into file 'RTE_Components.h' -->
1574 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1575 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1576 </RTE_Components_h>
1577 <files>
1578 <!-- RTX documentation -->
1579 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1580
1581 <!-- RTX header files -->
1582 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1583 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1584
1585 <!-- RTX configuration -->
1586 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1587
1588 <!-- RTX templates -->
1589 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1590 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1591 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1592
1593 <!-- RTX libraries (CPU and Compiler dependent) -->
1594 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1595 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1596 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1597 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1598 <!-- GCC -->
1599 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1600 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1601 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1602 </files>
1603 </component>
1604 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
Robert Rostoharb240dc82016-09-23 16:46:39 +0200[diff] [blame]1605 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M Non-Secure Domain</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1606 <RTE_Components_h>
1607 <!-- the following content goes into file 'RTE_Components.h' -->
1608 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1609 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1610 </RTE_Components_h>
1611 <files>
1612 <!-- RTX documentation -->
1613 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1614
1615 <!-- RTX header files -->
1616 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1617 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1618
1619 <!-- RTX configuration -->
1620 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1621
1622 <!-- RTX templates -->
1623 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1624 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1625 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1626
1627 <!-- RTX libraries (CPU and Compiler dependent) -->
1628 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1629 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1630 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1631 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1632 <!-- GCC -->
1633 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1634 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1635 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1636 </files>
1637 </component>
1638
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1639 </components>
1640
1641 <boards>
1642 <board name="uVision Simulator" vendor="Keil">
1643 <description>uVision Simulator</description>
1644 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1645 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1646 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1647 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1648 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1649 </board>
1650 </boards>
1651
1652 <examples>
1653 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1654 <description>DSP_Lib Class Marks example</description>
1655 <board name="uVision Simulator" vendor="Keil"/>
1656 <project>
1657 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1658 </project>
1659 <attributes>
1660 <component Cclass="CMSIS" Cgroup="CORE"/>
1661 <component Cclass="CMSIS" Cgroup="DSP"/>
1662 <component Cclass="Device" Cgroup="Startup"/>
1663 <category>Getting Started</category>
1664 </attributes>
1665 </example>
1666
1667 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1668 <description>DSP_Lib Convolution example</description>
1669 <board name="uVision Simulator" vendor="Keil"/>
1670 <project>
1671 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1672 </project>
1673 <attributes>
1674 <component Cclass="CMSIS" Cgroup="CORE"/>
1675 <component Cclass="CMSIS" Cgroup="DSP"/>
1676 <component Cclass="Device" Cgroup="Startup"/>
1677 <category>Getting Started</category>
1678 </attributes>
1679 </example>
1680
1681 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1682 <description>DSP_Lib Dotproduct example</description>
1683 <board name="uVision Simulator" vendor="Keil"/>
1684 <project>
1685 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1686 </project>
1687 <attributes>
1688 <component Cclass="CMSIS" Cgroup="CORE"/>
1689 <component Cclass="CMSIS" Cgroup="DSP"/>
1690 <component Cclass="Device" Cgroup="Startup"/>
1691 <category>Getting Started</category>
1692 </attributes>
1693 </example>
1694
1695 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1696 <description>DSP_Lib FFT Bin example</description>
1697 <board name="uVision Simulator" vendor="Keil"/>
1698 <project>
1699 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1700 </project>
1701 <attributes>
1702 <component Cclass="CMSIS" Cgroup="CORE"/>
1703 <component Cclass="CMSIS" Cgroup="DSP"/>
1704 <component Cclass="Device" Cgroup="Startup"/>
1705 <category>Getting Started</category>
1706 </attributes>
1707 </example>
1708
1709 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1710 <description>DSP_Lib FIR example</description>
1711 <board name="uVision Simulator" vendor="Keil"/>
1712 <project>
1713 <environment name="uv" load="arm_fir_example.uvprojx"/>
1714 </project>
1715 <attributes>
1716 <component Cclass="CMSIS" Cgroup="CORE"/>
1717 <component Cclass="CMSIS" Cgroup="DSP"/>
1718 <component Cclass="Device" Cgroup="Startup"/>
1719 <category>Getting Started</category>
1720 </attributes>
1721 </example>
1722
1723 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1724 <description>DSP_Lib Graphic Equalizer example</description>
1725 <board name="uVision Simulator" vendor="Keil"/>
1726 <project>
1727 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1728 </project>
1729 <attributes>
1730 <component Cclass="CMSIS" Cgroup="CORE"/>
1731 <component Cclass="CMSIS" Cgroup="DSP"/>
1732 <component Cclass="Device" Cgroup="Startup"/>
1733 <category>Getting Started</category>
1734 </attributes>
1735 </example>
1736
1737 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1738 <description>DSP_Lib Linear Interpolation example</description>
1739 <board name="uVision Simulator" vendor="Keil"/>
1740 <project>
1741 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1742 </project>
1743 <attributes>
1744 <component Cclass="CMSIS" Cgroup="CORE"/>
1745 <component Cclass="CMSIS" Cgroup="DSP"/>
1746 <component Cclass="Device" Cgroup="Startup"/>
1747 <category>Getting Started</category>
1748 </attributes>
1749 </example>
1750
1751 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1752 <description>DSP_Lib Matrix example</description>
1753 <board name="uVision Simulator" vendor="Keil"/>
1754 <project>
1755 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1756 </project>
1757 <attributes>
1758 <component Cclass="CMSIS" Cgroup="CORE"/>
1759 <component Cclass="CMSIS" Cgroup="DSP"/>
1760 <component Cclass="Device" Cgroup="Startup"/>
1761 <category>Getting Started</category>
1762 </attributes>
1763 </example>
1764
1765 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1766 <description>DSP_Lib Signal Convergence example</description>
1767 <board name="uVision Simulator" vendor="Keil"/>
1768 <project>
1769 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1770 </project>
1771 <attributes>
1772 <component Cclass="CMSIS" Cgroup="CORE"/>
1773 <component Cclass="CMSIS" Cgroup="DSP"/>
1774 <component Cclass="Device" Cgroup="Startup"/>
1775 <category>Getting Started</category>
1776 </attributes>
1777 </example>
1778
1779 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1780 <description>DSP_Lib Sinus/Cosinus example</description>
1781 <board name="uVision Simulator" vendor="Keil"/>
1782 <project>
1783 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1784 </project>
1785 <attributes>
1786 <component Cclass="CMSIS" Cgroup="CORE"/>
1787 <component Cclass="CMSIS" Cgroup="DSP"/>
1788 <component Cclass="Device" Cgroup="Startup"/>
1789 <category>Getting Started</category>
1790 </attributes>
1791 </example>
1792
1793 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1794 <description>DSP_Lib Variance example</description>
1795 <board name="uVision Simulator" vendor="Keil"/>
1796 <project>
1797 <environment name="uv" load="arm_variance_example.uvprojx"/>
1798 </project>
1799 <attributes>
1800 <component Cclass="CMSIS" Cgroup="CORE"/>
1801 <component Cclass="CMSIS" Cgroup="DSP"/>
1802 <component Cclass="Device" Cgroup="Startup"/>
1803 <category>Getting Started</category>
1804 </attributes>
1805 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1806
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1807 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1808 <description>CMSIS-RTOS2 Blinky example</description>
1809 <board name="uVision Simulator" vendor="Keil"/>
1810 <project>
1811 <environment name="uv" load="Blinky.uvprojx"/>
1812 </project>
1813 <attributes>
1814 <component Cclass="CMSIS" Cgroup="CORE"/>
1815 <component Cclass="CMSIS" Cgroup="RTOS2"/>
1816 <component Cclass="Device" Cgroup="Startup"/>
1817 <category>Getting Started</category>
1818 </attributes>
1819 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1820
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1821 </examples>
1822
1823</package>