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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 0d3990561ea3bfecaeb04a33cee7010a823ce09c / . / ARM.CMSIS.pdsc
blob: 21d638c234b86a3ee36cd82423bafc69f7a3da8d [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame^]11 <release version="5.0.0-Beta13" date="2016-10-21">
12 Interim Beta Release:
13 CMSIS-RTOS2 and RTX implementation:
14 - reworked API based on customer feedback
15 CMSIS-SVD:
16 - reworked SVD format documentation
17 </release>
18
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]19 <release version="5.0.0-Beta12" date="2016-09-29">
20 Interim Beta Release:
21 CMSIS-RTOS2 and RTX implementation:
22 - added context management API for ARMv8-M TrustZone
23 - added ARMv8-M support (ARMClang, GCC)
24 CMSIS-Core:
25 - Updated documentation
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]26 - Added new file cmsis_compiler.h.
27 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]28 - Reworked compiler specific include files.
29 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]30 - Added __PACKED macro.
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]31 CMSIS-DSP:
32 - updated library projects
33 CMSIS-SVD:
34 - removed SVD file database documentation as SVD files are distributed in packs
35 - updated SVDConv for Win32 and Linux
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]36 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]37 <release version="5.0.0-Beta11">
38 CMSIS_Core:
39 - Added CMSE support to cmsis_gcc.h.
40 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]41 <release version="5.0.0-Beta10">
42 CMSIS-RTOS2:
43 - Added RTX5 component.
44 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]45 <release version="5.0.0-Beta9">
46 CMSIS_Core:
47 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
48 - Reworked SAU register and functions.
49 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]50 <release version="5.0.0-Beta8">
51 CMSIS-RTOS:
52 - API 2.0
53 - RTX 5.0.0-Alpha
54 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]55 <release version="5.0.0-Beta7">
56 CMSIS_Core:
57 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]58 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]59 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]60 <release version="5.0.0-Beta6">
61 CMSIS_Core:
62 - Added SCB_CFSR register bit definitions in core_*.h.
63 - Added NVIC_GetEnableIRQ function in core_*.h.
64 - Updated core instruction macros in cmsis_gcc.h.
65 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]66 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]67 CMSIS_DSP:
68 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
69 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]70 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]71 <release version="5.0.0-Beta4">
72 Updated ARMv8MML device files.
73 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
74 Updated CMSIS core files.
75 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
76 </release>
77 <release version="5.0.0-Beta3">
78 Updated CMSIS ARMv8M core / device files
79 - increased SAU regions to 8.
80 - moved TZ_SAU_Setup() to partition_#device#.h.
81 </release>
82 <release version="5.0.0-Beta2">
83 - renamed core_*.h to lower case.
84 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
85 - updated ARMv8M?L.svd.
86 </release>
87 <release version="5.0.0-Beta1">
88 - added function SCB_GetFPUType() to all CMSIS cores.
89 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
90 - updated CMSIS core files to V5.0
91 - updated CMSIS Core change log.
92 - updated CMSIS DSP_Lib change log.
93 - updated CMSIS DSP_Lib libraries.
94 </release>
95 <release version="5.0.0-Beta" date="2015-12-15">
96 Added ARMv8M support to CMSIS-Core.
97 - CMSIS-Core 5.0.0 Beta (see revision history for details)
98 - CMSIS-RTOS
99 -- API 1.02 (unchanged)
100 -- RTX 4.81.0 (see revision history for details)
101 - CMSIS-SVD 1.3.2 (see revision history for details)
102 </release>
103 <release version="4.5.0" date="2015-10-28">
104 - CMSIS-Core 4.30.0 (see revision history for details)
105 - CMSIS-DAP 1.1.0 (unchanged)
106 - CMSIS-Driver 2.04.0 (see revision history for details)
107 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
108 - CMSIS-PACK 1.4.1 (see revision history for details)
109 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
110 - CMSIS-SVD 1.3.1 (see revision history for details)
111 </release>
112 <release version="4.4.0" date="2015-09-11">
113 - CMSIS-Core 4.20 (see revision history for details)
114 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
115 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
116 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
117 - CMSIS-RTOS
118 -- API 1.02 (unchanged)
119 -- RTX 4.79 (see revision history for details)
120 - CMSIS-SVD 1.3.0 (see revision history for details)
121 - CMSIS-DAP 1.1.0 (extended with SWO support)
122 </release>
123 <release version="4.3.0" date="2015-03-20">
124 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
125 - CMSIS-DSP 1.4.5 (see revision history for details)
126 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
127 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
128 - CMSIS-RTOS
129 -- API 1.02 (unchanged)
130 -- RTX 4.78 (see revision history for details)
131 - CMSIS-SVD 1.2 (unchanged)
132 </release>
133 <release version="4.2.0" date="2014-09-24">
134 Adding Cortex-M7 support
135 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
136 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
137 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
138 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
139 - CMSIS-RTOS RTX 4.75 (see revision history for details)
140 </release>
141 <release version="4.1.1" date="2014-06-30">
142 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
143 </release>
144 <release version="4.1.0" date="2014-06-12">
145 - CMSIS-Driver 2.02 (incompatible update)
146 - CMSIS-Pack 1.3 (see revision history for details)
147 - CMSIS-DSP 1.4.2 (unchanged)
148 - CMSIS-Core 3.30 (unchanged)
149 - CMSIS-RTOS RTX 4.74 (unchanged)
150 - CMSIS-RTOS API 1.02 (unchanged)
151 - CMSIS-SVD 1.10 (unchanged)
152 PACK:
153 - removed G++ specific files from PACK
154 - added Component Startup variant "C Startup"
155 - added Pack Checking Utility
156 - updated conditions to reflect tool-chain dependency
157 - added Taxonomy for Graphics
158 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
159 </release>
160 <release version="4.0.0">
161 - CMSIS-Driver 2.00 Preliminary (incompatible update)
162 - CMSIS-Pack 1.1 Preliminary
163 - CMSIS-DSP 1.4.2 (see revision history for details)
164 - CMSIS-Core 3.30 (see revision history for details)
165 - CMSIS-RTOS RTX 4.74 (see revision history for details)
166 - CMSIS-RTOS API 1.02 (unchanged)
167 - CMSIS-SVD 1.10 (unchanged)
168 </release>
169 <release version="3.20.4">
170 - CMSIS-RTOS 4.74 (see revision history for details)
171 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
172 </release>
173 <release version="3.20.3">
174 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
175 - CMSIS-RTOS 4.73 (see revision history for details)
176 </release>
177 <release version="3.20.2">
178 - CMSIS-Pack documentation has been added
179 - CMSIS-Drivers header and documentation have been added to PACK
180 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
181 </release>
182 <release version="3.20.1">
183 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
184 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
185 </release>
186 <release version="3.20.0">
187 The software portions that are deployed in the application program are now under a BSD license which allows usage
188 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
189 The individual components have been update as listed below:
190 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
191 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
192 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
193 - CMSIS-SVD is unchanged.
194 </release>
195 </releases>
196
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]197 <taxonomy>
198 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
199 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
200 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
201 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
202 <description Cclass="File System">File Drive Support and File System</description>
203 <description Cclass="Graphics">Graphical User Interface</description>
204 <description Cclass="Network">Network Stack using Internet Protocols</description>
205 <description Cclass="USB">Universal Serial Bus Stack</description>
206 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
207 </taxonomy>
208
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]209 <devices>
210 <!-- ****************************** Cortex-M0 ****************************** -->
211 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]212 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]213 <description>
214The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
215- simple, easy-to-use programmers model
216- highly efficient ultra-low power operation
217- excellent code density
218- deterministic, high-performance interrupt handling
219- upward compatibility with the rest of the Cortex-M processor family.
220 </description>
221 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
222 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
223 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
224 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
225
226 <device Dname="ARMCM0">
227 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
228 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
229 </device>
230 </family>
231
232 <!-- ****************************** Cortex-M0P ****************************** -->
233 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]234 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]235 <description>
236The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
237- simple, easy-to-use programmers model
238- highly efficient ultra-low power operation
239- excellent code density
240- deterministic, high-performance interrupt handling
241- upward compatibility with the rest of the Cortex-M processor family.
242 </description>
243 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
244 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
245 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
246 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
247
248 <device Dname="ARMCM0P">
249 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
250 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
251 </device>
252 </family>
253
254 <!-- ****************************** Cortex-M3 ****************************** -->
255 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]256 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]257 <description>
258The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
259- simple, easy-to-use programmers model
260- highly efficient ultra-low power operation
261- excellent code density
262- deterministic, high-performance interrupt handling
263- upward compatibility with the rest of the Cortex-M processor family.
264 </description>
265 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
266 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
267 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
268 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
269
270 <device Dname="ARMCM3">
271 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
272 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
273 </device>
274 </family>
275
276 <!-- ****************************** Cortex-M4 ****************************** -->
277 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]278 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]279 <description>
280The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
281- simple, easy-to-use programmers model
282- highly efficient ultra-low power operation
283- excellent code density
284- deterministic, high-performance interrupt handling
285- upward compatibility with the rest of the Cortex-M processor family.
286 </description>
287 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
288 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
289 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
290 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
291
292 <device Dname="ARMCM4">
293 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
294 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
295 </device>
296
297 <device Dname="ARMCM4_FP">
298 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
299 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
300 </device>
301 </family>
302
303 <!-- ****************************** Cortex-M7 ****************************** -->
304 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]305 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]306 <description>
307The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
308- simple, easy-to-use programmers model
309- highly efficient ultra-low power operation
310- excellent code density
311- deterministic, high-performance interrupt handling
312- upward compatibility with the rest of the Cortex-M processor family.
313 </description>
314 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
315 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
316 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
317 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
318
319 <device Dname="ARMCM7">
320 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
321 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
322 </device>
323
324 <device Dname="ARMCM7_SP">
325 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
326 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
327 </device>
328
329 <device Dname="ARMCM7_DP">
330 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
332 </device>
333 </family>
334
335 <!-- ****************************** ARMSC000 ****************************** -->
336 <family Dfamily="ARM SC000" Dvendor="ARM:82">
337 <description>
338The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
339- simple, easy-to-use programmers model
340- highly efficient ultra-low power operation
341- excellent code density
342- deterministic, high-performance interrupt handling
343 </description>
344 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
345 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
346 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
347 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
348
349 <device Dname="ARMSC000">
350 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
351 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
352 </device>
353 </family>
354
355 <!-- ****************************** ARMSC300 ****************************** -->
356 <family Dfamily="ARM SC300" Dvendor="ARM:82">
357 <description>
358The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
359- simple, easy-to-use programmers model
360- highly efficient ultra-low power operation
361- excellent code density
362- deterministic, high-performance interrupt handling
363 </description>
364 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
365 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
366 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
367 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
368
369 <device Dname="ARMSC300">
370 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
371 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
372 </device>
373 </family>
374
375 <!-- ****************************** ARMv8-M Baseline ********************** -->
376 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
377 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
378 <description>
379The ARMv8MBL processor is brand new.
380 </description>
381 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
382 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
383 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
384 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
385
386 <device Dname="ARMv8MBL">
387 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
388 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
389 </device>
390 </family>
391
392 <!-- ****************************** ARMv8-M Mainline ****************************** -->
393 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
394 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
395 <description>
396The ARMv8MML processor is brand new.
397 </description>
398 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
399 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
400 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
401 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
402
403 <device Dname="ARMv8MML">
404 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
405 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
406 </device>
407
408 <device Dname="ARMv8MML_SP">
409 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
410 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
411 </device>
412
413 <device Dname="ARMv8MML_DP">
414 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
415 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
416 </device>
417 </family>
418
419 </devices>
420
421
422 <apis>
423 <!-- CMSIS-RTOS API -->
424 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
425 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
426 <files>
427 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
428 </files>
429 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]430 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]431 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
432 <files>
433 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
434 </files>
435 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]436 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
437 <description>USART Driver API for Cortex-M</description>
438 <files>
439 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
440 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
441 </files>
442 </api>
443 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
444 <description>SPI Driver API for Cortex-M</description>
445 <files>
446 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
447 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
448 </files>
449 </api>
450 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
451 <description>SAI Driver API for Cortex-M</description>
452 <files>
453 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
454 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
455 </files>
456 </api>
457 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
458 <description>I2C Driver API for Cortex-M</description>
459 <files>
460 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
461 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
462 </files>
463 </api>
464 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
465 <description>CAN Driver API for Cortex-M</description>
466 <files>
467 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
468 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
469 </files>
470 </api>
471 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
472 <description>Flash Driver API for Cortex-M</description>
473 <files>
474 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
475 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
476 </files>
477 </api>
478 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
479 <description>MCI Driver API for Cortex-M</description>
480 <files>
481 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
482 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
483 </files>
484 </api>
485 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
486 <description>NAND Flash Driver API for Cortex-M</description>
487 <files>
488 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
489 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
490 </files>
491 </api>
492 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
493 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
494 <files>
495 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
496 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
497 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
498 </files>
499 </api>
500 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
501 <description>Ethernet MAC Driver API for Cortex-M</description>
502 <files>
503 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
504 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
505 </files>
506 </api>
507 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
508 <description>Ethernet PHY Driver API for Cortex-M</description>
509 <files>
510 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
511 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
512 </files>
513 </api>
514 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
515 <description>USB Device Driver API for Cortex-M</description>
516 <files>
517 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
518 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
519 </files>
520 </api>
521 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
522 <description>USB Host Driver API for Cortex-M</description>
523 <files>
524 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
525 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
526 </files>
527 </api>
528 </apis>
529
530 <!-- conditions are dependency rules that can apply to a component or an individual file -->
531 <conditions>
532 <condition id="ARMCC">
533 <require Tcompiler="ARMCC"/>
534 </condition>
535
536 <condition id="GCC">
537 <require Tcompiler="GCC"/>
538 </condition>
539
540 <condition id="IAR">
541 <require Tcompiler="IAR"/>
542 </condition>
543
544 <condition id="ARMCC GCC">
545 <accept Tcompiler="ARMCC"/>
546 <accept Tcompiler="GCC"/>
547 </condition>
548
549 <condition id="Cortex-M Device">
550 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
551 <accept Dcore="Cortex-M0"/>
552 <accept Dcore="Cortex-M0+"/>
553 <accept Dcore="Cortex-M3"/>
554 <accept Dcore="Cortex-M4"/>
555 <accept Dcore="Cortex-M7"/>
556 <accept Dcore="SC000"/>
557 <accept Dcore="SC300"/>
558 </condition>
559
560 <condition id="Cortex-M ARMv8-M Device">
561 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
562 <accept Dcore="Cortex-M0"/>
563 <accept Dcore="Cortex-M0+"/>
564 <accept Dcore="Cortex-M3"/>
565 <accept Dcore="Cortex-M4"/>
566 <accept Dcore="Cortex-M7"/>
567 <accept Dcore="SC000"/>
568 <accept Dcore="SC300"/>
569 <accept Dcore="ARMV8MBL"/>
570 <accept Dcore="ARMV8MML"/>
571 </condition>
572
573 <condition id="Cortex-M Device CMSIS Core">
574 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
575 <require condition="Cortex-M Device"/>
576 <require Cclass="CMSIS" Cgroup="CORE"/>
577 </condition>
578
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]579 <condition id="CMSIS Core">
580 <description>CMSIS CORE processor and device specific Startup files</description>
581 <require Cclass="CMSIS" Cgroup="CORE"/>
582 </condition>
583
584 <condition id="ARMCM0 CMSIS">
585 <!-- conditions selecting Devices -->
586 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
587 <require Dvendor="ARM:82" Dname="ARMCM0"/>
588 <require Cclass="CMSIS" Cgroup="CORE"/>
589 </condition>
590
591 <condition id="ARMCM0 CMSIS GCC">
592 <!-- conditions selecting Devices -->
593 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
594 <require condition="ARMCM0 CMSIS"/>
595 <require condition="GCC"/>
596 </condition>
597
598 <condition id="ARMCM0+ CMSIS">
599 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
600 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
601 <require Cclass="CMSIS" Cgroup="CORE"/>
602 </condition>
603
604 <condition id="ARMCM0+ CMSIS GCC">
605 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
606 <require condition="ARMCM0+ CMSIS"/>
607 <require condition="GCC"/>
608 </condition>
609
610 <condition id="ARMCM3 CMSIS">
611 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
612 <require Dvendor="ARM:82" Dname="ARMCM3"/>
613 <require Cclass="CMSIS" Cgroup="CORE"/>
614 </condition>
615
616 <condition id="ARMCM3 CMSIS GCC">
617 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
618 <require condition="ARMCM3 CMSIS"/>
619 <require condition="GCC"/>
620 </condition>
621
622 <condition id="ARMCM4 CMSIS">
623 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
624 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
625 <require Cclass="CMSIS" Cgroup="CORE"/>
626 </condition>
627
628 <condition id="ARMCM4 CMSIS GCC">
629 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
630 <require condition="ARMCM4 CMSIS"/>
631 <require condition="GCC"/>
632 </condition>
633
634 <condition id="ARMCM7 CMSIS">
635 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
636 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
637 <require Cclass="CMSIS" Cgroup="CORE"/>
638 </condition>
639
640 <condition id="ARMCM7 CMSIS GCC">
641 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
642 <require condition="ARMCM7 CMSIS"/>
643 <require condition="GCC"/>
644 </condition>
645
646 <condition id="ARMSC000 CMSIS">
647 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
648 <require Dvendor="ARM:82" Dname="ARMSC000"/>
649 <require Cclass="CMSIS" Cgroup="CORE"/>
650 </condition>
651
652 <condition id="ARMSC000 CMSIS GCC">
653 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
654 <require condition="ARMSC000 CMSIS"/>
655 <require condition="GCC"/>
656 </condition>
657
658 <condition id="ARMSC300 CMSIS">
659 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
660 <require Dvendor="ARM:82" Dname="ARMSC300"/>
661 <require Cclass="CMSIS" Cgroup="CORE"/>
662 </condition>
663
664 <condition id="ARMSC300 CMSIS GCC">
665 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
666 <require condition="ARMSC300 CMSIS"/>
667 <require condition="GCC"/>
668 </condition>
669
670 <condition id="ARMv8MBL CMSIS">
671 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
672 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
673 <require Cclass="CMSIS" Cgroup="CORE"/>
674 </condition>
675
676 <condition id="ARMv8MBL CMSIS GCC">
677 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
678 <require condition="ARMv8MBL CMSIS"/>
679 <require condition="GCC"/>
680 </condition>
681
682 <condition id="ARMv8MML CMSIS">
683 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
684 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
685 <require Cclass="CMSIS" Cgroup="CORE"/>
686 </condition>
687
688 <condition id="ARMv8MML CMSIS GCC">
689 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
690 <require condition="ARMv8MML CMSIS"/>
691 <require condition="GCC"/>
692 </condition>
693
694 <condition id="CMSIS DSP">
695 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
696 <require condition="Cortex-M Device CMSIS Core"/>
697 <accept Tcompiler="GCC"/>
698 <accept Tcompiler="ARMCC"/>
699 <accept Tcompiler="IAR"/>
700 </condition>
701
702 <!-- ARMCC compiler -->
703 <condition id="CM0_LE_ARMCC">
704 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
705 <accept Dcore="Cortex-M0"/>
706 <accept Dcore="Cortex-M0+"/>
707 <accept Dcore="SC000"/>
708 <require Dendian="Little-endian"/>
709 <require Tcompiler="ARMCC"/>
710 </condition>
711
712 <condition id="CM0_BE_ARMCC">
713 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
714 <accept Dcore="Cortex-M0"/>
715 <accept Dcore="Cortex-M0+"/>
716 <accept Dcore="SC000"/>
717 <require Dendian="Big-endian"/>
718 <require Tcompiler="ARMCC"/>
719 </condition>
720
721 <condition id="CM3_LE_ARMCC">
722 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
723 <accept Dcore="Cortex-M3"/>
724 <accept Dcore="SC300"/>
725 <require Dendian="Little-endian"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728
729 <condition id="CM3_BE_ARMCC">
730 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
731 <accept Dcore="Cortex-M3"/>
732 <accept Dcore="SC300"/>
733 <require Dendian="Big-endian"/>
734 <require Tcompiler="ARMCC"/>
735 </condition>
736
737 <condition id="CM4_LE_ARMCC">
738 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
739 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
740 <require Tcompiler="ARMCC"/>
741 </condition>
742
743 <condition id="CM4_BE_ARMCC">
744 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
745 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
746 <require Tcompiler="ARMCC"/>
747 </condition>
748
749 <condition id="CM4F_LE_ARMCC">
750 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
751 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
752 <require Tcompiler="ARMCC"/>
753 </condition>
754
755 <condition id="CM4F_BE_ARMCC">
756 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
757 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
758 <require Tcompiler="ARMCC"/>
759 </condition>
760
761 <!-- XMC 4000 Series devices from Infineon require a special library -->
762 <condition id="CM4_LE_ARMCC_STD">
763 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
764 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
765 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
766 <require Tcompiler="ARMCC"/>
767 </condition>
768 <condition id="CM4_LE_ARMCC_IFX">
769 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
770 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
771 <require Tcompiler="ARMCC"/>
772 </condition>
773 <condition id="CM4F_LE_ARMCC_STD">
774 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
775 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
776 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
777 <require Tcompiler="ARMCC"/>
778 </condition>
779 <condition id="CM4F_LE_ARMCC_IFX">
780 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
781 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
782 <require Tcompiler="ARMCC"/>
783 </condition>
784
785 <condition id="CM7_LE_ARMCC">
786 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
787 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
788 <require Tcompiler="ARMCC"/>
789 </condition>
790
791 <condition id="CM7_BE_ARMCC">
792 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
793 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
794 <require Tcompiler="ARMCC"/>
795 </condition>
796
797 <condition id="CM7F_LE_ARMCC">
798 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
799 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
800 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
801 <require Tcompiler="ARMCC"/>
802 </condition>
803
804 <condition id="CM7F_BE_ARMCC">
805 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
806 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
807 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
808 <require Tcompiler="ARMCC"/>
809 </condition>
810
811 <condition id="CM7FSP_LE_ARMCC">
812 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
813 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
814 <require Tcompiler="ARMCC"/>
815 </condition>
816
817 <condition id="CM7FSP_BE_ARMCC">
818 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
819 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
820 <require Tcompiler="ARMCC"/>
821 </condition>
822
823 <condition id="CM7FDP_LE_ARMCC">
824 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
825 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
826 <require Tcompiler="ARMCC"/>
827 </condition>
828
829 <condition id="CM7FDP_BE_ARMCC">
830 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
831 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
832 <require Tcompiler="ARMCC"/>
833 </condition>
834
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]835 <condition id="ARMv8MBL_LE_ARMCC">
836 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
837 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
838 <require Tcompiler="ARMCC"/>
839 </condition>
840
841 <condition id="ARMv8MML_LE_ARMCC">
842 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
843 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
844 <require Tcompiler="ARMCC"/>
845 </condition>
846
847 <condition id="ARMv8MML_FP_LE_ARMCC">
848 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
849 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
850 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
851 <require Tcompiler="ARMCC"/>
852 </condition>
853
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]854 <!-- GCC compiler -->
855 <condition id="CM0_LE_GCC">
856 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
857 <accept Dcore="Cortex-M0"/>
858 <accept Dcore="Cortex-M0+"/>
859 <accept Dcore="SC000"/>
860 <require Dendian="Little-endian"/>
861 <require Tcompiler="GCC"/>
862 </condition>
863
864 <condition id="CM0_BE_GCC">
865 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
866 <accept Dcore="Cortex-M0"/>
867 <accept Dcore="Cortex-M0+"/>
868 <accept Dcore="SC000"/>
869 <require Dendian="Big-endian"/>
870 <require Tcompiler="GCC"/>
871 </condition>
872
873 <condition id="CM3_LE_GCC">
874 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
875 <accept Dcore="Cortex-M3"/>
876 <accept Dcore="SC300"/>
877 <require Dendian="Little-endian"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880
881 <condition id="CM3_BE_GCC">
882 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
883 <accept Dcore="Cortex-M3"/>
884 <accept Dcore="SC300"/>
885 <require Dendian="Big-endian"/>
886 <require Tcompiler="GCC"/>
887 </condition>
888
889 <condition id="CM4_LE_GCC">
890 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
891 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
892 <require Tcompiler="GCC"/>
893 </condition>
894
895 <condition id="CM4_BE_GCC">
896 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
897 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
898 <require Tcompiler="GCC"/>
899 </condition>
900
901 <condition id="CM4F_LE_GCC">
902 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
903 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
904 <require Tcompiler="GCC"/>
905 </condition>
906
907 <condition id="CM4F_BE_GCC">
908 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
909 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
910 <require Tcompiler="GCC"/>
911 </condition>
912
913 <!-- XMC 4000 Series devices from Infineon require a special library -->
914 <condition id="CM4_LE_GCC_STD">
915 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
916 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
917 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
918 <require Tcompiler="GCC"/>
919 </condition>
920 <condition id="CM4_LE_GCC_IFX">
921 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
922 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
923 <require Tcompiler="GCC"/>
924 </condition>
925 <condition id="CM4F_LE_GCC_STD">
926 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
927 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
928 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
929 <require Tcompiler="GCC"/>
930 </condition>
931 <condition id="CM4F_LE_GCC_IFX">
932 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
933 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
934 <require Tcompiler="GCC"/>
935 </condition>
936
937 <condition id="CM7_LE_GCC">
938 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
939 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
940 <require Tcompiler="GCC"/>
941 </condition>
942
943 <condition id="CM7_BE_GCC">
944 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
945 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
946 <require Tcompiler="GCC"/>
947 </condition>
948
949 <condition id="CM7F_LE_GCC">
950 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
951 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
952 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
953 <require Tcompiler="GCC"/>
954 </condition>
955
956 <condition id="CM7F_BE_GCC">
957 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
958 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
959 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
960 <require Tcompiler="GCC"/>
961 </condition>
962
963 <condition id="CM7FSP_LE_GCC">
964 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
965 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
966 <require Tcompiler="GCC"/>
967 </condition>
968
969 <condition id="CM7FSP_BE_GCC">
970 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
971 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
972 <require Tcompiler="GCC"/>
973 </condition>
974
975 <condition id="CM7FDP_LE_GCC">
976 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
977 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
978 <require Tcompiler="GCC"/>
979 </condition>
980
981 <condition id="CM7FDP_BE_GCC">
982 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
983 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
984 <require Tcompiler="GCC"/>
985 </condition>
986
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]987 <condition id="ARMv8MBL_LE_GCC">
988 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
989 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
990 <require Tcompiler="GCC"/>
991 </condition>
992
993 <condition id="ARMv8MML_LE_GCC">
994 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
995 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
996 <require Tcompiler="GCC"/>
997 </condition>
998
999 <condition id="ARMv8MML_FP_LE_GCC">
1000 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1001 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
1002 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
1003 <require Tcompiler="GCC"/>
1004 </condition>
1005
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1006 <!-- IAR compiler -->
1007 <condition id="CM0_LE_IAR">
1008 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1009 <accept Dcore="Cortex-M0"/>
1010 <accept Dcore="Cortex-M0+"/>
1011 <accept Dcore="SC000"/>
1012 <require Dendian="Little-endian"/>
1013 <require Tcompiler="IAR"/>
1014 </condition>
1015
1016 <condition id="CM0_BE_IAR">
1017 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1018 <accept Dcore="Cortex-M0"/>
1019 <accept Dcore="Cortex-M0+"/>
1020 <accept Dcore="SC000"/>
1021 <require Dendian="Big-endian"/>
1022 <require Tcompiler="IAR"/>
1023 </condition>
1024
1025 <condition id="CM3_LE_IAR">
1026 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1027 <accept Dcore="Cortex-M3"/>
1028 <accept Dcore="SC300"/>
1029 <require Dendian="Little-endian"/>
1030 <require Tcompiler="IAR"/>
1031 </condition>
1032
1033 <condition id="CM3_BE_IAR">
1034 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1035 <accept Dcore="Cortex-M3"/>
1036 <accept Dcore="SC300"/>
1037 <require Dendian="Big-endian"/>
1038 <require Tcompiler="IAR"/>
1039 </condition>
1040
1041 <condition id="CM4_LE_IAR">
1042 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1043 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1044 <require Tcompiler="IAR"/>
1045 </condition>
1046
1047 <condition id="CM4_BE_IAR">
1048 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1049 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
1050 <require Tcompiler="IAR"/>
1051 </condition>
1052
1053 <condition id="CM4F_LE_IAR">
1054 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1055 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1056 <require Tcompiler="IAR"/>
1057 </condition>
1058
1059 <condition id="CM4F_BE_IAR">
1060 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1061 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
1062 <require Tcompiler="IAR"/>
1063 </condition>
1064
1065 <condition id="CM7_LE_IAR">
1066 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1067 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1068 <require Tcompiler="IAR"/>
1069 </condition>
1070
1071 <condition id="CM7_BE_IAR">
1072 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1073 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1074 <require Tcompiler="IAR"/>
1075 </condition>
1076
1077 <condition id="CM7F_LE_IAR">
1078 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1079 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1080 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1081 <require Tcompiler="IAR"/>
1082 </condition>
1083
1084 <condition id="CM7F_BE_IAR">
1085 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1086 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1087 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1088 <require Tcompiler="IAR"/>
1089 </condition>
1090
1091 <condition id="CM7FSP_LE_IAR">
1092 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1093 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1094 <require Tcompiler="IAR"/>
1095 </condition>
1096
1097 <condition id="CM7FSP_BE_IAR">
1098 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1099 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1100 <require Tcompiler="IAR"/>
1101 </condition>
1102
1103 <condition id="CM7FDP_LE_IAR">
1104 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1105 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1106 <require Tcompiler="IAR"/>
1107 </condition>
1108
1109 <condition id="CM7FDP_BE_IAR">
1110 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1111 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1112 <require Tcompiler="IAR"/>
1113 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1114
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1115 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1116 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1117 <require condition="Cortex-M Device"/>
1118 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1119 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1120 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1121 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1122 <description>Components required for RTOS RTX5</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1123 <require condition="Cortex-M Device"/>
1124 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1125 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1126 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1127 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1128 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1129 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1130 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1131 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1132 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1133 <condition id="RTOS2 RTX5 ARMv8M">
1134 <description>Components required for RTOS2 RTX5 on ARMv8M</description>
1135 <accept Dcore="ARMV8MBL"/>
1136 <accept Dcore="ARMV8MML"/>
1137 <require Cclass="CMSIS" Cgroup="CORE"/>
1138 <require Cclass="Device" Cgroup="Startup"/>
1139 </condition>
1140
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1141 </conditions>
1142
1143 <components>
1144 <!-- CMSIS-Core component -->
1145 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1146 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1147 <files>
1148 <!-- CPU independent -->
1149 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1150 <file category="include" name="CMSIS/Include/"/>
1151 </files>
1152 </component>
1153
1154 <!-- CMSIS-Startup components -->
1155 <!-- Cortex-M0 -->
1156 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1157 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1158 <files>
1159 <!-- include folder / device header file -->
1160 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1161 <!-- startup / system file -->
1162 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1163 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1164 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1165 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1166 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1167 </files>
1168 </component>
1169 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1170 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1171 <files>
1172 <!-- include folder / device header file -->
1173 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1174 <!-- startup / system file -->
1175 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1176 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1177 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1178 </files>
1179 </component>
1180
1181 <!-- Cortex-M0+ -->
1182 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1183 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1184 <files>
1185 <!-- include folder / device header file -->
1186 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1187 <!-- startup / system file -->
1188 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1189 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1190 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1191 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1192 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1193 </files>
1194 </component>
1195 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1196 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1197 <files>
1198 <!-- include folder / device header file -->
1199 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1200 <!-- startup / system file -->
1201 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1202 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1203 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1204 </files>
1205 </component>
1206
1207 <!-- Cortex-M3 -->
1208 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1209 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1210 <files>
1211 <!-- include folder / device header file -->
1212 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1213 <!-- startup / system file -->
1214 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1215 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1216 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1217 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1218 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1219 </files>
1220 </component>
1221 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1222 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1223 <files>
1224 <!-- include folder / device header file -->
1225 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1226 <!-- startup / system file -->
1227 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1228 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1229 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1230 </files>
1231 </component>
1232
1233 <!-- Cortex-M4 -->
1234 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1235 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1236 <files>
1237 <!-- include folder / device header file -->
1238 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1239 <!-- startup / system file -->
1240 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1241 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1242 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1243 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1244 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1245 </files>
1246 </component>
1247 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1248 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1249 <files>
1250 <!-- include folder / device header file -->
1251 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1252 <!-- startup / system file -->
1253 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1254 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1255 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1256 </files>
1257 </component>
1258
1259 <!-- Cortex-M7 -->
1260 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1261 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1262 <files>
1263 <!-- include folder / device header file -->
1264 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1265 <!-- startup / system file -->
1266 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1267 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1268 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1269 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1270 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1271 </files>
1272 </component>
1273 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1274 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1275 <files>
1276 <!-- include folder / device header file -->
1277 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1278 <!-- startup / system file -->
1279 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1280 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1281 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1282 </files>
1283 </component>
1284
1285 <!-- Cortex-SC000 -->
1286 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1287 <description>System and Startup for Generic ARM SC000 device</description>
1288 <files>
1289 <!-- include folder / device header file -->
1290 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1291 <!-- startup / system file -->
1292 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1293 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1294 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1295 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1296 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1297 </files>
1298 </component>
1299 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1300 <description>System and Startup for Generic ARM SC000 device</description>
1301 <files>
1302 <!-- include folder / device header file -->
1303 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1304 <!-- startup / system file -->
1305 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1306 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1307 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1308 </files>
1309 </component>
1310
1311 <!-- Cortex-SC300 -->
1312 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1313 <description>System and Startup for Generic ARM SC300 device</description>
1314 <files>
1315 <!-- include folder / device header file -->
1316 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1317 <!-- startup / system file -->
1318 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1319 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1320 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1321 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1322 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1323 </files>
1324 </component>
1325 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1326 <description>System and Startup for Generic ARM SC300 device</description>
1327 <files>
1328 <!-- include folder / device header file -->
1329 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1330 <!-- startup / system file -->
1331 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1332 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1333 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1334 </files>
1335 </component>
1336
1337 <!-- ARMv8MBL -->
1338 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1339 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1340 <files>
1341 <!-- include folder / device header file -->
1342 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1343 <!-- startup / system file -->
1344 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1345 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1346 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1347 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1348 <!-- SAU configuration -->
1349 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1350 </files>
1351 </component>
1352 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1353 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1354 <files>
1355 <!-- include folder / device header file -->
1356 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1357 <!-- startup / system file -->
1358 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1359 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1360 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1361 </files>
1362 </component>
1363
1364 <!-- ARMv8MML -->
1365 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1366 <description>System and Startup for Generic ARM ARMv8MML device</description>
1367 <files>
1368 <!-- include folder / device header file -->
1369 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1370 <!-- startup / system file -->
1371 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1372 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1373 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1374 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1375 <!-- SAU configuration -->
1376 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1377 </files>
1378 </component>
1379 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1380 <description>System and Startup for Generic ARM ARMv8MML device</description>
1381 <files>
1382 <!-- include folder / device header file -->
1383 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1384 <!-- startup / system file -->
1385 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1386 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1387 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1388 </files>
1389 </component>
1390
1391
1392 <!-- CMSIS-DSP component -->
1393 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1394 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1395 <files>
1396 <!-- CPU independent -->
1397 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1398 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1399 <file category="header" name="CMSIS/Include/arm_math.h"/>
1400 <!-- CPU and Compiler dependent -->
1401 <!-- ARMCC -->
1402 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1403 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1404 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1405 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1406 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1407 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1408 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1409 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1410 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1411 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1412 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1413 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1414 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1415 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1416 <!-- GCC -->
1417 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1418 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1419 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1420 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1421 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1422 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1423 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1424 </files>
1425 </component>
1426
1427 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1428 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1429 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1430 <RTE_Components_h>
1431 <!-- the following content goes into file 'RTE_Components.h' -->
1432 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1433 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1434 </RTE_Components_h>
1435 <files>
1436 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1437 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1438 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1439 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1440
1441 <!-- RTX templates -->
1442 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1443 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1444 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1445 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1446 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1447 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1448 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1449 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1450 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1451 <!-- tool-chain specific template file -->
1452 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1453 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1454 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1455
1456 <!-- CPU and Compiler dependent -->
1457 <!-- ARMCC -->
1458 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1459 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1460 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1461 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1462 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1463 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1464 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1465 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1466 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1467 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1468 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1469 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1470 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1471 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1472 <!-- GCC -->
1473 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1474 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1475 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1476 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1477 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1478 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1479 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1480 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1481 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1482 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1483 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1484 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1485 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1486 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1487 <!-- IAR -->
1488 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1489 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1490 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1491 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1492 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1493 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1494 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1495 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1496 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1497 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1498 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1499 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1500 </files>
1501 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1502
1503 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1504 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1505 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1506 <RTE_Components_h>
1507 <!-- the following content goes into file 'RTE_Components.h' -->
1508 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1509 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1510 </RTE_Components_h>
1511 <files>
1512 <!-- RTX header file -->
1513 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1514 <!-- RTX compatibility module for API V1 -->
1515 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1516 </files>
1517 </component>
1518
1519 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1520 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1521 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1522 <RTE_Components_h>
1523 <!-- the following content goes into file 'RTE_Components.h' -->
1524 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1525 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1526 </RTE_Components_h>
1527 <files>
1528 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1529 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1530
1531 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1532 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1533 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1534
1535 <!-- RTX configuration -->
1536 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1537
1538 <!-- RTX templates -->
1539 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1540 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1541 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1542
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1543 <!-- RTX libraries (CPU and Compiler dependent) -->
1544 <!-- ARMCC -->
1545 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1546 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1547 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1548 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1549 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1550 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1551 <!-- GCC -->
1552 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1553 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1554 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1555 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1556 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1557 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1558 </files>
1559 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1560 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
1561 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M</description>
1562 <RTE_Components_h>
1563 <!-- the following content goes into file 'RTE_Components.h' -->
1564 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1565 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1566 </RTE_Components_h>
1567 <files>
1568 <!-- RTX documentation -->
1569 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1570
1571 <!-- RTX header files -->
1572 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1573 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1574
1575 <!-- RTX configuration -->
1576 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1577
1578 <!-- RTX templates -->
1579 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1580 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1581 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1582
1583 <!-- RTX libraries (CPU and Compiler dependent) -->
1584 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1585 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1586 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1587 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1588 <!-- GCC -->
1589 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1590 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1591 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1592 </files>
1593 </component>
1594 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
Robert Rostoharb240dc82016-09-23 16:46:39 +0200[diff] [blame]1595 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M Non-Secure Domain</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1596 <RTE_Components_h>
1597 <!-- the following content goes into file 'RTE_Components.h' -->
1598 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1599 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1600 </RTE_Components_h>
1601 <files>
1602 <!-- RTX documentation -->
1603 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1604
1605 <!-- RTX header files -->
1606 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1607 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1608
1609 <!-- RTX configuration -->
1610 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1611
1612 <!-- RTX templates -->
1613 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1614 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1615 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1616
1617 <!-- RTX libraries (CPU and Compiler dependent) -->
1618 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1619 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1620 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1621 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1622 <!-- GCC -->
1623 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1624 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1625 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1626 </files>
1627 </component>
1628
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1629 </components>
1630
1631 <boards>
1632 <board name="uVision Simulator" vendor="Keil">
1633 <description>uVision Simulator</description>
1634 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1635 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1636 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1637 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1638 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1639 </board>
1640 </boards>
1641
1642 <examples>
1643 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1644 <description>DSP_Lib Class Marks example</description>
1645 <board name="uVision Simulator" vendor="Keil"/>
1646 <project>
1647 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1648 </project>
1649 <attributes>
1650 <component Cclass="CMSIS" Cgroup="CORE"/>
1651 <component Cclass="CMSIS" Cgroup="DSP"/>
1652 <component Cclass="Device" Cgroup="Startup"/>
1653 <category>Getting Started</category>
1654 </attributes>
1655 </example>
1656
1657 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1658 <description>DSP_Lib Convolution example</description>
1659 <board name="uVision Simulator" vendor="Keil"/>
1660 <project>
1661 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1662 </project>
1663 <attributes>
1664 <component Cclass="CMSIS" Cgroup="CORE"/>
1665 <component Cclass="CMSIS" Cgroup="DSP"/>
1666 <component Cclass="Device" Cgroup="Startup"/>
1667 <category>Getting Started</category>
1668 </attributes>
1669 </example>
1670
1671 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1672 <description>DSP_Lib Dotproduct example</description>
1673 <board name="uVision Simulator" vendor="Keil"/>
1674 <project>
1675 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1676 </project>
1677 <attributes>
1678 <component Cclass="CMSIS" Cgroup="CORE"/>
1679 <component Cclass="CMSIS" Cgroup="DSP"/>
1680 <component Cclass="Device" Cgroup="Startup"/>
1681 <category>Getting Started</category>
1682 </attributes>
1683 </example>
1684
1685 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1686 <description>DSP_Lib FFT Bin example</description>
1687 <board name="uVision Simulator" vendor="Keil"/>
1688 <project>
1689 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1690 </project>
1691 <attributes>
1692 <component Cclass="CMSIS" Cgroup="CORE"/>
1693 <component Cclass="CMSIS" Cgroup="DSP"/>
1694 <component Cclass="Device" Cgroup="Startup"/>
1695 <category>Getting Started</category>
1696 </attributes>
1697 </example>
1698
1699 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1700 <description>DSP_Lib FIR example</description>
1701 <board name="uVision Simulator" vendor="Keil"/>
1702 <project>
1703 <environment name="uv" load="arm_fir_example.uvprojx"/>
1704 </project>
1705 <attributes>
1706 <component Cclass="CMSIS" Cgroup="CORE"/>
1707 <component Cclass="CMSIS" Cgroup="DSP"/>
1708 <component Cclass="Device" Cgroup="Startup"/>
1709 <category>Getting Started</category>
1710 </attributes>
1711 </example>
1712
1713 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1714 <description>DSP_Lib Graphic Equalizer example</description>
1715 <board name="uVision Simulator" vendor="Keil"/>
1716 <project>
1717 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1718 </project>
1719 <attributes>
1720 <component Cclass="CMSIS" Cgroup="CORE"/>
1721 <component Cclass="CMSIS" Cgroup="DSP"/>
1722 <component Cclass="Device" Cgroup="Startup"/>
1723 <category>Getting Started</category>
1724 </attributes>
1725 </example>
1726
1727 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1728 <description>DSP_Lib Linear Interpolation example</description>
1729 <board name="uVision Simulator" vendor="Keil"/>
1730 <project>
1731 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1732 </project>
1733 <attributes>
1734 <component Cclass="CMSIS" Cgroup="CORE"/>
1735 <component Cclass="CMSIS" Cgroup="DSP"/>
1736 <component Cclass="Device" Cgroup="Startup"/>
1737 <category>Getting Started</category>
1738 </attributes>
1739 </example>
1740
1741 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1742 <description>DSP_Lib Matrix example</description>
1743 <board name="uVision Simulator" vendor="Keil"/>
1744 <project>
1745 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1746 </project>
1747 <attributes>
1748 <component Cclass="CMSIS" Cgroup="CORE"/>
1749 <component Cclass="CMSIS" Cgroup="DSP"/>
1750 <component Cclass="Device" Cgroup="Startup"/>
1751 <category>Getting Started</category>
1752 </attributes>
1753 </example>
1754
1755 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1756 <description>DSP_Lib Signal Convergence example</description>
1757 <board name="uVision Simulator" vendor="Keil"/>
1758 <project>
1759 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1760 </project>
1761 <attributes>
1762 <component Cclass="CMSIS" Cgroup="CORE"/>
1763 <component Cclass="CMSIS" Cgroup="DSP"/>
1764 <component Cclass="Device" Cgroup="Startup"/>
1765 <category>Getting Started</category>
1766 </attributes>
1767 </example>
1768
1769 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1770 <description>DSP_Lib Sinus/Cosinus example</description>
1771 <board name="uVision Simulator" vendor="Keil"/>
1772 <project>
1773 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1774 </project>
1775 <attributes>
1776 <component Cclass="CMSIS" Cgroup="CORE"/>
1777 <component Cclass="CMSIS" Cgroup="DSP"/>
1778 <component Cclass="Device" Cgroup="Startup"/>
1779 <category>Getting Started</category>
1780 </attributes>
1781 </example>
1782
1783 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1784 <description>DSP_Lib Variance example</description>
1785 <board name="uVision Simulator" vendor="Keil"/>
1786 <project>
1787 <environment name="uv" load="arm_variance_example.uvprojx"/>
1788 </project>
1789 <attributes>
1790 <component Cclass="CMSIS" Cgroup="CORE"/>
1791 <component Cclass="CMSIS" Cgroup="DSP"/>
1792 <component Cclass="Device" Cgroup="Startup"/>
1793 <category>Getting Started</category>
1794 </attributes>
1795 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1796
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1797 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1798 <description>CMSIS-RTOS2 Blinky example</description>
1799 <board name="uVision Simulator" vendor="Keil"/>
1800 <project>
1801 <environment name="uv" load="Blinky.uvprojx"/>
1802 </project>
1803 <attributes>
1804 <component Cclass="CMSIS" Cgroup="CORE"/>
1805 <component Cclass="CMSIS" Cgroup="RTOS2"/>
1806 <component Cclass="Device" Cgroup="Startup"/>
1807 <category>Getting Started</category>
1808 </attributes>
1809 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1810
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1811 </examples>
1812
1813</package>