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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 014b554cf56ec7d3b3817d14c0f2da9d8c8c36be / . / ARM.CMSIS.pdsc
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Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Robert Rostoharc9453672016-10-24 11:06:40 +0200[diff] [blame]11 <release version="5.0.0-Beta14">
12 CMSIS-RTOS RTX 4.82 (see revision history for details)
13 </release>
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]14 <release version="5.0.0-Beta13" date="2016-10-21">
15 Interim Beta Release:
16 CMSIS-RTOS2 and RTX implementation:
17 - reworked API based on customer feedback
18 CMSIS-SVD:
19 - reworked SVD format documentation
20 </release>
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]21 <release version="5.0.0-Beta12" date="2016-09-29">
22 Interim Beta Release:
23 CMSIS-RTOS2 and RTX implementation:
24 - added context management API for ARMv8-M TrustZone
25 - added ARMv8-M support (ARMClang, GCC)
26 CMSIS-Core:
27 - Updated documentation
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]28 - Added new file cmsis_compiler.h.
29 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]30 - Reworked compiler specific include files.
31 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]32 - Added __PACKED macro.
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]33 CMSIS-DSP:
34 - updated library projects
35 CMSIS-SVD:
36 - removed SVD file database documentation as SVD files are distributed in packs
37 - updated SVDConv for Win32 and Linux
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]38 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]39 <release version="5.0.0-Beta11">
40 CMSIS_Core:
41 - Added CMSE support to cmsis_gcc.h.
42 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]43 <release version="5.0.0-Beta10">
44 CMSIS-RTOS2:
45 - Added RTX5 component.
46 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]47 <release version="5.0.0-Beta9">
48 CMSIS_Core:
49 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
50 - Reworked SAU register and functions.
51 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]52 <release version="5.0.0-Beta8">
53 CMSIS-RTOS:
54 - API 2.0
55 - RTX 5.0.0-Alpha
56 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]57 <release version="5.0.0-Beta7">
58 CMSIS_Core:
59 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]60 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]61 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]62 <release version="5.0.0-Beta6">
63 CMSIS_Core:
64 - Added SCB_CFSR register bit definitions in core_*.h.
65 - Added NVIC_GetEnableIRQ function in core_*.h.
66 - Updated core instruction macros in cmsis_gcc.h.
67 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]68 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]69 CMSIS_DSP:
70 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
71 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]72 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]73 <release version="5.0.0-Beta4">
74 Updated ARMv8MML device files.
75 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
76 Updated CMSIS core files.
77 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
78 </release>
79 <release version="5.0.0-Beta3">
80 Updated CMSIS ARMv8M core / device files
81 - increased SAU regions to 8.
82 - moved TZ_SAU_Setup() to partition_#device#.h.
83 </release>
84 <release version="5.0.0-Beta2">
85 - renamed core_*.h to lower case.
86 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
87 - updated ARMv8M?L.svd.
88 </release>
89 <release version="5.0.0-Beta1">
90 - added function SCB_GetFPUType() to all CMSIS cores.
91 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
92 - updated CMSIS core files to V5.0
93 - updated CMSIS Core change log.
94 - updated CMSIS DSP_Lib change log.
95 - updated CMSIS DSP_Lib libraries.
96 </release>
97 <release version="5.0.0-Beta" date="2015-12-15">
98 Added ARMv8M support to CMSIS-Core.
99 - CMSIS-Core 5.0.0 Beta (see revision history for details)
100 - CMSIS-RTOS
101 -- API 1.02 (unchanged)
102 -- RTX 4.81.0 (see revision history for details)
103 - CMSIS-SVD 1.3.2 (see revision history for details)
104 </release>
105 <release version="4.5.0" date="2015-10-28">
106 - CMSIS-Core 4.30.0 (see revision history for details)
107 - CMSIS-DAP 1.1.0 (unchanged)
108 - CMSIS-Driver 2.04.0 (see revision history for details)
109 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
110 - CMSIS-PACK 1.4.1 (see revision history for details)
111 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
112 - CMSIS-SVD 1.3.1 (see revision history for details)
113 </release>
114 <release version="4.4.0" date="2015-09-11">
115 - CMSIS-Core 4.20 (see revision history for details)
116 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
117 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
118 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
119 - CMSIS-RTOS
120 -- API 1.02 (unchanged)
121 -- RTX 4.79 (see revision history for details)
122 - CMSIS-SVD 1.3.0 (see revision history for details)
123 - CMSIS-DAP 1.1.0 (extended with SWO support)
124 </release>
125 <release version="4.3.0" date="2015-03-20">
126 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
127 - CMSIS-DSP 1.4.5 (see revision history for details)
128 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
129 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
130 - CMSIS-RTOS
131 -- API 1.02 (unchanged)
132 -- RTX 4.78 (see revision history for details)
133 - CMSIS-SVD 1.2 (unchanged)
134 </release>
135 <release version="4.2.0" date="2014-09-24">
136 Adding Cortex-M7 support
137 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
138 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
139 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
140 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
141 - CMSIS-RTOS RTX 4.75 (see revision history for details)
142 </release>
143 <release version="4.1.1" date="2014-06-30">
144 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
145 </release>
146 <release version="4.1.0" date="2014-06-12">
147 - CMSIS-Driver 2.02 (incompatible update)
148 - CMSIS-Pack 1.3 (see revision history for details)
149 - CMSIS-DSP 1.4.2 (unchanged)
150 - CMSIS-Core 3.30 (unchanged)
151 - CMSIS-RTOS RTX 4.74 (unchanged)
152 - CMSIS-RTOS API 1.02 (unchanged)
153 - CMSIS-SVD 1.10 (unchanged)
154 PACK:
155 - removed G++ specific files from PACK
156 - added Component Startup variant "C Startup"
157 - added Pack Checking Utility
158 - updated conditions to reflect tool-chain dependency
159 - added Taxonomy for Graphics
160 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
161 </release>
162 <release version="4.0.0">
163 - CMSIS-Driver 2.00 Preliminary (incompatible update)
164 - CMSIS-Pack 1.1 Preliminary
165 - CMSIS-DSP 1.4.2 (see revision history for details)
166 - CMSIS-Core 3.30 (see revision history for details)
167 - CMSIS-RTOS RTX 4.74 (see revision history for details)
168 - CMSIS-RTOS API 1.02 (unchanged)
169 - CMSIS-SVD 1.10 (unchanged)
170 </release>
171 <release version="3.20.4">
172 - CMSIS-RTOS 4.74 (see revision history for details)
173 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
174 </release>
175 <release version="3.20.3">
176 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
177 - CMSIS-RTOS 4.73 (see revision history for details)
178 </release>
179 <release version="3.20.2">
180 - CMSIS-Pack documentation has been added
181 - CMSIS-Drivers header and documentation have been added to PACK
182 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
183 </release>
184 <release version="3.20.1">
185 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
186 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
187 </release>
188 <release version="3.20.0">
189 The software portions that are deployed in the application program are now under a BSD license which allows usage
190 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
191 The individual components have been update as listed below:
192 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
193 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
194 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
195 - CMSIS-SVD is unchanged.
196 </release>
197 </releases>
198
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]199 <taxonomy>
200 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
201 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
202 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
203 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
204 <description Cclass="File System">File Drive Support and File System</description>
205 <description Cclass="Graphics">Graphical User Interface</description>
206 <description Cclass="Network">Network Stack using Internet Protocols</description>
207 <description Cclass="USB">Universal Serial Bus Stack</description>
208 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
209 </taxonomy>
210
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]211 <devices>
212 <!-- ****************************** Cortex-M0 ****************************** -->
213 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]214 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]215 <description>
216The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
217- simple, easy-to-use programmers model
218- highly efficient ultra-low power operation
219- excellent code density
220- deterministic, high-performance interrupt handling
221- upward compatibility with the rest of the Cortex-M processor family.
222 </description>
223 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
224 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
225 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
226 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
227
228 <device Dname="ARMCM0">
229 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
230 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
231 </device>
232 </family>
233
234 <!-- ****************************** Cortex-M0P ****************************** -->
235 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]236 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]237 <description>
238The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
239- simple, easy-to-use programmers model
240- highly efficient ultra-low power operation
241- excellent code density
242- deterministic, high-performance interrupt handling
243- upward compatibility with the rest of the Cortex-M processor family.
244 </description>
245 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
246 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
247 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
248 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
249
250 <device Dname="ARMCM0P">
251 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
252 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
253 </device>
254 </family>
255
256 <!-- ****************************** Cortex-M3 ****************************** -->
257 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]258 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]259 <description>
260The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
261- simple, easy-to-use programmers model
262- highly efficient ultra-low power operation
263- excellent code density
264- deterministic, high-performance interrupt handling
265- upward compatibility with the rest of the Cortex-M processor family.
266 </description>
267 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
268 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
269 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
270 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
271
272 <device Dname="ARMCM3">
273 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
274 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
275 </device>
276 </family>
277
278 <!-- ****************************** Cortex-M4 ****************************** -->
279 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]280 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]281 <description>
282The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
283- simple, easy-to-use programmers model
284- highly efficient ultra-low power operation
285- excellent code density
286- deterministic, high-performance interrupt handling
287- upward compatibility with the rest of the Cortex-M processor family.
288 </description>
289 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
290 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
291 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
292 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
293
294 <device Dname="ARMCM4">
295 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
296 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
297 </device>
298
299 <device Dname="ARMCM4_FP">
300 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
301 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
302 </device>
303 </family>
304
305 <!-- ****************************** Cortex-M7 ****************************** -->
306 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]307 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]308 <description>
309The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
310- simple, easy-to-use programmers model
311- highly efficient ultra-low power operation
312- excellent code density
313- deterministic, high-performance interrupt handling
314- upward compatibility with the rest of the Cortex-M processor family.
315 </description>
316 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
317 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
318 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
319 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
320
321 <device Dname="ARMCM7">
322 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
323 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
324 </device>
325
326 <device Dname="ARMCM7_SP">
327 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
328 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
329 </device>
330
331 <device Dname="ARMCM7_DP">
332 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
333 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
334 </device>
335 </family>
336
337 <!-- ****************************** ARMSC000 ****************************** -->
338 <family Dfamily="ARM SC000" Dvendor="ARM:82">
339 <description>
340The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
341- simple, easy-to-use programmers model
342- highly efficient ultra-low power operation
343- excellent code density
344- deterministic, high-performance interrupt handling
345 </description>
346 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
347 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
348 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
349 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
350
351 <device Dname="ARMSC000">
352 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
353 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
354 </device>
355 </family>
356
357 <!-- ****************************** ARMSC300 ****************************** -->
358 <family Dfamily="ARM SC300" Dvendor="ARM:82">
359 <description>
360The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
361- simple, easy-to-use programmers model
362- highly efficient ultra-low power operation
363- excellent code density
364- deterministic, high-performance interrupt handling
365 </description>
366 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
367 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
368 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
369 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
370
371 <device Dname="ARMSC300">
372 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
373 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
374 </device>
375 </family>
376
377 <!-- ****************************** ARMv8-M Baseline ********************** -->
378 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
379 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
380 <description>
381The ARMv8MBL processor is brand new.
382 </description>
383 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
384 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
385 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
386 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
387
388 <device Dname="ARMv8MBL">
389 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
390 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
391 </device>
392 </family>
393
394 <!-- ****************************** ARMv8-M Mainline ****************************** -->
395 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
396 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
397 <description>
398The ARMv8MML processor is brand new.
399 </description>
400 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
401 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
402 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
403 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
404
405 <device Dname="ARMv8MML">
406 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
407 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
408 </device>
409
410 <device Dname="ARMv8MML_SP">
411 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
412 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
413 </device>
414
415 <device Dname="ARMv8MML_DP">
416 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
417 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
418 </device>
419 </family>
420
421 </devices>
422
423
424 <apis>
425 <!-- CMSIS-RTOS API -->
426 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
427 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
428 <files>
429 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
430 </files>
431 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]432 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]433 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
434 <files>
435 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
436 </files>
437 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]438 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
439 <description>USART Driver API for Cortex-M</description>
440 <files>
441 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
442 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
446 <description>SPI Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
453 <description>SAI Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
456 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
457 </files>
458 </api>
459 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
460 <description>I2C Driver API for Cortex-M</description>
461 <files>
462 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
463 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
464 </files>
465 </api>
466 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
467 <description>CAN Driver API for Cortex-M</description>
468 <files>
469 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
470 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
471 </files>
472 </api>
473 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
474 <description>Flash Driver API for Cortex-M</description>
475 <files>
476 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
477 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
478 </files>
479 </api>
480 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
481 <description>MCI Driver API for Cortex-M</description>
482 <files>
483 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
484 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
485 </files>
486 </api>
487 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
488 <description>NAND Flash Driver API for Cortex-M</description>
489 <files>
490 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
491 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
492 </files>
493 </api>
494 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
495 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
496 <files>
497 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
498 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
499 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
500 </files>
501 </api>
502 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
503 <description>Ethernet MAC Driver API for Cortex-M</description>
504 <files>
505 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
506 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
507 </files>
508 </api>
509 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
510 <description>Ethernet PHY Driver API for Cortex-M</description>
511 <files>
512 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
513 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
514 </files>
515 </api>
516 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
517 <description>USB Device Driver API for Cortex-M</description>
518 <files>
519 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
520 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
521 </files>
522 </api>
523 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
524 <description>USB Host Driver API for Cortex-M</description>
525 <files>
526 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
527 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
528 </files>
529 </api>
530 </apis>
531
532 <!-- conditions are dependency rules that can apply to a component or an individual file -->
533 <conditions>
534 <condition id="ARMCC">
535 <require Tcompiler="ARMCC"/>
536 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]537 <condition id="GCC">
538 <require Tcompiler="GCC"/>
539 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]540 <condition id="IAR">
541 <require Tcompiler="IAR"/>
542 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]543 <condition id="ARMCC GCC">
544 <accept Tcompiler="ARMCC"/>
545 <accept Tcompiler="GCC"/>
546 </condition>
547
548 <condition id="Cortex-M Device">
549 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
550 <accept Dcore="Cortex-M0"/>
551 <accept Dcore="Cortex-M0+"/>
552 <accept Dcore="Cortex-M3"/>
553 <accept Dcore="Cortex-M4"/>
554 <accept Dcore="Cortex-M7"/>
555 <accept Dcore="SC000"/>
556 <accept Dcore="SC300"/>
557 </condition>
558
559 <condition id="Cortex-M ARMv8-M Device">
560 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
561 <accept Dcore="Cortex-M0"/>
562 <accept Dcore="Cortex-M0+"/>
563 <accept Dcore="Cortex-M3"/>
564 <accept Dcore="Cortex-M4"/>
565 <accept Dcore="Cortex-M7"/>
566 <accept Dcore="SC000"/>
567 <accept Dcore="SC300"/>
568 <accept Dcore="ARMV8MBL"/>
569 <accept Dcore="ARMV8MML"/>
570 </condition>
571
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]572 <condition id="ARMv8-M Device">
573 <description>ARMv8-M architecture based device: ARMv8MBL, ARMv8MML</description>
574 <accept Dcore="ARMV8MBL"/>
575 <accept Dcore="ARMV8MML"/>
576 </condition>
577
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]578 <condition id="CMSIS Core">
579 <description>CMSIS CORE processor and device specific Startup files</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]580 <require Cclass="CMSIS" Cgroup="CORE"/>
581 </condition>
582
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]583 <!-- Device Startup -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]584 <condition id="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]585 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
586 <require Dvendor="ARM:82" Dname="ARMCM0"/>
587 <require Cclass="CMSIS" Cgroup="CORE"/>
588 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]589 <condition id="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]590 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
591 <require condition="ARMCM0 CMSIS"/>
592 <require condition="GCC"/>
593 </condition>
594
595 <condition id="ARMCM0+ CMSIS">
596 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
597 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
598 <require Cclass="CMSIS" Cgroup="CORE"/>
599 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]600 <condition id="ARMCM0+ CMSIS GCC">
601 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
602 <require condition="ARMCM0+ CMSIS"/>
603 <require condition="GCC"/>
604 </condition>
605
606 <condition id="ARMCM3 CMSIS">
607 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
608 <require Dvendor="ARM:82" Dname="ARMCM3"/>
609 <require Cclass="CMSIS" Cgroup="CORE"/>
610 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]611 <condition id="ARMCM3 CMSIS GCC">
612 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
613 <require condition="ARMCM3 CMSIS"/>
614 <require condition="GCC"/>
615 </condition>
616
617 <condition id="ARMCM4 CMSIS">
618 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
619 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
620 <require Cclass="CMSIS" Cgroup="CORE"/>
621 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]622 <condition id="ARMCM4 CMSIS GCC">
623 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
624 <require condition="ARMCM4 CMSIS"/>
625 <require condition="GCC"/>
626 </condition>
627
628 <condition id="ARMCM7 CMSIS">
629 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
630 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
631 <require Cclass="CMSIS" Cgroup="CORE"/>
632 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]633 <condition id="ARMCM7 CMSIS GCC">
634 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
635 <require condition="ARMCM7 CMSIS"/>
636 <require condition="GCC"/>
637 </condition>
638
639 <condition id="ARMSC000 CMSIS">
640 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
641 <require Dvendor="ARM:82" Dname="ARMSC000"/>
642 <require Cclass="CMSIS" Cgroup="CORE"/>
643 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]644 <condition id="ARMSC000 CMSIS GCC">
645 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
646 <require condition="ARMSC000 CMSIS"/>
647 <require condition="GCC"/>
648 </condition>
649
650 <condition id="ARMSC300 CMSIS">
651 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
652 <require Dvendor="ARM:82" Dname="ARMSC300"/>
653 <require Cclass="CMSIS" Cgroup="CORE"/>
654 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]655 <condition id="ARMSC300 CMSIS GCC">
656 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
657 <require condition="ARMSC300 CMSIS"/>
658 <require condition="GCC"/>
659 </condition>
660
661 <condition id="ARMv8MBL CMSIS">
662 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
663 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
664 <require Cclass="CMSIS" Cgroup="CORE"/>
665 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]666 <condition id="ARMv8MBL CMSIS GCC">
667 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
668 <require condition="ARMv8MBL CMSIS"/>
669 <require condition="GCC"/>
670 </condition>
671
672 <condition id="ARMv8MML CMSIS">
673 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
674 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
675 <require Cclass="CMSIS" Cgroup="CORE"/>
676 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]677 <condition id="ARMv8MML CMSIS GCC">
678 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
679 <require condition="ARMv8MML CMSIS"/>
680 <require condition="GCC"/>
681 </condition>
682
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]683 <!-- ARM core -->
684 <condition id="CM0">
685 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
686 <accept Dcore="Cortex-M0"/>
687 <accept Dcore="Cortex-M0+"/>
688 <accept Dcore="SC000"/>
689 </condition>
690 <condition id="CM3">
691 <description>Cortex-M3 or SC300 processor based device</description>
692 <accept Dcore="Cortex-M3"/>
693 <accept Dcore="SC300"/>
694 </condition>
695 <condition id="CM4">
696 <description>Cortex-M4 processor based device</description>
697 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
698 </condition>
699 <condition id="CM4_FP">
700 <description>Cortex-M4 processor based device using Floating Point Unit</description>
701 <require Dcore="Cortex-M4" Dfpu="FPU"/>
702 </condition>
703 <condition id="CM7">
704 <description>Cortex-M7 processor based device</description>
705 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
706 </condition>
707 <condition id="CM7_FP">
708 <description>Cortex-M7 processor based device using Floating Point Unit</description>
709 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
710 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
711 </condition>
712 <condition id="CM7_SP">
713 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
714 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
715 </condition>
716 <condition id="CM7_DP">
717 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
718 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
719 </condition>
720 <condition id="ARMv8MBL">
721 <description>ARMv8-M Baseline processor based device</description>
722 <require Dcore="ARMV8MBL"/>
723 </condition>
724 <condition id="ARMv8MML">
725 <description>ARMv8-M Mainline processor based device</description>
726 <require Dcore="ARMV8MML" Dfpu="0"/>
727 </condition>
728 <condition id="ARMv8MML_FP">
729 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
730 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
731 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]732 </condition>
733
734 <!-- ARMCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]735 <condition id="CM0_ARMCC">
736 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
737 <require condition="CM0"/>
738 <require Tcompiler="ARMCC"/>
739 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]740 <condition id="CM0_LE_ARMCC">
741 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]742 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]743 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]744 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]745 <condition id="CM0_BE_ARMCC">
746 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]747 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]748 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]749 </condition>
750
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]751 <condition id="CM3_ARMCC">
752 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
753 <require condition="CM3"/>
754 <require Tcompiler="ARMCC"/>
755 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]756 <condition id="CM3_LE_ARMCC">
757 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]758 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]759 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]760 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]761 <condition id="CM3_BE_ARMCC">
762 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]763 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]764 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]765 </condition>
766
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]767 <condition id="CM4_ARMCC">
768 <description>Cortex-M4 processor based device for the ARM Compiler</description>
769 <require condition="CM4"/>
770 <require Tcompiler="ARMCC"/>
771 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]772 <condition id="CM4_LE_ARMCC">
773 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]774 <require condition="CM4_ARMCC"/>
775 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]776 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]777 <condition id="CM4_BE_ARMCC">
778 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]779 <require condition="CM4_ARMCC"/>
780 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]781 </condition>
782
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]783 <condition id="CM4_FP_ARMCC">
784 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
785 <require condition="CM4_FP"/>
786 <require Tcompiler="ARMCC"/>
787 </condition>
788 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]789 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]790 <require condition="CM4_FP_ARMCC"/>
791 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]792 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]793 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]794 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]795 <require condition="CM4_FP_ARMCC"/>
796 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]797 </condition>
798
799 <!-- XMC 4000 Series devices from Infineon require a special library -->
800 <condition id="CM4_LE_ARMCC_STD">
801 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
802 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
803 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
804 <require Tcompiler="ARMCC"/>
805 </condition>
806 <condition id="CM4_LE_ARMCC_IFX">
807 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
808 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
809 <require Tcompiler="ARMCC"/>
810 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]811 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]812 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
813 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
814 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
815 <require Tcompiler="ARMCC"/>
816 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]817 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]818 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
819 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
820 <require Tcompiler="ARMCC"/>
821 </condition>
822
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]823 <condition id="CM7_ARMCC">
824 <description>Cortex-M7 processor based device for the ARM Compiler</description>
825 <require condition="CM7"/>
826 <require Tcompiler="ARMCC"/>
827 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]828 <condition id="CM7_LE_ARMCC">
829 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]830 <require condition="CM7_ARMCC"/>
831 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]832 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]833 <condition id="CM7_BE_ARMCC">
834 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]835 <require condition="CM7_ARMCC"/>
836 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]837 </condition>
838
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]839 <condition id="CM7_FP_ARMCC">
840 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
841 <require condition="CM7_FP"/>
842 <require Tcompiler="ARMCC"/>
843 </condition>
844 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]845 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]846 <require condition="CM7_FP_ARMCC"/>
847 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]848 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]849 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]850 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]851 <require condition="CM7_FP_ARMCC"/>
852 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]853 </condition>
854
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]855 <condition id="CM7_SP_ARMCC">
856 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
857 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]858 <require Tcompiler="ARMCC"/>
859 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]860 <condition id="CM7_SP_LE_ARMCC">
861 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
862 <require condition="CM7_SP_ARMCC"/>
863 <require Dendian="Little-endian"/>
864 </condition>
865 <condition id="CM7_SP_BE_ARMCC">
866 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
867 <require condition="CM7_SP_ARMCC"/>
868 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]869 </condition>
870
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]871 <condition id="CM7_DP_ARMCC">
872 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
873 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]874 <require Tcompiler="ARMCC"/>
875 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]876 <condition id="CM7_DP_LE_ARMCC">
877 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
878 <require condition="CM7_DP_ARMCC"/>
879 <require Dendian="Little-endian"/>
880 </condition>
881 <condition id="CM7_DP_BE_ARMCC">
882 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
883 <require condition="CM7_DP_ARMCC"/>
884 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]885 </condition>
886
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]887 <condition id="ARMv8MBL_ARMCC">
888 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
889 <require condition="ARMv8MBL"/>
890 <require Tcompiler="ARMCC"/>
891 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]892 <condition id="ARMv8MBL_LE_ARMCC">
893 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]894 <require condition="ARMv8MBL_ARMCC"/>
895 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]896 </condition>
897
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]898 <condition id="ARMv8MML_ARMCC">
899 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
900 <require condition="ARMv8MML"/>
901 <require Tcompiler="ARMCC"/>
902 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]903 <condition id="ARMv8MML_LE_ARMCC">
904 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]905 <require condition="ARMv8MML_ARMCC"/>
906 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]907 </condition>
908
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]909 <condition id="ARMv8MML_FP_ARMCC">
910 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
911 <require condition="ARMv8MML_FP"/>
912 <require Tcompiler="ARMCC"/>
913 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]914 <condition id="ARMv8MML_FP_LE_ARMCC">
915 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]916 <require condition="ARMv8MML_FP_ARMCC"/>
917 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]918 </condition>
919
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]920 <!-- GCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]921 <condition id="CM0_GCC">
922 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
923 <require condition="CM0"/>
924 <require Tcompiler="GCC"/>
925 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]926 <condition id="CM0_LE_GCC">
927 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]928 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]929 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]930 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]931 <condition id="CM0_BE_GCC">
932 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]933 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]934 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]935 </condition>
936
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]937 <condition id="CM3_GCC">
938 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
939 <require condition="CM3"/>
940 <require Tcompiler="GCC"/>
941 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]942 <condition id="CM3_LE_GCC">
943 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]944 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]945 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]946 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]947 <condition id="CM3_BE_GCC">
948 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]949 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]950 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]951 </condition>
952
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]953 <condition id="CM4_GCC">
954 <description>Cortex-M4 processor based device for the GCC Compiler</description>
955 <require condition="CM4"/>
956 <require Tcompiler="GCC"/>
957 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]958 <condition id="CM4_LE_GCC">
959 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]960 <require condition="CM4_GCC"/>
961 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]962 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]963 <condition id="CM4_BE_GCC">
964 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]965 <require condition="CM4_GCC"/>
966 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]967 </condition>
968
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]969 <condition id="CM4_FP_GCC">
970 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
971 <require condition="CM4_FP"/>
972 <require Tcompiler="GCC"/>
973 </condition>
974 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]975 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]976 <require condition="CM4_FP_GCC"/>
977 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]978 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]979 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]980 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]981 <require condition="CM4_FP_GCC"/>
982 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]983 </condition>
984
985 <!-- XMC 4000 Series devices from Infineon require a special library -->
986 <condition id="CM4_LE_GCC_STD">
987 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
988 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
989 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
990 <require Tcompiler="GCC"/>
991 </condition>
992 <condition id="CM4_LE_GCC_IFX">
993 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
994 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
995 <require Tcompiler="GCC"/>
996 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]997 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]998 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
999 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1000 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1001 <require Tcompiler="GCC"/>
1002 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1003 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1004 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1005 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1006 <require Tcompiler="GCC"/>
1007 </condition>
1008
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1009 <condition id="CM7_GCC">
1010 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1011 <require condition="CM7"/>
1012 <require Tcompiler="GCC"/>
1013 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1014 <condition id="CM7_LE_GCC">
1015 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1016 <require condition="CM7_GCC"/>
1017 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1018 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1019 <condition id="CM7_BE_GCC">
1020 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1021 <require condition="CM7_GCC"/>
1022 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1023 </condition>
1024
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1025 <condition id="CM7_FP_GCC">
1026 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1027 <require condition="CM7_FP"/>
1028 <require Tcompiler="GCC"/>
1029 </condition>
1030 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1031 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1032 <require condition="CM7_FP_GCC"/>
1033 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1034 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1035 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1036 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1037 <require condition="CM7_FP_GCC"/>
1038 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1039 </condition>
1040
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1041 <condition id="CM7_SP_GCC">
1042 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1043 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1044 <require Tcompiler="GCC"/>
1045 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1046 <condition id="CM7_SP_LE_GCC">
1047 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1048 <require condition="CM7_SP_GCC"/>
1049 <require Dendian="Little-endian"/>
1050 </condition>
1051 <condition id="CM7_SP_BE_GCC">
1052 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1053 <require condition="CM7_SP_GCC"/>
1054 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1055 </condition>
1056
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1057 <condition id="CM7_DP_GCC">
1058 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1059 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1060 <require Tcompiler="GCC"/>
1061 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1062 <condition id="CM7_DP_LE_GCC">
1063 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1064 <require condition="CM7_DP_GCC"/>
1065 <require Dendian="Little-endian"/>
1066 </condition>
1067 <condition id="CM7_DP_BE_GCC">
1068 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1069 <require condition="CM7_DP_GCC"/>
1070 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1071 </condition>
1072
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1073 <condition id="ARMv8MBL_GCC">
1074 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1075 <require condition="ARMv8MBL"/>
1076 <require Tcompiler="GCC"/>
1077 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1078 <condition id="ARMv8MBL_LE_GCC">
1079 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1080 <require condition="ARMv8MBL_GCC"/>
1081 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1082 </condition>
1083
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1084 <condition id="ARMv8MML_GCC">
1085 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1086 <require condition="ARMv8MML"/>
1087 <require Tcompiler="GCC"/>
1088 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1089 <condition id="ARMv8MML_LE_GCC">
1090 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1091 <require condition="ARMv8MML_GCC"/>
1092 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1093 </condition>
1094
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1095 <condition id="ARMv8MML_FP_GCC">
1096 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1097 <require condition="ARMv8MML_FP"/>
1098 <require Tcompiler="GCC"/>
1099 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1100 <condition id="ARMv8MML_FP_LE_GCC">
1101 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1102 <require condition="ARMv8MML_FP_GCC"/>
1103 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1104 </condition>
1105
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1106 <!-- IAR compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1107 <condition id="CM0_IAR">
1108 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1109 <require condition="CM0"/>
1110 <require Tcompiler="IAR"/>
1111 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1112 <condition id="CM0_LE_IAR">
1113 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1114 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1115 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1116 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1117 <condition id="CM0_BE_IAR">
1118 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1119 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1120 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1121 </condition>
1122
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1123 <condition id="CM3_IAR">
1124 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1125 <require condition="CM3"/>
1126 <require Tcompiler="IAR"/>
1127 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1128 <condition id="CM3_LE_IAR">
1129 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1130 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1131 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1132 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1133 <condition id="CM3_BE_IAR">
1134 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1135 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1136 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1137 </condition>
1138
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1139 <condition id="CM4_IAR">
1140 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1141 <require condition="CM4"/>
1142 <require Tcompiler="IAR"/>
1143 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1144 <condition id="CM4_LE_IAR">
1145 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1146 <require condition="CM4_IAR"/>
1147 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1148 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1149 <condition id="CM4_BE_IAR">
1150 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1151 <require condition="CM4_IAR"/>
1152 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1153 </condition>
1154
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1155 <condition id="CM4_FP_IAR">
1156 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1157 <require condition="CM4_FP"/>
1158 <require Tcompiler="IAR"/>
1159 </condition>
1160 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1161 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1162 <require condition="CM4_FP_IAR"/>
1163 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1164 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1165 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1166 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1167 <require condition="CM4_FP_IAR"/>
1168 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1169 </condition>
1170
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1171 <condition id="CM7_IAR">
1172 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1173 <require condition="CM7"/>
1174 <require Tcompiler="IAR"/>
1175 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1176 <condition id="CM7_LE_IAR">
1177 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1178 <require condition="CM7_IAR"/>
1179 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1180 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1181 <condition id="CM7_BE_IAR">
1182 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1183 <require condition="CM7_IAR"/>
1184 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1185 </condition>
1186
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1187 <condition id="CM7_FP_IAR">
1188 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1189 <require condition="CM7_FP"/>
1190 <require Tcompiler="IAR"/>
1191 </condition>
1192 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1193 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1194 <require condition="CM7_FP_IAR"/>
1195 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1196 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1197 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1198 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1199 <require condition="CM7_FP_IAR"/>
1200 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1201 </condition>
1202
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1203 <condition id="CM7_SP_IAR">
1204 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1205 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1206 <require Tcompiler="IAR"/>
1207 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1208 <condition id="CM7_SP_LE_IAR">
1209 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1210 <require condition="CM7_SP_IAR"/>
1211 <require Dendian="Little-endian"/>
1212 </condition>
1213 <condition id="CM7_SP_BE_IAR">
1214 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1215 <require condition="CM7_SP_IAR"/>
1216 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1217 </condition>
1218
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1219 <condition id="CM7_DP_IAR">
1220 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1221 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1222 <require Tcompiler="IAR"/>
1223 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1224 <condition id="CM7_DP_LE_IAR">
1225 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1226 <require condition="CM7_DP_IAR"/>
1227 <require Dendian="Little-endian"/>
1228 </condition>
1229 <condition id="CM7_DP_BE_IAR">
1230 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1231 <require condition="CM7_DP_IAR"/>
1232 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1233 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1234
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1235 <!-- CMSIS DSP -->
1236 <condition id="CMSIS DSP">
1237 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1238 <require condition="Cortex-M Device"/>
1239 <require Cclass="CMSIS" Cgroup="CORE"/>
1240 <accept Tcompiler="GCC"/>
1241 <accept Tcompiler="ARMCC"/>
1242 <accept Tcompiler="IAR"/>
1243 </condition>
1244
1245 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1246 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1247 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1248 <require condition="Cortex-M Device"/>
1249 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1250 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1251 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1252 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1253 <description>Components required for RTOS RTX5</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1254 <require condition="Cortex-M Device"/>
1255 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1256 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1257 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1258 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1259 <require condition="Cortex-M ARMv8-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1260 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1261 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1262 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1263 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1264 <condition id="RTOS2 RTX5 ARMv8M">
1265 <description>Components required for RTOS2 RTX5 on ARMv8M</description>
1266 <accept Dcore="ARMV8MBL"/>
1267 <accept Dcore="ARMV8MML"/>
1268 <require Cclass="CMSIS" Cgroup="CORE"/>
1269 <require Cclass="Device" Cgroup="Startup"/>
1270 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1271 <condition id="RTOS2 RTX5 Debug">
1272 <description>Components required for RTOS2 RTX5 (Debug)</description>
1273 <require condition="RTOS2 RTX5"/>
1274 <require Cclass="Compiler" Cgroup="Event Recorder"/>
1275 </condition>
1276 <condition id="RTOS2 RTX5 ARMv8M Debug">
1277 <description>Components required for RTOS2 RTX5 on ARMv8M (Debug)</description>
1278 <require condition="RTOS2 RTX5 ARMv8M"/>
1279 <require Cclass="Compiler" Cgroup="Event Recorder"/>
1280 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1281
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1282 </conditions>
1283
1284 <components>
1285 <!-- CMSIS-Core component -->
1286 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1287 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1288 <files>
1289 <!-- CPU independent -->
1290 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1291 <file category="include" name="CMSIS/Include/"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1292 <!-- Code template -->
1293 <file category="sourceC" attr="template" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="CMSIS-Core 'main' function for ARMv8-M" condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1294 </files>
1295 </component>
1296
1297 <!-- CMSIS-Startup components -->
1298 <!-- Cortex-M0 -->
1299 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1300 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1301 <files>
1302 <!-- include folder / device header file -->
1303 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1304 <!-- startup / system file -->
1305 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1306 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1307 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1308 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1309 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1310 </files>
1311 </component>
1312 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1313 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1314 <files>
1315 <!-- include folder / device header file -->
1316 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1317 <!-- startup / system file -->
1318 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1319 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1320 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1321 </files>
1322 </component>
1323
1324 <!-- Cortex-M0+ -->
1325 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1326 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1327 <files>
1328 <!-- include folder / device header file -->
1329 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1330 <!-- startup / system file -->
1331 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1332 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1333 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1334 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1335 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1336 </files>
1337 </component>
1338 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1339 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1340 <files>
1341 <!-- include folder / device header file -->
1342 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1343 <!-- startup / system file -->
1344 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1345 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1346 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1347 </files>
1348 </component>
1349
1350 <!-- Cortex-M3 -->
1351 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1352 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1353 <files>
1354 <!-- include folder / device header file -->
1355 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1356 <!-- startup / system file -->
1357 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1358 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1359 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1360 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1361 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1362 </files>
1363 </component>
1364 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1365 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1366 <files>
1367 <!-- include folder / device header file -->
1368 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1369 <!-- startup / system file -->
1370 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1371 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1372 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1373 </files>
1374 </component>
1375
1376 <!-- Cortex-M4 -->
1377 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1378 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1379 <files>
1380 <!-- include folder / device header file -->
1381 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1382 <!-- startup / system file -->
1383 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1384 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1385 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1386 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1387 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1388 </files>
1389 </component>
1390 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1391 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1392 <files>
1393 <!-- include folder / device header file -->
1394 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1395 <!-- startup / system file -->
1396 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1397 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1398 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1399 </files>
1400 </component>
1401
1402 <!-- Cortex-M7 -->
1403 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1404 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1405 <files>
1406 <!-- include folder / device header file -->
1407 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1408 <!-- startup / system file -->
1409 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1410 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1411 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1412 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1413 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1414 </files>
1415 </component>
1416 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1417 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1418 <files>
1419 <!-- include folder / device header file -->
1420 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1421 <!-- startup / system file -->
1422 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1423 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1424 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1425 </files>
1426 </component>
1427
1428 <!-- Cortex-SC000 -->
1429 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1430 <description>System and Startup for Generic ARM SC000 device</description>
1431 <files>
1432 <!-- include folder / device header file -->
1433 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1434 <!-- startup / system file -->
1435 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1436 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1437 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1438 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1439 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1440 </files>
1441 </component>
1442 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1443 <description>System and Startup for Generic ARM SC000 device</description>
1444 <files>
1445 <!-- include folder / device header file -->
1446 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1447 <!-- startup / system file -->
1448 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1449 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1450 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1451 </files>
1452 </component>
1453
1454 <!-- Cortex-SC300 -->
1455 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1456 <description>System and Startup for Generic ARM SC300 device</description>
1457 <files>
1458 <!-- include folder / device header file -->
1459 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1460 <!-- startup / system file -->
1461 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1462 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1463 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1464 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1465 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1466 </files>
1467 </component>
1468 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1469 <description>System and Startup for Generic ARM SC300 device</description>
1470 <files>
1471 <!-- include folder / device header file -->
1472 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1473 <!-- startup / system file -->
1474 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1475 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1476 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1477 </files>
1478 </component>
1479
1480 <!-- ARMv8MBL -->
1481 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1482 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1483 <files>
1484 <!-- include folder / device header file -->
1485 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1486 <!-- startup / system file -->
1487 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1488 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1489 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1490 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1491 <!-- SAU configuration -->
1492 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1493 </files>
1494 </component>
1495 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1496 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1497 <files>
1498 <!-- include folder / device header file -->
1499 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1500 <!-- startup / system file -->
1501 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1502 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1503 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1504 </files>
1505 </component>
1506
1507 <!-- ARMv8MML -->
1508 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1509 <description>System and Startup for Generic ARM ARMv8MML device</description>
1510 <files>
1511 <!-- include folder / device header file -->
1512 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1513 <!-- startup / system file -->
1514 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1515 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1516 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1517 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1518 <!-- SAU configuration -->
1519 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1520 </files>
1521 </component>
1522 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1523 <description>System and Startup for Generic ARM ARMv8MML device</description>
1524 <files>
1525 <!-- include folder / device header file -->
1526 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1527 <!-- startup / system file -->
1528 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1529 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1530 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1531 </files>
1532 </component>
1533
1534
1535 <!-- CMSIS-DSP component -->
1536 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1537 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1538 <files>
1539 <!-- CPU independent -->
1540 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1541 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1542 <file category="header" name="CMSIS/Include/arm_math.h"/>
1543 <!-- CPU and Compiler dependent -->
1544 <!-- ARMCC -->
1545 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1546 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1547 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1548 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1549 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1550 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1551 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1552 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1553 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1554 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1555 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1556 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1557 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1558 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <!-- GCC -->
1560 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1561 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1562 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1563 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1564 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1565 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1566 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1567 </files>
1568 </component>
1569
1570 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1571 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1572 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1573 <RTE_Components_h>
1574 <!-- the following content goes into file 'RTE_Components.h' -->
1575 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1576 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1577 </RTE_Components_h>
1578 <files>
1579 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1580 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1581 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1582 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1583
1584 <!-- RTX templates -->
1585 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1586 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1587 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1588 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1589 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1590 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1591 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1592 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1593 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1594 <!-- tool-chain specific template file -->
1595 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1596 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1597 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1598
1599 <!-- CPU and Compiler dependent -->
1600 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1601 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1602 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1603 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1604 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1605 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1606 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1607 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1608 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1609 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1610 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1611 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1612 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1613 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1614 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1615 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1616 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1617 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1618 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1619 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1620 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1621 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1622 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1623 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1624 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1625 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1626 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1627 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1628 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1629 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1630 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1631 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1632 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1633 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1634 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1635 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1636 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1637 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1638 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1639 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1640 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1641 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1642 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1643 </files>
1644 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1645
1646 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1647 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1648 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1649 <RTE_Components_h>
1650 <!-- the following content goes into file 'RTE_Components.h' -->
1651 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1652 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1653 </RTE_Components_h>
1654 <files>
1655 <!-- RTX header file -->
1656 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1657 <!-- RTX compatibility module for API V1 -->
1658 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1659 </files>
1660 </component>
1661
1662 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1663 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1664 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Release)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1665 <RTE_Components_h>
1666 <!-- the following content goes into file 'RTE_Components.h' -->
1667 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1668 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1669 </RTE_Components_h>
1670 <files>
1671 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1672 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1673
1674 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1675 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1676 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1677
1678 <!-- RTX configuration -->
1679 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1680
1681 <!-- RTX templates -->
1682 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1683 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1684 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1685
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1686 <!-- RTX libraries (CPU and Compiler dependent) -->
1687 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1688 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1689 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1690 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1691 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1692 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1693 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1694 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1695 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1696 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1697 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1698 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1699 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1700 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1701 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1702 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1703 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1704 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1705 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1706 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1707 </files>
1708 </component>
1709 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1710 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Release)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1711 <RTE_Components_h>
1712 <!-- the following content goes into file 'RTE_Components.h' -->
1713 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1714 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1715 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1716 </RTE_Components_h>
1717 <files>
1718 <!-- RTX documentation -->
1719 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1720
1721 <!-- RTX header files -->
1722 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1723 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1724
1725 <!-- RTX configuration -->
1726 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1727
1728 <!-- RTX templates -->
1729 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1730 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1731 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1732
1733 <!-- RTX libraries (CPU and Compiler dependent) -->
1734 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1735 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1736 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1737 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1738 <!-- GCC -->
1739 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1740 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1741 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1742 </files>
1743 </component>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame^]1744 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Debug" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 Debug">
1745 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Debug)</description>
1746 <RTE_Components_h>
1747 <!-- the following content goes into file 'RTE_Components.h' -->
1748 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1749 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1750 #define RTE_CMSIS_RTOS2_RTX5_DEBUG /* CMSIS-RTOS2 Keil RTX5 Debug */
1751 </RTE_Components_h>
1752 <files>
1753 <!-- RTX documentation -->
1754 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1755
1756 <!-- RTX header files -->
1757 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1758 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1759
1760 <!-- RTX configuration -->
1761 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1762
1763 <!-- RTX templates -->
1764 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1765 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1766 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1767
1768 <!-- RTX sources (core) -->
1769 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
1770 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
1771 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
1772 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
1773 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
1774 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
1775 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
1776 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
1777 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
1778 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
1779 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
1780 <!-- RTX sources (handlers ARMCC) -->
1781 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
1782 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
1783 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
1784 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
1785 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
1786 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
1787 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
1788 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
1789 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
1790 <!-- RTX sources (handlers GCC) -->
1791 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s" condition="CM0_GCC"/>
1792 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM3_GCC"/>
1793 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM4_GCC"/>
1794 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM4_FP_GCC"/>
1795 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM7_GCC"/>
1796 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM7_FP_GCC"/>
1797 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s" condition="ARMv8MBL_GCC"/>
1798 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s" condition="ARMv8MML_GCC"/>
1799 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="ARMv8MML_FP_GCC"/>
1800 </files>
1801 </component>
1802 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Debug NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M Debug">
1803 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Debug)</description>
1804 <RTE_Components_h>
1805 <!-- the following content goes into file 'RTE_Components.h' -->
1806 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1807 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1808 #define RTE_CMSIS_RTOS2_RTX5_DEBUG /* CMSIS-RTOS2 Keil RTX5 Debug */
1809 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
1810 </RTE_Components_h>
1811 <files>
1812 <!-- RTX documentation -->
1813 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1814
1815 <!-- RTX header files -->
1816 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1817 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1818
1819 <!-- RTX configuration -->
1820 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1821
1822 <!-- RTX templates -->
1823 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1824 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1825 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1826
1827 <!-- RTX sources (core) -->
1828 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
1829 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
1830 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
1831 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
1832 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
1833 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
1834 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
1835 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
1836 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
1837 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
1838 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
1839 <!-- RTX sources (ARMCC handlers) -->
1840 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
1841 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
1842 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
1843 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
1844 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
1845 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
1846 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
1847 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
1848 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
1849 <!-- RTX sources (GCC handlers) -->
1850 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s" condition="CM0_GCC"/>
1851 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM3_GCC"/>
1852 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM4_GCC"/>
1853 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM4_FP_GCC"/>
1854 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM7_GCC"/>
1855 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM7_FP_GCC"/>
1856 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s" condition="ARMv8MBL_GCC"/>
1857 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s" condition="ARMv8MML_GCC"/>
1858 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="ARMv8MML_FP_GCC"/>
1859 </files>
1860 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1861
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1862 </components>
1863
1864 <boards>
1865 <board name="uVision Simulator" vendor="Keil">
1866 <description>uVision Simulator</description>
1867 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1868 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1869 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1870 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1871 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1872 </board>
1873 </boards>
1874
1875 <examples>
1876 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1877 <description>DSP_Lib Class Marks example</description>
1878 <board name="uVision Simulator" vendor="Keil"/>
1879 <project>
1880 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1881 </project>
1882 <attributes>
1883 <component Cclass="CMSIS" Cgroup="CORE"/>
1884 <component Cclass="CMSIS" Cgroup="DSP"/>
1885 <component Cclass="Device" Cgroup="Startup"/>
1886 <category>Getting Started</category>
1887 </attributes>
1888 </example>
1889
1890 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1891 <description>DSP_Lib Convolution example</description>
1892 <board name="uVision Simulator" vendor="Keil"/>
1893 <project>
1894 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1895 </project>
1896 <attributes>
1897 <component Cclass="CMSIS" Cgroup="CORE"/>
1898 <component Cclass="CMSIS" Cgroup="DSP"/>
1899 <component Cclass="Device" Cgroup="Startup"/>
1900 <category>Getting Started</category>
1901 </attributes>
1902 </example>
1903
1904 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1905 <description>DSP_Lib Dotproduct example</description>
1906 <board name="uVision Simulator" vendor="Keil"/>
1907 <project>
1908 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1909 </project>
1910 <attributes>
1911 <component Cclass="CMSIS" Cgroup="CORE"/>
1912 <component Cclass="CMSIS" Cgroup="DSP"/>
1913 <component Cclass="Device" Cgroup="Startup"/>
1914 <category>Getting Started</category>
1915 </attributes>
1916 </example>
1917
1918 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1919 <description>DSP_Lib FFT Bin example</description>
1920 <board name="uVision Simulator" vendor="Keil"/>
1921 <project>
1922 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1923 </project>
1924 <attributes>
1925 <component Cclass="CMSIS" Cgroup="CORE"/>
1926 <component Cclass="CMSIS" Cgroup="DSP"/>
1927 <component Cclass="Device" Cgroup="Startup"/>
1928 <category>Getting Started</category>
1929 </attributes>
1930 </example>
1931
1932 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1933 <description>DSP_Lib FIR example</description>
1934 <board name="uVision Simulator" vendor="Keil"/>
1935 <project>
1936 <environment name="uv" load="arm_fir_example.uvprojx"/>
1937 </project>
1938 <attributes>
1939 <component Cclass="CMSIS" Cgroup="CORE"/>
1940 <component Cclass="CMSIS" Cgroup="DSP"/>
1941 <component Cclass="Device" Cgroup="Startup"/>
1942 <category>Getting Started</category>
1943 </attributes>
1944 </example>
1945
1946 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1947 <description>DSP_Lib Graphic Equalizer example</description>
1948 <board name="uVision Simulator" vendor="Keil"/>
1949 <project>
1950 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1951 </project>
1952 <attributes>
1953 <component Cclass="CMSIS" Cgroup="CORE"/>
1954 <component Cclass="CMSIS" Cgroup="DSP"/>
1955 <component Cclass="Device" Cgroup="Startup"/>
1956 <category>Getting Started</category>
1957 </attributes>
1958 </example>
1959
1960 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1961 <description>DSP_Lib Linear Interpolation example</description>
1962 <board name="uVision Simulator" vendor="Keil"/>
1963 <project>
1964 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1965 </project>
1966 <attributes>
1967 <component Cclass="CMSIS" Cgroup="CORE"/>
1968 <component Cclass="CMSIS" Cgroup="DSP"/>
1969 <component Cclass="Device" Cgroup="Startup"/>
1970 <category>Getting Started</category>
1971 </attributes>
1972 </example>
1973
1974 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1975 <description>DSP_Lib Matrix example</description>
1976 <board name="uVision Simulator" vendor="Keil"/>
1977 <project>
1978 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1979 </project>
1980 <attributes>
1981 <component Cclass="CMSIS" Cgroup="CORE"/>
1982 <component Cclass="CMSIS" Cgroup="DSP"/>
1983 <component Cclass="Device" Cgroup="Startup"/>
1984 <category>Getting Started</category>
1985 </attributes>
1986 </example>
1987
1988 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1989 <description>DSP_Lib Signal Convergence example</description>
1990 <board name="uVision Simulator" vendor="Keil"/>
1991 <project>
1992 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1993 </project>
1994 <attributes>
1995 <component Cclass="CMSIS" Cgroup="CORE"/>
1996 <component Cclass="CMSIS" Cgroup="DSP"/>
1997 <component Cclass="Device" Cgroup="Startup"/>
1998 <category>Getting Started</category>
1999 </attributes>
2000 </example>
2001
2002 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2003 <description>DSP_Lib Sinus/Cosinus example</description>
2004 <board name="uVision Simulator" vendor="Keil"/>
2005 <project>
2006 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2007 </project>
2008 <attributes>
2009 <component Cclass="CMSIS" Cgroup="CORE"/>
2010 <component Cclass="CMSIS" Cgroup="DSP"/>
2011 <component Cclass="Device" Cgroup="Startup"/>
2012 <category>Getting Started</category>
2013 </attributes>
2014 </example>
2015
2016 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2017 <description>DSP_Lib Variance example</description>
2018 <board name="uVision Simulator" vendor="Keil"/>
2019 <project>
2020 <environment name="uv" load="arm_variance_example.uvprojx"/>
2021 </project>
2022 <attributes>
2023 <component Cclass="CMSIS" Cgroup="CORE"/>
2024 <component Cclass="CMSIS" Cgroup="DSP"/>
2025 <component Cclass="Device" Cgroup="Startup"/>
2026 <category>Getting Started</category>
2027 </attributes>
2028 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2029
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2030 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2031 <description>CMSIS-RTOS2 Blinky example</description>
2032 <board name="uVision Simulator" vendor="Keil"/>
2033 <project>
2034 <environment name="uv" load="Blinky.uvprojx"/>
2035 </project>
2036 <attributes>
2037 <component Cclass="CMSIS" Cgroup="CORE"/>
2038 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2039 <component Cclass="Device" Cgroup="Startup"/>
2040 <category>Getting Started</category>
2041 </attributes>
2042 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2043
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2044 </examples>
2045
2046</package>