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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / c45bb4a131ffe8b378b8367821cbc44bac76c19b / . / ARM.CMSIS.pdsc
blob: 4bf9decbbeb5921dcd85d395aed2909260624b18 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame^]11 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]12 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]13 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]14 - Added support for Cortex-M23 and Cortex-M33.
15 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]16 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]17 - Added cmsis_compiler.h to unify compiler behaviour.
18 - Updated function SCB_EnableICache (for Cortex-M7).
19 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
20 CMSIS-RTOS:
21 - bug fix in RTX 4.82 (see revision history for details)
22 CMSIS-RTOS2:
23 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]24 - reference implementation based on RTX5
25 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]26 CMSIS-SVD:
27 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]28 - removed SVD file database documentation as SVD files are distributed in packs
29 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]30 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]31 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
32 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]33 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]34 <release version="4.5.0" date="2015-10-28">
35 - CMSIS-Core 4.30.0 (see revision history for details)
36 - CMSIS-DAP 1.1.0 (unchanged)
37 - CMSIS-Driver 2.04.0 (see revision history for details)
38 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
39 - CMSIS-PACK 1.4.1 (see revision history for details)
40 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
41 - CMSIS-SVD 1.3.1 (see revision history for details)
42 </release>
43 <release version="4.4.0" date="2015-09-11">
44 - CMSIS-Core 4.20 (see revision history for details)
45 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
46 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
47 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
48 - CMSIS-RTOS
49 -- API 1.02 (unchanged)
50 -- RTX 4.79 (see revision history for details)
51 - CMSIS-SVD 1.3.0 (see revision history for details)
52 - CMSIS-DAP 1.1.0 (extended with SWO support)
53 </release>
54 <release version="4.3.0" date="2015-03-20">
55 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
56 - CMSIS-DSP 1.4.5 (see revision history for details)
57 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
58 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
59 - CMSIS-RTOS
60 -- API 1.02 (unchanged)
61 -- RTX 4.78 (see revision history for details)
62 - CMSIS-SVD 1.2 (unchanged)
63 </release>
64 <release version="4.2.0" date="2014-09-24">
65 Adding Cortex-M7 support
66 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
67 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
68 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
69 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
70 - CMSIS-RTOS RTX 4.75 (see revision history for details)
71 </release>
72 <release version="4.1.1" date="2014-06-30">
73 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
74 </release>
75 <release version="4.1.0" date="2014-06-12">
76 - CMSIS-Driver 2.02 (incompatible update)
77 - CMSIS-Pack 1.3 (see revision history for details)
78 - CMSIS-DSP 1.4.2 (unchanged)
79 - CMSIS-Core 3.30 (unchanged)
80 - CMSIS-RTOS RTX 4.74 (unchanged)
81 - CMSIS-RTOS API 1.02 (unchanged)
82 - CMSIS-SVD 1.10 (unchanged)
83 PACK:
84 - removed G++ specific files from PACK
85 - added Component Startup variant "C Startup"
86 - added Pack Checking Utility
87 - updated conditions to reflect tool-chain dependency
88 - added Taxonomy for Graphics
89 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
90 </release>
91 <release version="4.0.0">
92 - CMSIS-Driver 2.00 Preliminary (incompatible update)
93 - CMSIS-Pack 1.1 Preliminary
94 - CMSIS-DSP 1.4.2 (see revision history for details)
95 - CMSIS-Core 3.30 (see revision history for details)
96 - CMSIS-RTOS RTX 4.74 (see revision history for details)
97 - CMSIS-RTOS API 1.02 (unchanged)
98 - CMSIS-SVD 1.10 (unchanged)
99 </release>
100 <release version="3.20.4">
101 - CMSIS-RTOS 4.74 (see revision history for details)
102 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
103 </release>
104 <release version="3.20.3">
105 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
106 - CMSIS-RTOS 4.73 (see revision history for details)
107 </release>
108 <release version="3.20.2">
109 - CMSIS-Pack documentation has been added
110 - CMSIS-Drivers header and documentation have been added to PACK
111 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
112 </release>
113 <release version="3.20.1">
114 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
115 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
116 </release>
117 <release version="3.20.0">
118 The software portions that are deployed in the application program are now under a BSD license which allows usage
119 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
120 The individual components have been update as listed below:
121 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
122 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
123 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
124 - CMSIS-SVD is unchanged.
125 </release>
126 </releases>
127
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]128 <taxonomy>
129 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
130 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
131 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
132 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
133 <description Cclass="File System">File Drive Support and File System</description>
134 <description Cclass="Graphics">Graphical User Interface</description>
135 <description Cclass="Network">Network Stack using Internet Protocols</description>
136 <description Cclass="USB">Universal Serial Bus Stack</description>
137 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
138 </taxonomy>
139
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]140 <devices>
141 <!-- ****************************** Cortex-M0 ****************************** -->
142 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]143 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]144 <description>
145The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
146- simple, easy-to-use programmers model
147- highly efficient ultra-low power operation
148- excellent code density
149- deterministic, high-performance interrupt handling
150- upward compatibility with the rest of the Cortex-M processor family.
151 </description>
152 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
153 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
154 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
155 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
156
157 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]158 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]159 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
160 </device>
161 </family>
162
163 <!-- ****************************** Cortex-M0P ****************************** -->
164 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]165 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]166 <description>
167The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
168- simple, easy-to-use programmers model
169- highly efficient ultra-low power operation
170- excellent code density
171- deterministic, high-performance interrupt handling
172- upward compatibility with the rest of the Cortex-M processor family.
173 </description>
174 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
175 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
176 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
177 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
178
179 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]180 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]181 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
182 </device>
183 </family>
184
185 <!-- ****************************** Cortex-M3 ****************************** -->
186 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]187 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]188 <description>
189The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
190- simple, easy-to-use programmers model
191- highly efficient ultra-low power operation
192- excellent code density
193- deterministic, high-performance interrupt handling
194- upward compatibility with the rest of the Cortex-M processor family.
195 </description>
196 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
197 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
198 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
199 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
200
201 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]202 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]203 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
204 </device>
205 </family>
206
207 <!-- ****************************** Cortex-M4 ****************************** -->
208 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]209 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]210 <description>
211The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
212- simple, easy-to-use programmers model
213- highly efficient ultra-low power operation
214- excellent code density
215- deterministic, high-performance interrupt handling
216- upward compatibility with the rest of the Cortex-M processor family.
217 </description>
218 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
219 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
220 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
221 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
222
223 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]224 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]225 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
226 </device>
227
228 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]229 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]230 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
231 </device>
232 </family>
233
234 <!-- ****************************** Cortex-M7 ****************************** -->
235 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]236 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]237 <description>
238The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
239- simple, easy-to-use programmers model
240- highly efficient ultra-low power operation
241- excellent code density
242- deterministic, high-performance interrupt handling
243- upward compatibility with the rest of the Cortex-M processor family.
244 </description>
245 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
246 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
247 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
248 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
249
250 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]251 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]252 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
253 </device>
254
255 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]256 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]257 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
258 </device>
259
260 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]261 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]262 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
263 </device>
264 </family>
265
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]266 <!-- ****************************** Cortex-M23 ********************** -->
267 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
268 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
269 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]270The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
271It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
272Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]273 </description>
274 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]275 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
276 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]277 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]278 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]279 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
280
281 <device Dname="ARMCM23">
282 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
283 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
284 </device>
285
286 <device Dname="ARMCM23_TZ">
287 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
288 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
289 </device>
290 </family>
291
292 <!-- ****************************** Cortex-M33 ****************************** -->
293 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
294 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
295 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]296The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
297class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]298 </description>
299 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]300 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
301 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]302 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]303 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
304 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]305
306 <device Dname="ARMCM33">
307 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
308 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
309 </device>
310
311 <device Dname="ARMCM33_TZ">
312 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
313 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
314 </device>
315
316 <device Dname="ARMCM33_DSP_FP">
317 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
318 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
319 </device>
320
321 <device Dname="ARMCM33_DSP_FP_TZ">
322 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
323 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
324 </device>
325 </family>
326
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]327 <!-- ****************************** ARMSC000 ****************************** -->
328 <family Dfamily="ARM SC000" Dvendor="ARM:82">
329 <description>
330The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
331- simple, easy-to-use programmers model
332- highly efficient ultra-low power operation
333- excellent code density
334- deterministic, high-performance interrupt handling
335 </description>
336 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
337 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
338 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
339 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
340
341 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]342 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]343 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
344 </device>
345 </family>
346
347 <!-- ****************************** ARMSC300 ****************************** -->
348 <family Dfamily="ARM SC300" Dvendor="ARM:82">
349 <description>
350The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
351- simple, easy-to-use programmers model
352- highly efficient ultra-low power operation
353- excellent code density
354- deterministic, high-performance interrupt handling
355 </description>
356 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
357 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
358 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
359 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
360
361 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]362 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]363 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
364 </device>
365 </family>
366
367 <!-- ****************************** ARMv8-M Baseline ********************** -->
368 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
369 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
370 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]371ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]372 </description>
373 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]374 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
375 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]376 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]377 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]378 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
379
380 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]381 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]382 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
383 </device>
384 </family>
385
386 <!-- ****************************** ARMv8-M Mainline ****************************** -->
387 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
388 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
389 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]390ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]391 </description>
392 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]393 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
394 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]395 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]396 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]397 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
398
399 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]400 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]401 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
402 </device>
403
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]404 <device Dname="ARMv8MML_DSP">
405 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]406 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]407 </device>
408
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]409 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]410 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]411 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
412 </device>
413
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]414 <device Dname="ARMv8MML_DSP_SP">
415 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]416 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]417 </device>
418
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]419 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]420 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]421 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
422 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]423
424 <device Dname="ARMv8MML_DSP_DP">
425 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]426 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]427 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]428 </family>
429
430 </devices>
431
432
433 <apis>
434 <!-- CMSIS-RTOS API -->
435 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
436 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
437 <files>
438 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
439 </files>
440 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]441 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]442 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
443 <files>
444 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
445 </files>
446 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]447 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
448 <description>USART Driver API for Cortex-M</description>
449 <files>
450 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
451 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
452 </files>
453 </api>
454 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
455 <description>SPI Driver API for Cortex-M</description>
456 <files>
457 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
458 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
459 </files>
460 </api>
461 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
462 <description>SAI Driver API for Cortex-M</description>
463 <files>
464 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
465 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
466 </files>
467 </api>
468 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
469 <description>I2C Driver API for Cortex-M</description>
470 <files>
471 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
472 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
473 </files>
474 </api>
475 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
476 <description>CAN Driver API for Cortex-M</description>
477 <files>
478 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
479 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
480 </files>
481 </api>
482 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
483 <description>Flash Driver API for Cortex-M</description>
484 <files>
485 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
486 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
487 </files>
488 </api>
489 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
490 <description>MCI Driver API for Cortex-M</description>
491 <files>
492 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
493 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
494 </files>
495 </api>
496 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
497 <description>NAND Flash Driver API for Cortex-M</description>
498 <files>
499 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
500 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
501 </files>
502 </api>
503 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
504 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
505 <files>
506 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
507 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
508 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
509 </files>
510 </api>
511 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
512 <description>Ethernet MAC Driver API for Cortex-M</description>
513 <files>
514 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
515 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
516 </files>
517 </api>
518 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
519 <description>Ethernet PHY Driver API for Cortex-M</description>
520 <files>
521 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
522 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
523 </files>
524 </api>
525 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
526 <description>USB Device Driver API for Cortex-M</description>
527 <files>
528 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
529 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
530 </files>
531 </api>
532 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
533 <description>USB Host Driver API for Cortex-M</description>
534 <files>
535 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
536 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
537 </files>
538 </api>
539 </apis>
540
541 <!-- conditions are dependency rules that can apply to a component or an individual file -->
542 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]543 <!-- compiler -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]544 <condition id="ARMCC">
545 <require Tcompiler="ARMCC"/>
546 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]547 <condition id="GCC">
548 <require Tcompiler="GCC"/>
549 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]550 <condition id="IAR">
551 <require Tcompiler="IAR"/>
552 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]553 <condition id="ARMCC GCC">
554 <accept Tcompiler="ARMCC"/>
555 <accept Tcompiler="GCC"/>
556 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]557 <condition id="ARMCC GCC IAR">
558 <accept Tcompiler="ARMCC"/>
559 <accept Tcompiler="GCC"/>
560 <accept Tcompiler="IAR"/>
561 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]562
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]563 <!-- ARM architecture -->
564 <condition id="ARMv6-M Device">
565 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]566 <accept Dcore="Cortex-M0"/>
567 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]568 <accept Dcore="SC000"/>
569 </condition>
570 <condition id="ARMv7-M Device">
571 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]572 <accept Dcore="Cortex-M3"/>
573 <accept Dcore="Cortex-M4"/>
574 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]575 <accept Dcore="SC300"/>
576 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]577 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]578 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]579 <accept Dcore="ARMV8MBL"/>
580 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]581 <accept Dcore="Cortex-M23"/>
582 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]583 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]584 <condition id="ARMv8-M TZ Device">
585 <description>ARMv8-M architecture based device with TrustZone</description>
586 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]587 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]588 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]589 <condition id="ARMv6_7-M Device">
590 <description>ARMv6_7-M architecture based device</description>
591 <accept condition="ARMv6-M Device"/>
592 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]593 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]594 <condition id="ARMv6_7_8-M Device">
595 <description>ARMv6_7_8-M architecture based device</description>
596 <accept condition="ARMv6-M Device"/>
597 <accept condition="ARMv7-M Device"/>
598 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]599 </condition>
600
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]601 <!-- ARM core -->
602 <condition id="CM0">
603 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
604 <accept Dcore="Cortex-M0"/>
605 <accept Dcore="Cortex-M0+"/>
606 <accept Dcore="SC000"/>
607 </condition>
608 <condition id="CM3">
609 <description>Cortex-M3 or SC300 processor based device</description>
610 <accept Dcore="Cortex-M3"/>
611 <accept Dcore="SC300"/>
612 </condition>
613 <condition id="CM4">
614 <description>Cortex-M4 processor based device</description>
615 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
616 </condition>
617 <condition id="CM4_FP">
618 <description>Cortex-M4 processor based device using Floating Point Unit</description>
619 <require Dcore="Cortex-M4" Dfpu="FPU"/>
620 </condition>
621 <condition id="CM7">
622 <description>Cortex-M7 processor based device</description>
623 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
624 </condition>
625 <condition id="CM7_FP">
626 <description>Cortex-M7 processor based device using Floating Point Unit</description>
627 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
628 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
629 </condition>
630 <condition id="CM7_SP">
631 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
632 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
633 </condition>
634 <condition id="CM7_DP">
635 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
636 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
637 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]638 <condition id="CM23">
639 <description>Cortex-M23 processor based device</description>
640 <require Dcore="Cortex-M23"/>
641 </condition>
642 <condition id="CM33">
643 <description>Cortex-M33 processor based device</description>
644 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
645 </condition>
646 <condition id="CM33_DSP">
647 <description>Cortex-M33 processor based device with DSP extension</description>
648 <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
649 </condition>
650 <condition id="CM33_FP">
651 <description>Cortex-M33 processor based device using Floating Point Unit</description>
652 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
653 </condition>
654 <condition id="CM33_SP">
655 <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
656 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
657 </condition>
658 <condition id="CM33_DSP_SP">
659 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
660 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
661 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]662 <condition id="ARMv8MBL">
663 <description>ARMv8-M Baseline processor based device</description>
664 <require Dcore="ARMV8MBL"/>
665 </condition>
666 <condition id="ARMv8MML">
667 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]668 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
669 </condition>
670 <condition id="ARMv8MML_DSP">
671 <description>ARMv8-M Mainline processor based device with DSP extension</description>
672 <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]673 </condition>
674 <condition id="ARMv8MML_FP">
675 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
676 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
677 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]678 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]679 <condition id="ARMv8MML_SP">
680 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
681 <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
682 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]683 <condition id="ARMv8MML_DSP_SP">
684 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
685 <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
686 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]687 <condition id="ARMv8MML_DP">
688 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
689 <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
690 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]691 <condition id="ARMv8MML_DSP_DP">
692 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
693 <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
694 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]695
696 <!-- ARMCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]697 <condition id="CM0_ARMCC">
698 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
699 <require condition="CM0"/>
700 <require Tcompiler="ARMCC"/>
701 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]702 <condition id="CM0_LE_ARMCC">
703 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]704 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]705 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]706 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]707 <condition id="CM0_BE_ARMCC">
708 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]709 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]710 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]711 </condition>
712
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]713 <condition id="CM3_ARMCC">
714 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
715 <require condition="CM3"/>
716 <require Tcompiler="ARMCC"/>
717 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]718 <condition id="CM3_LE_ARMCC">
719 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]720 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]721 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]722 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]723 <condition id="CM3_BE_ARMCC">
724 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]725 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]726 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]727 </condition>
728
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]729 <condition id="CM4_ARMCC">
730 <description>Cortex-M4 processor based device for the ARM Compiler</description>
731 <require condition="CM4"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]734 <condition id="CM4_LE_ARMCC">
735 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]736 <require condition="CM4_ARMCC"/>
737 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]738 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]739 <condition id="CM4_BE_ARMCC">
740 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]741 <require condition="CM4_ARMCC"/>
742 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]743 </condition>
744
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]745 <condition id="CM4_FP_ARMCC">
746 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
747 <require condition="CM4_FP"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]751 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]752 <require condition="CM4_FP_ARMCC"/>
753 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]754 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]755 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]756 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]757 <require condition="CM4_FP_ARMCC"/>
758 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]759 </condition>
760
761 <!-- XMC 4000 Series devices from Infineon require a special library -->
762 <condition id="CM4_LE_ARMCC_STD">
763 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
764 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
765 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
766 <require Tcompiler="ARMCC"/>
767 </condition>
768 <condition id="CM4_LE_ARMCC_IFX">
769 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
770 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
771 <require Tcompiler="ARMCC"/>
772 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]773 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]774 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
775 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
776 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
777 <require Tcompiler="ARMCC"/>
778 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]779 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]780 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
781 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
782 <require Tcompiler="ARMCC"/>
783 </condition>
784
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]785 <condition id="CM7_ARMCC">
786 <description>Cortex-M7 processor based device for the ARM Compiler</description>
787 <require condition="CM7"/>
788 <require Tcompiler="ARMCC"/>
789 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]790 <condition id="CM7_LE_ARMCC">
791 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]792 <require condition="CM7_ARMCC"/>
793 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]794 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]795 <condition id="CM7_BE_ARMCC">
796 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]797 <require condition="CM7_ARMCC"/>
798 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]799 </condition>
800
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]801 <condition id="CM7_FP_ARMCC">
802 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
803 <require condition="CM7_FP"/>
804 <require Tcompiler="ARMCC"/>
805 </condition>
806 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]807 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]808 <require condition="CM7_FP_ARMCC"/>
809 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]810 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]811 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]812 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]813 <require condition="CM7_FP_ARMCC"/>
814 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]815 </condition>
816
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]817 <condition id="CM7_SP_ARMCC">
818 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
819 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]820 <require Tcompiler="ARMCC"/>
821 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]822 <condition id="CM7_SP_LE_ARMCC">
823 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
824 <require condition="CM7_SP_ARMCC"/>
825 <require Dendian="Little-endian"/>
826 </condition>
827 <condition id="CM7_SP_BE_ARMCC">
828 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
829 <require condition="CM7_SP_ARMCC"/>
830 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]831 </condition>
832
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]833 <condition id="CM7_DP_ARMCC">
834 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
835 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]836 <require Tcompiler="ARMCC"/>
837 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]838 <condition id="CM7_DP_LE_ARMCC">
839 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
840 <require condition="CM7_DP_ARMCC"/>
841 <require Dendian="Little-endian"/>
842 </condition>
843 <condition id="CM7_DP_BE_ARMCC">
844 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
845 <require condition="CM7_DP_ARMCC"/>
846 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]847 </condition>
848
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]849 <condition id="CM23_ARMCC">
850 <description>Cortex-M23 processor based device for the ARM Compiler</description>
851 <require condition="CM23"/>
852 <require Tcompiler="ARMCC"/>
853 </condition>
854 <condition id="CM23_LE_ARMCC">
855 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
856 <require condition="CM23_ARMCC"/>
857 <require Dendian="Little-endian"/>
858 </condition>
859 <condition id="CM23_BE_ARMCC">
860 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
861 <require condition="CM23_ARMCC"/>
862 <require Dendian="Big-endian"/>
863 </condition>
864
865 <condition id="CM33_ARMCC">
866 <description>Cortex-M33 processor based device for the ARM Compiler</description>
867 <require condition="CM33"/>
868 <require Tcompiler="ARMCC"/>
869 </condition>
870 <condition id="CM33_LE_ARMCC">
871 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
872 <require condition="CM33_ARMCC"/>
873 <require Dendian="Little-endian"/>
874 </condition>
875 <condition id="CM33_BE_ARMCC">
876 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
877 <require condition="CM33_ARMCC"/>
878 <require Dendian="Big-endian"/>
879 </condition>
880
881 <condition id="CM33_DSP_ARMCC">
882 <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
883 <require condition="CM33_DSP"/>
884 <require Tcompiler="ARMCC"/>
885 </condition>
886 <condition id="CM33_DSP_LE_ARMCC">
887 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
888 <require condition="CM33_DSP_ARMCC"/>
889 <require Dendian="Little-endian"/>
890 </condition>
891 <condition id="CM33_DSP_BE_ARMCC">
892 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
893 <require condition="CM33_DSP_ARMCC"/>
894 <require Dendian="Big-endian"/>
895 </condition>
896
897 <condition id="CM33_FP_ARMCC">
898 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
899 <require condition="CM33_FP"/>
900 <require Tcompiler="ARMCC"/>
901 </condition>
902 <condition id="CM33_FP_LE_ARMCC">
903 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
904 <require condition="CM33_FP_ARMCC"/>
905 <require Dendian="Little-endian"/>
906 </condition>
907 <condition id="CM33_FP_BE_ARMCC">
908 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
909 <require condition="CM33_FP_ARMCC"/>
910 <require Dendian="Big-endian"/>
911 </condition>
912
913 <condition id="CM33_SP_ARMCC">
914 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
915 <require condition="CM33_SP"/>
916 <require Tcompiler="ARMCC"/>
917 </condition>
918 <condition id="CM33_SP_LE_ARMCC">
919 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
920 <require condition="CM33_SP_ARMCC"/>
921 <require Dendian="Little-endian"/>
922 </condition>
923 <condition id="CM33_SP_BE_ARMCC">
924 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
925 <require condition="CM33_SP_ARMCC"/>
926 <require Dendian="Big-endian"/>
927 </condition>
928
929 <condition id="CM33_DSP_SP_ARMCC">
930 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
931 <require condition="CM33_DSP_SP"/>
932 <require Tcompiler="ARMCC"/>
933 </condition>
934 <condition id="CM33_DSP_SP_LE_ARMCC">
935 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
936 <require condition="CM33_DSP_SP_ARMCC"/>
937 <require Dendian="Little-endian"/>
938 </condition>
939 <condition id="CM33_DSP_SP_BE_ARMCC">
940 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
941 <require condition="CM33_DSP_SP_ARMCC"/>
942 <require Dendian="Big-endian"/>
943 </condition>
944
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]945 <condition id="ARMv8MBL_ARMCC">
946 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
947 <require condition="ARMv8MBL"/>
948 <require Tcompiler="ARMCC"/>
949 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]950 <condition id="ARMv8MBL_LE_ARMCC">
951 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]952 <require condition="ARMv8MBL_ARMCC"/>
953 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]954 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]955 <condition id="ARMv8MBL_BE_ARMCC">
956 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
957 <require condition="ARMv8MBL_ARMCC"/>
958 <require Dendian="Big-endian"/>
959 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]960
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]961 <condition id="ARMv8MML_ARMCC">
962 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
963 <require condition="ARMv8MML"/>
964 <require Tcompiler="ARMCC"/>
965 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]966 <condition id="ARMv8MML_LE_ARMCC">
967 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]968 <require condition="ARMv8MML_ARMCC"/>
969 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]970 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]971 <condition id="ARMv8MML_BE_ARMCC">
972 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
973 <require condition="ARMv8MML_ARMCC"/>
974 <require Dendian="Big-endian"/>
975 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]976
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]977 <condition id="ARMv8MML_DSP_ARMCC">
978 <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
979 <require condition="ARMv8MML_DSP"/>
980 <require Tcompiler="ARMCC"/>
981 </condition>
982 <condition id="ARMv8MML_DSP_LE_ARMCC">
983 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
984 <require condition="ARMv8MML_DSP_ARMCC"/>
985 <require Dendian="Little-endian"/>
986 </condition>
987 <condition id="ARMv8MML_DSP_BE_ARMCC">
988 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
989 <require condition="ARMv8MML_DSP_ARMCC"/>
990 <require Dendian="Big-endian"/>
991 </condition>
992
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]993 <condition id="ARMv8MML_FP_ARMCC">
994 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
995 <require condition="ARMv8MML_FP"/>
996 <require Tcompiler="ARMCC"/>
997 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]998 <condition id="ARMv8MML_FP_LE_ARMCC">
999 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1000 <require condition="ARMv8MML_FP_ARMCC"/>
1001 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1002 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1003 <condition id="ARMv8MML_FP_BE_ARMCC">
1004 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1005 <require condition="ARMv8MML_FP_ARMCC"/>
1006 <require Dendian="Big-endian"/>
1007 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1008
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1009 <condition id="ARMv8MML_SP_ARMCC">
1010 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1011 <require condition="ARMv8MML_SP"/>
1012 <require Tcompiler="ARMCC"/>
1013 </condition>
1014 <condition id="ARMv8MML_SP_LE_ARMCC">
1015 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1016 <require condition="ARMv8MML_SP_ARMCC"/>
1017 <require Dendian="Little-endian"/>
1018 </condition>
1019 <condition id="ARMv8MML_SP_BE_ARMCC">
1020 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1021 <require condition="ARMv8MML_SP_ARMCC"/>
1022 <require Dendian="Big-endian"/>
1023 </condition>
1024
1025 <condition id="ARMv8MML_DSP_SP_ARMCC">
1026 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1027 <require condition="ARMv8MML_DSP_SP"/>
1028 <require Tcompiler="ARMCC"/>
1029 </condition>
1030 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1031 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1032 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1033 <require Dendian="Little-endian"/>
1034 </condition>
1035 <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1036 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1037 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1038 <require Dendian="Big-endian"/>
1039 </condition>
1040
1041 <condition id="ARMv8MML_DP_ARMCC">
1042 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1043 <require condition="ARMv8MML_DP"/>
1044 <require Tcompiler="ARMCC"/>
1045 </condition>
1046 <condition id="ARMv8MML_DP_LE_ARMCC">
1047 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1048 <require condition="ARMv8MML_DP_ARMCC"/>
1049 <require Dendian="Little-endian"/>
1050 </condition>
1051 <condition id="ARMv8MML_DP_BE_ARMCC">
1052 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1053 <require condition="ARMv8MML_DP_ARMCC"/>
1054 <require Dendian="Big-endian"/>
1055 </condition>
1056
1057 <condition id="ARMv8MML_DSP_DP_ARMCC">
1058 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1059 <require condition="ARMv8MML_DSP_DP"/>
1060 <require Tcompiler="ARMCC"/>
1061 </condition>
1062 <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1063 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1064 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1065 <require Dendian="Little-endian"/>
1066 </condition>
1067 <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1068 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1069 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1070 <require Dendian="Big-endian"/>
1071 </condition>
1072
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1073 <!-- GCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1074 <condition id="CM0_GCC">
1075 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1076 <require condition="CM0"/>
1077 <require Tcompiler="GCC"/>
1078 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1079 <condition id="CM0_LE_GCC">
1080 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1081 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1082 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1083 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1084 <condition id="CM0_BE_GCC">
1085 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1086 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1087 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1088 </condition>
1089
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1090 <condition id="CM3_GCC">
1091 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1092 <require condition="CM3"/>
1093 <require Tcompiler="GCC"/>
1094 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1095 <condition id="CM3_LE_GCC">
1096 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1097 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1098 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1099 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1100 <condition id="CM3_BE_GCC">
1101 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1102 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1103 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1104 </condition>
1105
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1106 <condition id="CM4_GCC">
1107 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1108 <require condition="CM4"/>
1109 <require Tcompiler="GCC"/>
1110 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1111 <condition id="CM4_LE_GCC">
1112 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1113 <require condition="CM4_GCC"/>
1114 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1115 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1116 <condition id="CM4_BE_GCC">
1117 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1118 <require condition="CM4_GCC"/>
1119 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1120 </condition>
1121
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1122 <condition id="CM4_FP_GCC">
1123 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1124 <require condition="CM4_FP"/>
1125 <require Tcompiler="GCC"/>
1126 </condition>
1127 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1128 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1129 <require condition="CM4_FP_GCC"/>
1130 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1131 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1132 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1133 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1134 <require condition="CM4_FP_GCC"/>
1135 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1136 </condition>
1137
1138 <!-- XMC 4000 Series devices from Infineon require a special library -->
1139 <condition id="CM4_LE_GCC_STD">
1140 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1141 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1142 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1143 <require Tcompiler="GCC"/>
1144 </condition>
1145 <condition id="CM4_LE_GCC_IFX">
1146 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1147 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1148 <require Tcompiler="GCC"/>
1149 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1150 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1151 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1152 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1153 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1154 <require Tcompiler="GCC"/>
1155 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1156 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1157 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1158 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1159 <require Tcompiler="GCC"/>
1160 </condition>
1161
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1162 <condition id="CM7_GCC">
1163 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1164 <require condition="CM7"/>
1165 <require Tcompiler="GCC"/>
1166 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1167 <condition id="CM7_LE_GCC">
1168 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1169 <require condition="CM7_GCC"/>
1170 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1171 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1172 <condition id="CM7_BE_GCC">
1173 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1174 <require condition="CM7_GCC"/>
1175 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1176 </condition>
1177
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1178 <condition id="CM7_FP_GCC">
1179 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1180 <require condition="CM7_FP"/>
1181 <require Tcompiler="GCC"/>
1182 </condition>
1183 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1184 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1185 <require condition="CM7_FP_GCC"/>
1186 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1187 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1188 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1189 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1190 <require condition="CM7_FP_GCC"/>
1191 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1192 </condition>
1193
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1194 <condition id="CM7_SP_GCC">
1195 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1196 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1197 <require Tcompiler="GCC"/>
1198 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1199 <condition id="CM7_SP_LE_GCC">
1200 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1201 <require condition="CM7_SP_GCC"/>
1202 <require Dendian="Little-endian"/>
1203 </condition>
1204 <condition id="CM7_SP_BE_GCC">
1205 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1206 <require condition="CM7_SP_GCC"/>
1207 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1208 </condition>
1209
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1210 <condition id="CM7_DP_GCC">
1211 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1212 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1213 <require Tcompiler="GCC"/>
1214 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1215 <condition id="CM7_DP_LE_GCC">
1216 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1217 <require condition="CM7_DP_GCC"/>
1218 <require Dendian="Little-endian"/>
1219 </condition>
1220 <condition id="CM7_DP_BE_GCC">
1221 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1222 <require condition="CM7_DP_GCC"/>
1223 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1224 </condition>
1225
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1226 <condition id="CM23_GCC">
1227 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1228 <require condition="CM23"/>
1229 <require Tcompiler="GCC"/>
1230 </condition>
1231 <condition id="CM23_LE_GCC">
1232 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1233 <require condition="CM23_GCC"/>
1234 <require Dendian="Little-endian"/>
1235 </condition>
1236 <condition id="CM23_BE_GCC">
1237 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1238 <require condition="CM23_GCC"/>
1239 <require Dendian="Big-endian"/>
1240 </condition>
1241
1242 <condition id="CM33_GCC">
1243 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1244 <require condition="CM33"/>
1245 <require Tcompiler="GCC"/>
1246 </condition>
1247 <condition id="CM33_LE_GCC">
1248 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1249 <require condition="CM33_GCC"/>
1250 <require Dendian="Little-endian"/>
1251 </condition>
1252 <condition id="CM33_BE_GCC">
1253 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1254 <require condition="CM33_GCC"/>
1255 <require Dendian="Big-endian"/>
1256 </condition>
1257
1258 <condition id="CM33_DSP_GCC">
1259 <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1260 <require condition="CM33_DSP"/>
1261 <require Tcompiler="GCC"/>
1262 </condition>
1263 <condition id="CM33_DSP_LE_GCC">
1264 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1265 <require condition="CM33_DSP_GCC"/>
1266 <require Dendian="Little-endian"/>
1267 </condition>
1268 <condition id="CM33_DSP_BE_GCC">
1269 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1270 <require condition="CM33_DSP_GCC"/>
1271 <require Dendian="Big-endian"/>
1272 </condition>
1273
1274 <condition id="CM33_FP_GCC">
1275 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1276 <require condition="CM33_FP"/>
1277 <require Tcompiler="GCC"/>
1278 </condition>
1279 <condition id="CM33_FP_LE_GCC">
1280 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1281 <require condition="CM33_FP_GCC"/>
1282 <require Dendian="Little-endian"/>
1283 </condition>
1284 <condition id="CM33_FP_BE_GCC">
1285 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1286 <require condition="CM33_FP_GCC"/>
1287 <require Dendian="Big-endian"/>
1288 </condition>
1289
1290 <condition id="CM33_SP_GCC">
1291 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1292 <require condition="CM33_SP"/>
1293 <require Tcompiler="GCC"/>
1294 </condition>
1295 <condition id="CM33_SP_LE_GCC">
1296 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1297 <require condition="CM33_SP_GCC"/>
1298 <require Dendian="Little-endian"/>
1299 </condition>
1300 <condition id="CM33_SP_BE_GCC">
1301 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1302 <require condition="CM33_SP_GCC"/>
1303 <require Dendian="Big-endian"/>
1304 </condition>
1305
1306 <condition id="CM33_DSP_SP_GCC">
1307 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1308 <require condition="CM33_DSP_SP"/>
1309 <require Tcompiler="GCC"/>
1310 </condition>
1311 <condition id="CM33_DSP_SP_LE_GCC">
1312 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1313 <require condition="CM33_DSP_SP_GCC"/>
1314 <require Dendian="Little-endian"/>
1315 </condition>
1316 <condition id="CM33_DSP_SP_BE_GCC">
1317 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1318 <require condition="CM33_DSP_SP_GCC"/>
1319 <require Dendian="Big-endian"/>
1320 </condition>
1321
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1322 <condition id="ARMv8MBL_GCC">
1323 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1324 <require condition="ARMv8MBL"/>
1325 <require Tcompiler="GCC"/>
1326 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1327 <condition id="ARMv8MBL_LE_GCC">
1328 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1329 <require condition="ARMv8MBL_GCC"/>
1330 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1331 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1332 <condition id="ARMv8MBL_BE_GCC">
1333 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1334 <require condition="ARMv8MBL_GCC"/>
1335 <require Dendian="Big-endian"/>
1336 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1337
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1338 <condition id="ARMv8MML_GCC">
1339 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1340 <require condition="ARMv8MML"/>
1341 <require Tcompiler="GCC"/>
1342 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1343 <condition id="ARMv8MML_LE_GCC">
1344 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1345 <require condition="ARMv8MML_GCC"/>
1346 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1347 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1348 <condition id="ARMv8MML_BE_GCC">
1349 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1350 <require condition="ARMv8MML_GCC"/>
1351 <require Dendian="Big-endian"/>
1352 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1353
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1354 <condition id="ARMv8MML_DSP_GCC">
1355 <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1356 <require condition="ARMv8MML_DSP"/>
1357 <require Tcompiler="GCC"/>
1358 </condition>
1359 <condition id="ARMv8MML_DSP_LE_GCC">
1360 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1361 <require condition="ARMv8MML_DSP_GCC"/>
1362 <require Dendian="Little-endian"/>
1363 </condition>
1364 <condition id="ARMv8MML_DSP_BE_GCC">
1365 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1366 <require condition="ARMv8MML_DSP_GCC"/>
1367 <require Dendian="Big-endian"/>
1368 </condition>
1369
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1370 <condition id="ARMv8MML_FP_GCC">
1371 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1372 <require condition="ARMv8MML_FP"/>
1373 <require Tcompiler="GCC"/>
1374 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1375 <condition id="ARMv8MML_FP_LE_GCC">
1376 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1377 <require condition="ARMv8MML_FP_GCC"/>
1378 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1379 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1380 <condition id="ARMv8MML_FP_BE_GCC">
1381 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1382 <require condition="ARMv8MML_FP_GCC"/>
1383 <require Dendian="Big-endian"/>
1384 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1385
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1386 <condition id="ARMv8MML_SP_GCC">
1387 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1388 <require condition="ARMv8MML_SP"/>
1389 <require Tcompiler="GCC"/>
1390 </condition>
1391 <condition id="ARMv8MML_SP_LE_GCC">
1392 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1393 <require condition="ARMv8MML_SP_GCC"/>
1394 <require Dendian="Little-endian"/>
1395 </condition>
1396 <condition id="ARMv8MML_SP_BE_GCC">
1397 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1398 <require condition="ARMv8MML_SP_GCC"/>
1399 <require Dendian="Big-endian"/>
1400 </condition>
1401
1402 <condition id="ARMv8MML_DSP_SP_GCC">
1403 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1404 <require condition="ARMv8MML_DSP_SP"/>
1405 <require Tcompiler="GCC"/>
1406 </condition>
1407 <condition id="ARMv8MML_DSP_SP_LE_GCC">
1408 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1409 <require condition="ARMv8MML_DSP_SP_GCC"/>
1410 <require Dendian="Little-endian"/>
1411 </condition>
1412 <condition id="ARMv8MML_DSP_SP_BE_GCC">
1413 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1414 <require condition="ARMv8MML_DSP_SP_GCC"/>
1415 <require Dendian="Big-endian"/>
1416 </condition>
1417
1418 <condition id="ARMv8MML_DP_GCC">
1419 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1420 <require condition="ARMv8MML_DP"/>
1421 <require Tcompiler="GCC"/>
1422 </condition>
1423 <condition id="ARMv8MML_DP_LE_GCC">
1424 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1425 <require condition="ARMv8MML_DP_GCC"/>
1426 <require Dendian="Little-endian"/>
1427 </condition>
1428 <condition id="ARMv8MML_DP_BE_GCC">
1429 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1430 <require condition="ARMv8MML_DP_GCC"/>
1431 <require Dendian="Big-endian"/>
1432 </condition>
1433
1434 <condition id="ARMv8MML_DSP_DP_GCC">
1435 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1436 <require condition="ARMv8MML_DSP_DP"/>
1437 <require Tcompiler="GCC"/>
1438 </condition>
1439 <condition id="ARMv8MML_DSP_DP_LE_GCC">
1440 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1441 <require condition="ARMv8MML_DSP_DP_GCC"/>
1442 <require Dendian="Little-endian"/>
1443 </condition>
1444 <condition id="ARMv8MML_DSP_DP_BE_GCC">
1445 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1446 <require condition="ARMv8MML_DSP_DP_GCC"/>
1447 <require Dendian="Big-endian"/>
1448 </condition>
1449
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1450 <!-- IAR compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1451 <condition id="CM0_IAR">
1452 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1453 <require condition="CM0"/>
1454 <require Tcompiler="IAR"/>
1455 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1456 <condition id="CM0_LE_IAR">
1457 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1458 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1459 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1460 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1461 <condition id="CM0_BE_IAR">
1462 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1463 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1464 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1465 </condition>
1466
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1467 <condition id="CM3_IAR">
1468 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1469 <require condition="CM3"/>
1470 <require Tcompiler="IAR"/>
1471 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1472 <condition id="CM3_LE_IAR">
1473 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1474 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1475 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1476 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1477 <condition id="CM3_BE_IAR">
1478 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1479 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1480 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1481 </condition>
1482
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1483 <condition id="CM4_IAR">
1484 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1485 <require condition="CM4"/>
1486 <require Tcompiler="IAR"/>
1487 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1488 <condition id="CM4_LE_IAR">
1489 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1490 <require condition="CM4_IAR"/>
1491 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1492 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1493 <condition id="CM4_BE_IAR">
1494 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1495 <require condition="CM4_IAR"/>
1496 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1497 </condition>
1498
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1499 <condition id="CM4_FP_IAR">
1500 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1501 <require condition="CM4_FP"/>
1502 <require Tcompiler="IAR"/>
1503 </condition>
1504 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1505 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1506 <require condition="CM4_FP_IAR"/>
1507 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1508 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1509 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1510 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1511 <require condition="CM4_FP_IAR"/>
1512 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1513 </condition>
1514
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1515 <condition id="CM7_IAR">
1516 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1517 <require condition="CM7"/>
1518 <require Tcompiler="IAR"/>
1519 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1520 <condition id="CM7_LE_IAR">
1521 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1522 <require condition="CM7_IAR"/>
1523 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1524 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1525 <condition id="CM7_BE_IAR">
1526 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1527 <require condition="CM7_IAR"/>
1528 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1529 </condition>
1530
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1531 <condition id="CM7_FP_IAR">
1532 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1533 <require condition="CM7_FP"/>
1534 <require Tcompiler="IAR"/>
1535 </condition>
1536 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1537 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1538 <require condition="CM7_FP_IAR"/>
1539 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1540 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1541 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1543 <require condition="CM7_FP_IAR"/>
1544 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1545 </condition>
1546
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1547 <condition id="CM7_SP_IAR">
1548 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1549 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1550 <require Tcompiler="IAR"/>
1551 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1552 <condition id="CM7_SP_LE_IAR">
1553 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1554 <require condition="CM7_SP_IAR"/>
1555 <require Dendian="Little-endian"/>
1556 </condition>
1557 <condition id="CM7_SP_BE_IAR">
1558 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1559 <require condition="CM7_SP_IAR"/>
1560 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1561 </condition>
1562
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1563 <condition id="CM7_DP_IAR">
1564 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1565 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1566 <require Tcompiler="IAR"/>
1567 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1568 <condition id="CM7_DP_LE_IAR">
1569 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1570 <require condition="CM7_DP_IAR"/>
1571 <require Dendian="Little-endian"/>
1572 </condition>
1573 <condition id="CM7_DP_BE_IAR">
1574 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1575 <require condition="CM7_DP_IAR"/>
1576 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1577 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1578
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1579 <!-- conditions selecting single devices and CMSIS Core -->
1580 <!-- used for component startup, GCC version is used for C-Startup -->
1581 <condition id="ARMCM0 CMSIS">
1582 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1583 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1584 <require Cclass="CMSIS" Cgroup="CORE"/>
1585 </condition>
1586 <condition id="ARMCM0 CMSIS GCC">
1587 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1588 <require condition="ARMCM0 CMSIS"/>
1589 <require condition="GCC"/>
1590 </condition>
1591
1592 <condition id="ARMCM0+ CMSIS">
1593 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1594 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1595 <require Cclass="CMSIS" Cgroup="CORE"/>
1596 </condition>
1597 <condition id="ARMCM0+ CMSIS GCC">
1598 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1599 <require condition="ARMCM0+ CMSIS"/>
1600 <require condition="GCC"/>
1601 </condition>
1602
1603 <condition id="ARMCM3 CMSIS">
1604 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1605 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1606 <require Cclass="CMSIS" Cgroup="CORE"/>
1607 </condition>
1608 <condition id="ARMCM3 CMSIS GCC">
1609 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1610 <require condition="ARMCM3 CMSIS"/>
1611 <require condition="GCC"/>
1612 </condition>
1613
1614 <condition id="ARMCM4 CMSIS">
1615 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1616 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1617 <require Cclass="CMSIS" Cgroup="CORE"/>
1618 </condition>
1619 <condition id="ARMCM4 CMSIS GCC">
1620 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1621 <require condition="ARMCM4 CMSIS"/>
1622 <require condition="GCC"/>
1623 </condition>
1624
1625 <condition id="ARMCM7 CMSIS">
1626 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1627 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1628 <require Cclass="CMSIS" Cgroup="CORE"/>
1629 </condition>
1630 <condition id="ARMCM7 CMSIS GCC">
1631 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1632 <require condition="ARMCM7 CMSIS"/>
1633 <require condition="GCC"/>
1634 </condition>
1635
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1636 <condition id="ARMCM23 CMSIS">
1637 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1638 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1639 <require Cclass="CMSIS" Cgroup="CORE"/>
1640 </condition>
1641 <condition id="ARMCM23 CMSIS GCC">
1642 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1643 <require condition="ARMCM23 CMSIS"/>
1644 <require condition="GCC"/>
1645 </condition>
1646
1647 <condition id="ARMCM33 CMSIS">
1648 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1649 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1650 <require Cclass="CMSIS" Cgroup="CORE"/>
1651 </condition>
1652 <condition id="ARMCM33 CMSIS GCC">
1653 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1654 <require condition="ARMCM33 CMSIS"/>
1655 <require condition="GCC"/>
1656 </condition>
1657
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1658 <condition id="ARMSC000 CMSIS">
1659 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1660 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1661 <require Cclass="CMSIS" Cgroup="CORE"/>
1662 </condition>
1663 <condition id="ARMSC000 CMSIS GCC">
1664 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1665 <require condition="ARMSC000 CMSIS"/>
1666 <require condition="GCC"/>
1667 </condition>
1668
1669 <condition id="ARMSC300 CMSIS">
1670 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1671 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1672 <require Cclass="CMSIS" Cgroup="CORE"/>
1673 </condition>
1674 <condition id="ARMSC300 CMSIS GCC">
1675 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1676 <require condition="ARMSC300 CMSIS"/>
1677 <require condition="GCC"/>
1678 </condition>
1679
1680 <condition id="ARMv8MBL CMSIS">
1681 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1682 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1683 <require Cclass="CMSIS" Cgroup="CORE"/>
1684 </condition>
1685 <condition id="ARMv8MBL CMSIS GCC">
1686 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1687 <require condition="ARMv8MBL CMSIS"/>
1688 <require condition="GCC"/>
1689 </condition>
1690
1691 <condition id="ARMv8MML CMSIS">
1692 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1693 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1694 <require Cclass="CMSIS" Cgroup="CORE"/>
1695 </condition>
1696 <condition id="ARMv8MML CMSIS GCC">
1697 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1698 <require condition="ARMv8MML CMSIS"/>
1699 <require condition="GCC"/>
1700 </condition>
1701
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1702 <!-- CMSIS DSP -->
1703 <condition id="CMSIS DSP">
1704 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1705 <require condition="ARMv6_7-M Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1706 <require Cclass="CMSIS" Cgroup="CORE"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1707 <require condition="ARMCC GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1708 </condition>
1709
1710 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1711 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1712 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1713 <require condition="ARMv6_7-M Device"/>
1714 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1715 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1716 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1717 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1718 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1719 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1720 <require condition="ARMv6_7_8-M Device"/>
1721 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1722 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1723 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1724 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1725 <description>Components required for RTOS2 RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1726 <require condition="ARMv6_7_8-M Device"/>
1727 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1728 <require Cclass="CMSIS" Cgroup="CORE"/>
1729 <require Cclass="Device" Cgroup="Startup"/>
1730 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1731 <condition id="RTOS2 RTX5 NS">
1732 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1733 <require condition="ARMv8-M TZ Device"/>
1734 <require condition="ARMCC GCC"/>
1735 <require Cclass="CMSIS" Cgroup="CORE"/>
1736 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1737 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1738
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1739 </conditions>
1740
1741 <components>
1742 <!-- CMSIS-Core component -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1743 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1744 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1745 <files>
1746 <!-- CPU independent -->
1747 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1748 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1749 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1750 <!-- Code template -->
ReinhardKeil753fd922016-11-07 09:57:37 +0100[diff] [blame]1751 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="Secure mode 'main' module for ARMv8-M"/>
1752 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1753 </files>
1754 </component>
1755
1756 <!-- CMSIS-Startup components -->
1757 <!-- Cortex-M0 -->
1758 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1759 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1760 <files>
1761 <!-- include folder / device header file -->
1762 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1763 <!-- startup / system file -->
1764 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1765 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1766 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1767 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1768 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1769 </files>
1770 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1771 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1772 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1773 <files>
1774 <!-- include folder / device header file -->
1775 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1776 <!-- startup / system file -->
1777 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1778 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1779 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1780 </files>
1781 </component>
1782
1783 <!-- Cortex-M0+ -->
1784 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1785 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1786 <files>
1787 <!-- include folder / device header file -->
1788 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1789 <!-- startup / system file -->
1790 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1791 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1792 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1793 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1794 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1795 </files>
1796 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1797 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1798 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1799 <files>
1800 <!-- include folder / device header file -->
1801 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1802 <!-- startup / system file -->
1803 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1804 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1805 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1806 </files>
1807 </component>
1808
1809 <!-- Cortex-M3 -->
1810 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1811 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1812 <files>
1813 <!-- include folder / device header file -->
1814 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1815 <!-- startup / system file -->
1816 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1817 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1818 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1819 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1820 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1821 </files>
1822 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1823 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1824 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1825 <files>
1826 <!-- include folder / device header file -->
1827 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1828 <!-- startup / system file -->
1829 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1830 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1831 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1832 </files>
1833 </component>
1834
1835 <!-- Cortex-M4 -->
1836 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1837 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1838 <files>
1839 <!-- include folder / device header file -->
1840 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1841 <!-- startup / system file -->
1842 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1843 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1844 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1845 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1846 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1847 </files>
1848 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1849 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1850 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1851 <files>
1852 <!-- include folder / device header file -->
1853 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1854 <!-- startup / system file -->
1855 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1856 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1857 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1858 </files>
1859 </component>
1860
1861 <!-- Cortex-M7 -->
1862 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1863 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1864 <files>
1865 <!-- include folder / device header file -->
1866 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1867 <!-- startup / system file -->
1868 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1869 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1870 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1871 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1872 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1873 </files>
1874 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1875 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1876 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1877 <files>
1878 <!-- include folder / device header file -->
1879 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1880 <!-- startup / system file -->
1881 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1882 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1883 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1884 </files>
1885 </component>
1886
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1887 <!-- Cortex-M23 -->
1888 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
1889 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1890 <files>
1891 <!-- include folder / device header file -->
1892 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1893 <!-- startup / system file -->
1894 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1895 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1896 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1897 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1898 <!-- SAU configuration -->
1899 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1900 </files>
1901 </component>
1902 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1903 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1904 <files>
1905 <!-- include folder / device header file -->
1906 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1907 <!-- startup / system file -->
1908 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1909 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1910 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
1911 <!-- SAU configuration -->
1912 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1913 </files>
1914 </component>
1915
1916 <!-- Cortex-M33 -->
1917 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS">
1918 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1919 <files>
1920 <!-- include folder / device header file -->
1921 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1922 <!-- startup / system file -->
1923 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1924 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1925 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1926 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1927 <!-- SAU configuration -->
1928 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1929 </files>
1930 </component>
1931 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1932 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1933 <files>
1934 <!-- include folder / device header file -->
1935 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1936 <!-- startup / system file -->
1937 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1938 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1939 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
1940 <!-- SAU configuration -->
1941 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1942 </files>
1943 </component>
1944
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1945 <!-- Cortex-SC000 -->
1946 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1947 <description>System and Startup for Generic ARM SC000 device</description>
1948 <files>
1949 <!-- include folder / device header file -->
1950 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1951 <!-- startup / system file -->
1952 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1953 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1954 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1955 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1956 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1957 </files>
1958 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1959 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1960 <description>System and Startup for Generic ARM SC000 device</description>
1961 <files>
1962 <!-- include folder / device header file -->
1963 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1964 <!-- startup / system file -->
1965 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1966 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1967 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1968 </files>
1969 </component>
1970
1971 <!-- Cortex-SC300 -->
1972 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1973 <description>System and Startup for Generic ARM SC300 device</description>
1974 <files>
1975 <!-- include folder / device header file -->
1976 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1977 <!-- startup / system file -->
1978 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1979 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1980 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1981 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1982 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1983 </files>
1984 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1985 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1986 <description>System and Startup for Generic ARM SC300 device</description>
1987 <files>
1988 <!-- include folder / device header file -->
1989 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1990 <!-- startup / system file -->
1991 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1992 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1993 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1994 </files>
1995 </component>
1996
1997 <!-- ARMv8MBL -->
1998 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1999 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2000 <files>
2001 <!-- include folder / device header file -->
2002 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2003 <!-- startup / system file -->
2004 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2005 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2006 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2007 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2008 <!-- SAU configuration -->
2009 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2010 </files>
2011 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2012 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2013 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2014 <files>
2015 <!-- include folder / device header file -->
2016 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2017 <!-- startup / system file -->
2018 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2019 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2020 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2021 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2022 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2023 </files>
2024 </component>
2025
2026 <!-- ARMv8MML -->
2027 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2028 <description>System and Startup for Generic ARM ARMv8MML device</description>
2029 <files>
2030 <!-- include folder / device header file -->
2031 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2032 <!-- startup / system file -->
2033 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2034 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2035 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2036 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2037 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2038 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2039 </files>
2040 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2041 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2042 <description>System and Startup for Generic ARM ARMv8MML device</description>
2043 <files>
2044 <!-- include folder / device header file -->
2045 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2046 <!-- startup / system file -->
2047 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2048 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2049 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2050 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2051 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2052 </files>
2053 </component>
2054
2055
2056 <!-- CMSIS-DSP component -->
2057 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2058 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2059 <files>
2060 <!-- CPU independent -->
2061 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2062 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2063
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2064 <!-- CPU and Compiler dependent -->
2065 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2066 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2067 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2068 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2069 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2070 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2071 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2072 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2073 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2074 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2075 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2076 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2077 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2078 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2079 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2080<!--
2081 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2082 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2083 <file category="library" condition="CM33_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2084 <file category="library" condition="CM33_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2085 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2086 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2087 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2088 <file category="library" condition="ARMv8MML_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2089 <file category="library" condition="ARMv8MML_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2090 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2091-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2092 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2093 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2094 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2095 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2096 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2097 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2098 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2099 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2100<!--
2101 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2102 <file category="library" condition="CM33_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2103 <file category="library" condition="CM33_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2104 <file category="library" condition="CM33_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2105 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2106 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2107 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2108 <file category="library" condition="ARMv8MML_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2109 <file category="library" condition="ARMv8MML_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2110 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2111-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2112 </files>
2113 </component>
2114
2115 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2116 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2117 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2118 <RTE_Components_h>
2119 <!-- the following content goes into file 'RTE_Components.h' -->
2120 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2121 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2122 </RTE_Components_h>
2123 <files>
2124 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2125 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2126 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2127 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2128
2129 <!-- RTX templates -->
2130 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2131 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2132 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2133 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2134 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2135 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2136 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2137 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2138 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2139 <!-- tool-chain specific template file -->
2140 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2141 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2142 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2143
2144 <!-- CPU and Compiler dependent -->
2145 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2146 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2147 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2148 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2149 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2150 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2151 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2152 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2153 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2154 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2155 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2156 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2157 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2158 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2159 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2160 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2161 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2162 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2163 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2164 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2165 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2166 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2167 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2168 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2169 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2170 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2171 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2172 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2173 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2174 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2175 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2176 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2177 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2178 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2179 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2180 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2181 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2182 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2183 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2184 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2185 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2186 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2187 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2188 </files>
2189 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2190
2191 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar5fa0f182016-11-02 12:13:56 +0100[diff] [blame]2192 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2193 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2194 <RTE_Components_h>
2195 <!-- the following content goes into file 'RTE_Components.h' -->
2196 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2197 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2198 </RTE_Components_h>
2199 <files>
2200 <!-- RTX header file -->
2201 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2202 <!-- RTX compatibility module for API V1 -->
2203 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2204 </files>
2205 </component>
2206
2207 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohar5fa0f182016-11-02 12:13:56 +0100[diff] [blame]2208 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2209 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2210 <RTE_Components_h>
2211 <!-- the following content goes into file 'RTE_Components.h' -->
2212 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2213 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2214 </RTE_Components_h>
2215 <files>
2216 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2217 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2218
2219 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]2220 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2221 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2222
2223 <!-- RTX configuration -->
2224 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2225
2226 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2227 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2228 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2229 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2230 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2231 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2232 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2233 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2234 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2235 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2236
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2237 <!-- RTX libraries (CPU and Compiler dependent) -->
2238 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2239 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2240 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2241 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2242 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2243 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2244 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2245 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2246 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2247 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2248 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2249 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2250 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2251 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2252 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2253 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2254 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2255 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2256 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2257 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2258 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2259 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2260 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2261 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2262 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2263 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2264 </files>
2265 </component>
Robert Rostohar5fa0f182016-11-02 12:13:56 +0100[diff] [blame]2266 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2267 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2268 <RTE_Components_h>
2269 <!-- the following content goes into file 'RTE_Components.h' -->
2270 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2271 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2272 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2273 </RTE_Components_h>
2274 <files>
2275 <!-- RTX documentation -->
2276 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2277
2278 <!-- RTX header files -->
2279 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2280 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2281
2282 <!-- RTX configuration -->
2283 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2284
2285 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2286 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2287 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2288 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2289 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2290 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2291 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2292 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2293 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2294 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2295
2296 <!-- RTX libraries (CPU and Compiler dependent) -->
2297 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2298 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2299 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2300 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2301 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2302 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2303 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2304 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2305 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2306 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2307 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2308 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2309 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2310 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2311 </files>
2312 </component>
Robert Rostohar5fa0f182016-11-02 12:13:56 +0100[diff] [blame]2313 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2314 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2315 <RTE_Components_h>
2316 <!-- the following content goes into file 'RTE_Components.h' -->
2317 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2318 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2319 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2320 </RTE_Components_h>
2321 <files>
2322 <!-- RTX documentation -->
2323 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2324
2325 <!-- RTX header files -->
2326 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2327 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2328
2329 <!-- RTX configuration -->
2330 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2331
2332 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2333 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2334 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2335 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2336 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2337 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2338 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2339 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2340 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2341 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2342
2343 <!-- RTX sources (core) -->
2344 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2345 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2346 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2347 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2348 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2349 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2350 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2351 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2352 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2353 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2354 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2355 <!-- RTX sources (handlers ARMCC) -->
2356 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2357 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2358 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2359 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2360 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2361 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2362 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2363 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2364 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2365 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2366 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2367 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2368 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2369 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2370 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2371 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2372 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2373 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2374 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2375 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2376 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2377 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2378 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2379 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2380 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2381 </files>
2382 </component>
Robert Rostohar5fa0f182016-11-02 12:13:56 +0100[diff] [blame]2383 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2384 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2385 <RTE_Components_h>
2386 <!-- the following content goes into file 'RTE_Components.h' -->
2387 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2388 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2389 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2390 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2391 </RTE_Components_h>
2392 <files>
2393 <!-- RTX documentation -->
2394 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2395
2396 <!-- RTX header files -->
2397 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2398 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2399
2400 <!-- RTX configuration -->
2401 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2402
2403 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2404 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2405 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2406 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2407 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2408 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2409 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2410 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2411 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2412 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2413
2414 <!-- RTX sources (core) -->
2415 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2416 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2417 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2418 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2419 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2420 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2421 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2422 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2423 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2424 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2425 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2426 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2427 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2428 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2429 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2430 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2431 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2432 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2433 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2434 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2435 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2436 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2437 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2438 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2439 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2440 </files>
2441 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2442
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2443 </components>
2444
2445 <boards>
2446 <board name="uVision Simulator" vendor="Keil">
2447 <description>uVision Simulator</description>
2448 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2449 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2450 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2451 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2452 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2453 </board>
2454 </boards>
2455
2456 <examples>
2457 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2458 <description>DSP_Lib Class Marks example</description>
2459 <board name="uVision Simulator" vendor="Keil"/>
2460 <project>
2461 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2462 </project>
2463 <attributes>
2464 <component Cclass="CMSIS" Cgroup="CORE"/>
2465 <component Cclass="CMSIS" Cgroup="DSP"/>
2466 <component Cclass="Device" Cgroup="Startup"/>
2467 <category>Getting Started</category>
2468 </attributes>
2469 </example>
2470
2471 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2472 <description>DSP_Lib Convolution example</description>
2473 <board name="uVision Simulator" vendor="Keil"/>
2474 <project>
2475 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2476 </project>
2477 <attributes>
2478 <component Cclass="CMSIS" Cgroup="CORE"/>
2479 <component Cclass="CMSIS" Cgroup="DSP"/>
2480 <component Cclass="Device" Cgroup="Startup"/>
2481 <category>Getting Started</category>
2482 </attributes>
2483 </example>
2484
2485 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2486 <description>DSP_Lib Dotproduct example</description>
2487 <board name="uVision Simulator" vendor="Keil"/>
2488 <project>
2489 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2490 </project>
2491 <attributes>
2492 <component Cclass="CMSIS" Cgroup="CORE"/>
2493 <component Cclass="CMSIS" Cgroup="DSP"/>
2494 <component Cclass="Device" Cgroup="Startup"/>
2495 <category>Getting Started</category>
2496 </attributes>
2497 </example>
2498
2499 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2500 <description>DSP_Lib FFT Bin example</description>
2501 <board name="uVision Simulator" vendor="Keil"/>
2502 <project>
2503 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2504 </project>
2505 <attributes>
2506 <component Cclass="CMSIS" Cgroup="CORE"/>
2507 <component Cclass="CMSIS" Cgroup="DSP"/>
2508 <component Cclass="Device" Cgroup="Startup"/>
2509 <category>Getting Started</category>
2510 </attributes>
2511 </example>
2512
2513 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2514 <description>DSP_Lib FIR example</description>
2515 <board name="uVision Simulator" vendor="Keil"/>
2516 <project>
2517 <environment name="uv" load="arm_fir_example.uvprojx"/>
2518 </project>
2519 <attributes>
2520 <component Cclass="CMSIS" Cgroup="CORE"/>
2521 <component Cclass="CMSIS" Cgroup="DSP"/>
2522 <component Cclass="Device" Cgroup="Startup"/>
2523 <category>Getting Started</category>
2524 </attributes>
2525 </example>
2526
2527 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2528 <description>DSP_Lib Graphic Equalizer example</description>
2529 <board name="uVision Simulator" vendor="Keil"/>
2530 <project>
2531 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2532 </project>
2533 <attributes>
2534 <component Cclass="CMSIS" Cgroup="CORE"/>
2535 <component Cclass="CMSIS" Cgroup="DSP"/>
2536 <component Cclass="Device" Cgroup="Startup"/>
2537 <category>Getting Started</category>
2538 </attributes>
2539 </example>
2540
2541 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2542 <description>DSP_Lib Linear Interpolation example</description>
2543 <board name="uVision Simulator" vendor="Keil"/>
2544 <project>
2545 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2546 </project>
2547 <attributes>
2548 <component Cclass="CMSIS" Cgroup="CORE"/>
2549 <component Cclass="CMSIS" Cgroup="DSP"/>
2550 <component Cclass="Device" Cgroup="Startup"/>
2551 <category>Getting Started</category>
2552 </attributes>
2553 </example>
2554
2555 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2556 <description>DSP_Lib Matrix example</description>
2557 <board name="uVision Simulator" vendor="Keil"/>
2558 <project>
2559 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2560 </project>
2561 <attributes>
2562 <component Cclass="CMSIS" Cgroup="CORE"/>
2563 <component Cclass="CMSIS" Cgroup="DSP"/>
2564 <component Cclass="Device" Cgroup="Startup"/>
2565 <category>Getting Started</category>
2566 </attributes>
2567 </example>
2568
2569 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2570 <description>DSP_Lib Signal Convergence example</description>
2571 <board name="uVision Simulator" vendor="Keil"/>
2572 <project>
2573 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2574 </project>
2575 <attributes>
2576 <component Cclass="CMSIS" Cgroup="CORE"/>
2577 <component Cclass="CMSIS" Cgroup="DSP"/>
2578 <component Cclass="Device" Cgroup="Startup"/>
2579 <category>Getting Started</category>
2580 </attributes>
2581 </example>
2582
2583 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2584 <description>DSP_Lib Sinus/Cosinus example</description>
2585 <board name="uVision Simulator" vendor="Keil"/>
2586 <project>
2587 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2588 </project>
2589 <attributes>
2590 <component Cclass="CMSIS" Cgroup="CORE"/>
2591 <component Cclass="CMSIS" Cgroup="DSP"/>
2592 <component Cclass="Device" Cgroup="Startup"/>
2593 <category>Getting Started</category>
2594 </attributes>
2595 </example>
2596
2597 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2598 <description>DSP_Lib Variance example</description>
2599 <board name="uVision Simulator" vendor="Keil"/>
2600 <project>
2601 <environment name="uv" load="arm_variance_example.uvprojx"/>
2602 </project>
2603 <attributes>
2604 <component Cclass="CMSIS" Cgroup="CORE"/>
2605 <component Cclass="CMSIS" Cgroup="DSP"/>
2606 <component Cclass="Device" Cgroup="Startup"/>
2607 <category>Getting Started</category>
2608 </attributes>
2609 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2610
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2611 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2612 <description>CMSIS-RTOS2 Blinky example</description>
2613 <board name="uVision Simulator" vendor="Keil"/>
2614 <project>
2615 <environment name="uv" load="Blinky.uvprojx"/>
2616 </project>
2617 <attributes>
2618 <component Cclass="CMSIS" Cgroup="CORE"/>
2619 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2620 <component Cclass="Device" Cgroup="Startup"/>
2621 <category>Getting Started</category>
2622 </attributes>
2623 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2624
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2625 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2626 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2627 <board name="uVision Simulator" vendor="Keil"/>
2628 <project>
2629 <environment name="uv" load="Blinky.uvprojx"/>
2630 </project>
2631 <attributes>
2632 <component Cclass="CMSIS" Cgroup="CORE"/>
2633 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2634 <component Cclass="Device" Cgroup="Startup"/>
2635 <category>Getting Started</category>
2636 </attributes>
2637 </example>
2638
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2639 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2640 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2641 <board name="uVision Simulator" vendor="Keil"/>
2642 <project>
2643 <environment name="uv" load="NoRTOS.uvmpw"/>
2644 </project>
2645 <attributes>
2646 <component Cclass="CMSIS" Cgroup="CORE"/>
2647 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2648 <component Cclass="Device" Cgroup="Startup"/>
2649 <category>Getting Started</category>
2650 </attributes>
2651 </example>
2652
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2653 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2654 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2655 <board name="uVision Simulator" vendor="Keil"/>
2656 <project>
2657 <environment name="uv" load="RTOS.uvmpw"/>
2658 </project>
2659 <attributes>
2660 <component Cclass="CMSIS" Cgroup="CORE"/>
2661 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2662 <component Cclass="Device" Cgroup="Startup"/>
2663 <category>Getting Started</category>
2664 </attributes>
2665 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2666
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]2667 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2668 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2669 <board name="uVision Simulator" vendor="Keil"/>
2670 <project>
2671 <environment name="uv" load="RTOS_Faults.uvmpw"/>
2672 </project>
2673 <attributes>
2674 <component Cclass="CMSIS" Cgroup="CORE"/>
2675 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2676 <component Cclass="Device" Cgroup="Startup"/>
2677 <category>Getting Started</category>
2678 </attributes>
2679 </example>
2680
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2681 </examples>
2682
2683</package>