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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 655f7240fcae555d6ac74aebb29faa1aaf1dd4dc / . / ARM.CMSIS.pdsc
blob: 1eb3600c273cafe267b7a80c09ead2227b54d3b6 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame^]11 <release version="5.0.0-Beta12" date="2016-09-29">
12 Interim Beta Release:
13 CMSIS-RTOS2 and RTX implementation:
14 - added context management API for ARMv8-M TrustZone
15 - added ARMv8-M support (ARMClang, GCC)
16 CMSIS-Core:
17 - Updated documentation
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]18 - Added new file cmsis_compiler.h.
19 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]20 - Reworked compiler specific include files.
21 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]22 - Added __PACKED macro.
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame^]23 CMSIS-DSP:
24 - updated library projects
25 CMSIS-SVD:
26 - removed SVD file database documentation as SVD files are distributed in packs
27 - updated SVDConv for Win32 and Linux
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]28 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]29 <release version="5.0.0-Beta11">
30 CMSIS_Core:
31 - Added CMSE support to cmsis_gcc.h.
32 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]33 <release version="5.0.0-Beta10">
34 CMSIS-RTOS2:
35 - Added RTX5 component.
36 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]37 <release version="5.0.0-Beta9">
38 CMSIS_Core:
39 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
40 - Reworked SAU register and functions.
41 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]42 <release version="5.0.0-Beta8">
43 CMSIS-RTOS:
44 - API 2.0
45 - RTX 5.0.0-Alpha
46 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]47 <release version="5.0.0-Beta7">
48 CMSIS_Core:
49 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]50 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]51 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]52 <release version="5.0.0-Beta6">
53 CMSIS_Core:
54 - Added SCB_CFSR register bit definitions in core_*.h.
55 - Added NVIC_GetEnableIRQ function in core_*.h.
56 - Updated core instruction macros in cmsis_gcc.h.
57 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]58 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]59 CMSIS_DSP:
60 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
61 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]62 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]63 <release version="5.0.0-Beta4">
64 Updated ARMv8MML device files.
65 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
66 Updated CMSIS core files.
67 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
68 </release>
69 <release version="5.0.0-Beta3">
70 Updated CMSIS ARMv8M core / device files
71 - increased SAU regions to 8.
72 - moved TZ_SAU_Setup() to partition_#device#.h.
73 </release>
74 <release version="5.0.0-Beta2">
75 - renamed core_*.h to lower case.
76 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
77 - updated ARMv8M?L.svd.
78 </release>
79 <release version="5.0.0-Beta1">
80 - added function SCB_GetFPUType() to all CMSIS cores.
81 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
82 - updated CMSIS core files to V5.0
83 - updated CMSIS Core change log.
84 - updated CMSIS DSP_Lib change log.
85 - updated CMSIS DSP_Lib libraries.
86 </release>
87 <release version="5.0.0-Beta" date="2015-12-15">
88 Added ARMv8M support to CMSIS-Core.
89 - CMSIS-Core 5.0.0 Beta (see revision history for details)
90 - CMSIS-RTOS
91 -- API 1.02 (unchanged)
92 -- RTX 4.81.0 (see revision history for details)
93 - CMSIS-SVD 1.3.2 (see revision history for details)
94 </release>
95 <release version="4.5.0" date="2015-10-28">
96 - CMSIS-Core 4.30.0 (see revision history for details)
97 - CMSIS-DAP 1.1.0 (unchanged)
98 - CMSIS-Driver 2.04.0 (see revision history for details)
99 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
100 - CMSIS-PACK 1.4.1 (see revision history for details)
101 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
102 - CMSIS-SVD 1.3.1 (see revision history for details)
103 </release>
104 <release version="4.4.0" date="2015-09-11">
105 - CMSIS-Core 4.20 (see revision history for details)
106 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
107 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
108 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
109 - CMSIS-RTOS
110 -- API 1.02 (unchanged)
111 -- RTX 4.79 (see revision history for details)
112 - CMSIS-SVD 1.3.0 (see revision history for details)
113 - CMSIS-DAP 1.1.0 (extended with SWO support)
114 </release>
115 <release version="4.3.0" date="2015-03-20">
116 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
117 - CMSIS-DSP 1.4.5 (see revision history for details)
118 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
119 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
120 - CMSIS-RTOS
121 -- API 1.02 (unchanged)
122 -- RTX 4.78 (see revision history for details)
123 - CMSIS-SVD 1.2 (unchanged)
124 </release>
125 <release version="4.2.0" date="2014-09-24">
126 Adding Cortex-M7 support
127 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
128 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
129 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
130 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
131 - CMSIS-RTOS RTX 4.75 (see revision history for details)
132 </release>
133 <release version="4.1.1" date="2014-06-30">
134 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
135 </release>
136 <release version="4.1.0" date="2014-06-12">
137 - CMSIS-Driver 2.02 (incompatible update)
138 - CMSIS-Pack 1.3 (see revision history for details)
139 - CMSIS-DSP 1.4.2 (unchanged)
140 - CMSIS-Core 3.30 (unchanged)
141 - CMSIS-RTOS RTX 4.74 (unchanged)
142 - CMSIS-RTOS API 1.02 (unchanged)
143 - CMSIS-SVD 1.10 (unchanged)
144 PACK:
145 - removed G++ specific files from PACK
146 - added Component Startup variant "C Startup"
147 - added Pack Checking Utility
148 - updated conditions to reflect tool-chain dependency
149 - added Taxonomy for Graphics
150 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
151 </release>
152 <release version="4.0.0">
153 - CMSIS-Driver 2.00 Preliminary (incompatible update)
154 - CMSIS-Pack 1.1 Preliminary
155 - CMSIS-DSP 1.4.2 (see revision history for details)
156 - CMSIS-Core 3.30 (see revision history for details)
157 - CMSIS-RTOS RTX 4.74 (see revision history for details)
158 - CMSIS-RTOS API 1.02 (unchanged)
159 - CMSIS-SVD 1.10 (unchanged)
160 </release>
161 <release version="3.20.4">
162 - CMSIS-RTOS 4.74 (see revision history for details)
163 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
164 </release>
165 <release version="3.20.3">
166 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
167 - CMSIS-RTOS 4.73 (see revision history for details)
168 </release>
169 <release version="3.20.2">
170 - CMSIS-Pack documentation has been added
171 - CMSIS-Drivers header and documentation have been added to PACK
172 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
173 </release>
174 <release version="3.20.1">
175 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
176 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
177 </release>
178 <release version="3.20.0">
179 The software portions that are deployed in the application program are now under a BSD license which allows usage
180 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
181 The individual components have been update as listed below:
182 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
183 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
184 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
185 - CMSIS-SVD is unchanged.
186 </release>
187 </releases>
188
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]189 <taxonomy>
190 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
191 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
192 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
193 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
194 <description Cclass="File System">File Drive Support and File System</description>
195 <description Cclass="Graphics">Graphical User Interface</description>
196 <description Cclass="Network">Network Stack using Internet Protocols</description>
197 <description Cclass="USB">Universal Serial Bus Stack</description>
198 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
199 </taxonomy>
200
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]201 <devices>
202 <!-- ****************************** Cortex-M0 ****************************** -->
203 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]204 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]205 <description>
206The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
207- simple, easy-to-use programmers model
208- highly efficient ultra-low power operation
209- excellent code density
210- deterministic, high-performance interrupt handling
211- upward compatibility with the rest of the Cortex-M processor family.
212 </description>
213 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
214 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
215 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
216 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
217
218 <device Dname="ARMCM0">
219 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
220 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
221 </device>
222 </family>
223
224 <!-- ****************************** Cortex-M0P ****************************** -->
225 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]226 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]227 <description>
228The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
229- simple, easy-to-use programmers model
230- highly efficient ultra-low power operation
231- excellent code density
232- deterministic, high-performance interrupt handling
233- upward compatibility with the rest of the Cortex-M processor family.
234 </description>
235 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
236 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
237 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
238 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
239
240 <device Dname="ARMCM0P">
241 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
242 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
243 </device>
244 </family>
245
246 <!-- ****************************** Cortex-M3 ****************************** -->
247 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]248 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]249 <description>
250The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
251- simple, easy-to-use programmers model
252- highly efficient ultra-low power operation
253- excellent code density
254- deterministic, high-performance interrupt handling
255- upward compatibility with the rest of the Cortex-M processor family.
256 </description>
257 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
258 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
259 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
260 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
261
262 <device Dname="ARMCM3">
263 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
264 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
265 </device>
266 </family>
267
268 <!-- ****************************** Cortex-M4 ****************************** -->
269 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]270 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]271 <description>
272The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
273- simple, easy-to-use programmers model
274- highly efficient ultra-low power operation
275- excellent code density
276- deterministic, high-performance interrupt handling
277- upward compatibility with the rest of the Cortex-M processor family.
278 </description>
279 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
280 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
281 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
282 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
283
284 <device Dname="ARMCM4">
285 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
286 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
287 </device>
288
289 <device Dname="ARMCM4_FP">
290 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
291 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
292 </device>
293 </family>
294
295 <!-- ****************************** Cortex-M7 ****************************** -->
296 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]297 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]298 <description>
299The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
300- simple, easy-to-use programmers model
301- highly efficient ultra-low power operation
302- excellent code density
303- deterministic, high-performance interrupt handling
304- upward compatibility with the rest of the Cortex-M processor family.
305 </description>
306 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
307 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
308 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
309 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
310
311 <device Dname="ARMCM7">
312 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
313 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
314 </device>
315
316 <device Dname="ARMCM7_SP">
317 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
318 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
319 </device>
320
321 <device Dname="ARMCM7_DP">
322 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
323 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
324 </device>
325 </family>
326
327 <!-- ****************************** ARMSC000 ****************************** -->
328 <family Dfamily="ARM SC000" Dvendor="ARM:82">
329 <description>
330The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
331- simple, easy-to-use programmers model
332- highly efficient ultra-low power operation
333- excellent code density
334- deterministic, high-performance interrupt handling
335 </description>
336 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
337 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
338 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
339 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
340
341 <device Dname="ARMSC000">
342 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
343 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
344 </device>
345 </family>
346
347 <!-- ****************************** ARMSC300 ****************************** -->
348 <family Dfamily="ARM SC300" Dvendor="ARM:82">
349 <description>
350The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
351- simple, easy-to-use programmers model
352- highly efficient ultra-low power operation
353- excellent code density
354- deterministic, high-performance interrupt handling
355 </description>
356 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
357 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
358 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
359 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
360
361 <device Dname="ARMSC300">
362 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
363 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
364 </device>
365 </family>
366
367 <!-- ****************************** ARMv8-M Baseline ********************** -->
368 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
369 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
370 <description>
371The ARMv8MBL processor is brand new.
372 </description>
373 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
374 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
375 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
376 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
377
378 <device Dname="ARMv8MBL">
379 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
380 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
381 </device>
382 </family>
383
384 <!-- ****************************** ARMv8-M Mainline ****************************** -->
385 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
386 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
387 <description>
388The ARMv8MML processor is brand new.
389 </description>
390 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
391 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
392 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
393 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
394
395 <device Dname="ARMv8MML">
396 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
397 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
398 </device>
399
400 <device Dname="ARMv8MML_SP">
401 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
402 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
403 </device>
404
405 <device Dname="ARMv8MML_DP">
406 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
407 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
408 </device>
409 </family>
410
411 </devices>
412
413
414 <apis>
415 <!-- CMSIS-RTOS API -->
416 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
417 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
418 <files>
419 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
420 </files>
421 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]422 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]423 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
424 <files>
425 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
426 </files>
427 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]428 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
429 <description>USART Driver API for Cortex-M</description>
430 <files>
431 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
432 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
433 </files>
434 </api>
435 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
436 <description>SPI Driver API for Cortex-M</description>
437 <files>
438 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
439 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
440 </files>
441 </api>
442 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
443 <description>SAI Driver API for Cortex-M</description>
444 <files>
445 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
446 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
447 </files>
448 </api>
449 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
450 <description>I2C Driver API for Cortex-M</description>
451 <files>
452 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
453 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
454 </files>
455 </api>
456 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
457 <description>CAN Driver API for Cortex-M</description>
458 <files>
459 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
460 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
461 </files>
462 </api>
463 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
464 <description>Flash Driver API for Cortex-M</description>
465 <files>
466 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
467 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
468 </files>
469 </api>
470 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
471 <description>MCI Driver API for Cortex-M</description>
472 <files>
473 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
474 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
475 </files>
476 </api>
477 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
478 <description>NAND Flash Driver API for Cortex-M</description>
479 <files>
480 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
481 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
482 </files>
483 </api>
484 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
485 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
486 <files>
487 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
488 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
489 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
490 </files>
491 </api>
492 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
493 <description>Ethernet MAC Driver API for Cortex-M</description>
494 <files>
495 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
496 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
497 </files>
498 </api>
499 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
500 <description>Ethernet PHY Driver API for Cortex-M</description>
501 <files>
502 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
503 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
504 </files>
505 </api>
506 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
507 <description>USB Device Driver API for Cortex-M</description>
508 <files>
509 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
510 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
511 </files>
512 </api>
513 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
514 <description>USB Host Driver API for Cortex-M</description>
515 <files>
516 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
517 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
518 </files>
519 </api>
520 </apis>
521
522 <!-- conditions are dependency rules that can apply to a component or an individual file -->
523 <conditions>
524 <condition id="ARMCC">
525 <require Tcompiler="ARMCC"/>
526 </condition>
527
528 <condition id="GCC">
529 <require Tcompiler="GCC"/>
530 </condition>
531
532 <condition id="IAR">
533 <require Tcompiler="IAR"/>
534 </condition>
535
536 <condition id="ARMCC GCC">
537 <accept Tcompiler="ARMCC"/>
538 <accept Tcompiler="GCC"/>
539 </condition>
540
541 <condition id="Cortex-M Device">
542 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
543 <accept Dcore="Cortex-M0"/>
544 <accept Dcore="Cortex-M0+"/>
545 <accept Dcore="Cortex-M3"/>
546 <accept Dcore="Cortex-M4"/>
547 <accept Dcore="Cortex-M7"/>
548 <accept Dcore="SC000"/>
549 <accept Dcore="SC300"/>
550 </condition>
551
552 <condition id="Cortex-M ARMv8-M Device">
553 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
554 <accept Dcore="Cortex-M0"/>
555 <accept Dcore="Cortex-M0+"/>
556 <accept Dcore="Cortex-M3"/>
557 <accept Dcore="Cortex-M4"/>
558 <accept Dcore="Cortex-M7"/>
559 <accept Dcore="SC000"/>
560 <accept Dcore="SC300"/>
561 <accept Dcore="ARMV8MBL"/>
562 <accept Dcore="ARMV8MML"/>
563 </condition>
564
565 <condition id="Cortex-M Device CMSIS Core">
566 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
567 <require condition="Cortex-M Device"/>
568 <require Cclass="CMSIS" Cgroup="CORE"/>
569 </condition>
570
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]571 <condition id="CMSIS Core">
572 <description>CMSIS CORE processor and device specific Startup files</description>
573 <require Cclass="CMSIS" Cgroup="CORE"/>
574 </condition>
575
576 <condition id="ARMCM0 CMSIS">
577 <!-- conditions selecting Devices -->
578 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
579 <require Dvendor="ARM:82" Dname="ARMCM0"/>
580 <require Cclass="CMSIS" Cgroup="CORE"/>
581 </condition>
582
583 <condition id="ARMCM0 CMSIS GCC">
584 <!-- conditions selecting Devices -->
585 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
586 <require condition="ARMCM0 CMSIS"/>
587 <require condition="GCC"/>
588 </condition>
589
590 <condition id="ARMCM0+ CMSIS">
591 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
592 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
593 <require Cclass="CMSIS" Cgroup="CORE"/>
594 </condition>
595
596 <condition id="ARMCM0+ CMSIS GCC">
597 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
598 <require condition="ARMCM0+ CMSIS"/>
599 <require condition="GCC"/>
600 </condition>
601
602 <condition id="ARMCM3 CMSIS">
603 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
604 <require Dvendor="ARM:82" Dname="ARMCM3"/>
605 <require Cclass="CMSIS" Cgroup="CORE"/>
606 </condition>
607
608 <condition id="ARMCM3 CMSIS GCC">
609 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
610 <require condition="ARMCM3 CMSIS"/>
611 <require condition="GCC"/>
612 </condition>
613
614 <condition id="ARMCM4 CMSIS">
615 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
616 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
617 <require Cclass="CMSIS" Cgroup="CORE"/>
618 </condition>
619
620 <condition id="ARMCM4 CMSIS GCC">
621 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
622 <require condition="ARMCM4 CMSIS"/>
623 <require condition="GCC"/>
624 </condition>
625
626 <condition id="ARMCM7 CMSIS">
627 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
628 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
629 <require Cclass="CMSIS" Cgroup="CORE"/>
630 </condition>
631
632 <condition id="ARMCM7 CMSIS GCC">
633 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
634 <require condition="ARMCM7 CMSIS"/>
635 <require condition="GCC"/>
636 </condition>
637
638 <condition id="ARMSC000 CMSIS">
639 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
640 <require Dvendor="ARM:82" Dname="ARMSC000"/>
641 <require Cclass="CMSIS" Cgroup="CORE"/>
642 </condition>
643
644 <condition id="ARMSC000 CMSIS GCC">
645 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
646 <require condition="ARMSC000 CMSIS"/>
647 <require condition="GCC"/>
648 </condition>
649
650 <condition id="ARMSC300 CMSIS">
651 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
652 <require Dvendor="ARM:82" Dname="ARMSC300"/>
653 <require Cclass="CMSIS" Cgroup="CORE"/>
654 </condition>
655
656 <condition id="ARMSC300 CMSIS GCC">
657 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
658 <require condition="ARMSC300 CMSIS"/>
659 <require condition="GCC"/>
660 </condition>
661
662 <condition id="ARMv8MBL CMSIS">
663 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
664 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
665 <require Cclass="CMSIS" Cgroup="CORE"/>
666 </condition>
667
668 <condition id="ARMv8MBL CMSIS GCC">
669 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
670 <require condition="ARMv8MBL CMSIS"/>
671 <require condition="GCC"/>
672 </condition>
673
674 <condition id="ARMv8MML CMSIS">
675 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
676 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
677 <require Cclass="CMSIS" Cgroup="CORE"/>
678 </condition>
679
680 <condition id="ARMv8MML CMSIS GCC">
681 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
682 <require condition="ARMv8MML CMSIS"/>
683 <require condition="GCC"/>
684 </condition>
685
686 <condition id="CMSIS DSP">
687 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
688 <require condition="Cortex-M Device CMSIS Core"/>
689 <accept Tcompiler="GCC"/>
690 <accept Tcompiler="ARMCC"/>
691 <accept Tcompiler="IAR"/>
692 </condition>
693
694 <!-- ARMCC compiler -->
695 <condition id="CM0_LE_ARMCC">
696 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
697 <accept Dcore="Cortex-M0"/>
698 <accept Dcore="Cortex-M0+"/>
699 <accept Dcore="SC000"/>
700 <require Dendian="Little-endian"/>
701 <require Tcompiler="ARMCC"/>
702 </condition>
703
704 <condition id="CM0_BE_ARMCC">
705 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
706 <accept Dcore="Cortex-M0"/>
707 <accept Dcore="Cortex-M0+"/>
708 <accept Dcore="SC000"/>
709 <require Dendian="Big-endian"/>
710 <require Tcompiler="ARMCC"/>
711 </condition>
712
713 <condition id="CM3_LE_ARMCC">
714 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
715 <accept Dcore="Cortex-M3"/>
716 <accept Dcore="SC300"/>
717 <require Dendian="Little-endian"/>
718 <require Tcompiler="ARMCC"/>
719 </condition>
720
721 <condition id="CM3_BE_ARMCC">
722 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
723 <accept Dcore="Cortex-M3"/>
724 <accept Dcore="SC300"/>
725 <require Dendian="Big-endian"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728
729 <condition id="CM4_LE_ARMCC">
730 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
731 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
734
735 <condition id="CM4_BE_ARMCC">
736 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
737 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
738 <require Tcompiler="ARMCC"/>
739 </condition>
740
741 <condition id="CM4F_LE_ARMCC">
742 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
743 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
744 <require Tcompiler="ARMCC"/>
745 </condition>
746
747 <condition id="CM4F_BE_ARMCC">
748 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
749 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
750 <require Tcompiler="ARMCC"/>
751 </condition>
752
753 <!-- XMC 4000 Series devices from Infineon require a special library -->
754 <condition id="CM4_LE_ARMCC_STD">
755 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
756 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
757 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
758 <require Tcompiler="ARMCC"/>
759 </condition>
760 <condition id="CM4_LE_ARMCC_IFX">
761 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
762 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
763 <require Tcompiler="ARMCC"/>
764 </condition>
765 <condition id="CM4F_LE_ARMCC_STD">
766 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
767 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
768 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
769 <require Tcompiler="ARMCC"/>
770 </condition>
771 <condition id="CM4F_LE_ARMCC_IFX">
772 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
773 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
774 <require Tcompiler="ARMCC"/>
775 </condition>
776
777 <condition id="CM7_LE_ARMCC">
778 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
779 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
780 <require Tcompiler="ARMCC"/>
781 </condition>
782
783 <condition id="CM7_BE_ARMCC">
784 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
785 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
786 <require Tcompiler="ARMCC"/>
787 </condition>
788
789 <condition id="CM7F_LE_ARMCC">
790 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
791 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
792 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
793 <require Tcompiler="ARMCC"/>
794 </condition>
795
796 <condition id="CM7F_BE_ARMCC">
797 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
798 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
799 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
800 <require Tcompiler="ARMCC"/>
801 </condition>
802
803 <condition id="CM7FSP_LE_ARMCC">
804 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
805 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
806 <require Tcompiler="ARMCC"/>
807 </condition>
808
809 <condition id="CM7FSP_BE_ARMCC">
810 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
811 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
812 <require Tcompiler="ARMCC"/>
813 </condition>
814
815 <condition id="CM7FDP_LE_ARMCC">
816 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
817 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
818 <require Tcompiler="ARMCC"/>
819 </condition>
820
821 <condition id="CM7FDP_BE_ARMCC">
822 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
823 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
824 <require Tcompiler="ARMCC"/>
825 </condition>
826
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]827 <condition id="ARMv8MBL_LE_ARMCC">
828 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
829 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
830 <require Tcompiler="ARMCC"/>
831 </condition>
832
833 <condition id="ARMv8MML_LE_ARMCC">
834 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
835 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
836 <require Tcompiler="ARMCC"/>
837 </condition>
838
839 <condition id="ARMv8MML_FP_LE_ARMCC">
840 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
841 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
842 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
843 <require Tcompiler="ARMCC"/>
844 </condition>
845
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]846 <!-- GCC compiler -->
847 <condition id="CM0_LE_GCC">
848 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
849 <accept Dcore="Cortex-M0"/>
850 <accept Dcore="Cortex-M0+"/>
851 <accept Dcore="SC000"/>
852 <require Dendian="Little-endian"/>
853 <require Tcompiler="GCC"/>
854 </condition>
855
856 <condition id="CM0_BE_GCC">
857 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
858 <accept Dcore="Cortex-M0"/>
859 <accept Dcore="Cortex-M0+"/>
860 <accept Dcore="SC000"/>
861 <require Dendian="Big-endian"/>
862 <require Tcompiler="GCC"/>
863 </condition>
864
865 <condition id="CM3_LE_GCC">
866 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
867 <accept Dcore="Cortex-M3"/>
868 <accept Dcore="SC300"/>
869 <require Dendian="Little-endian"/>
870 <require Tcompiler="GCC"/>
871 </condition>
872
873 <condition id="CM3_BE_GCC">
874 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
875 <accept Dcore="Cortex-M3"/>
876 <accept Dcore="SC300"/>
877 <require Dendian="Big-endian"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880
881 <condition id="CM4_LE_GCC">
882 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
883 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
884 <require Tcompiler="GCC"/>
885 </condition>
886
887 <condition id="CM4_BE_GCC">
888 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
889 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
890 <require Tcompiler="GCC"/>
891 </condition>
892
893 <condition id="CM4F_LE_GCC">
894 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
895 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
896 <require Tcompiler="GCC"/>
897 </condition>
898
899 <condition id="CM4F_BE_GCC">
900 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
901 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
902 <require Tcompiler="GCC"/>
903 </condition>
904
905 <!-- XMC 4000 Series devices from Infineon require a special library -->
906 <condition id="CM4_LE_GCC_STD">
907 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
908 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
909 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
910 <require Tcompiler="GCC"/>
911 </condition>
912 <condition id="CM4_LE_GCC_IFX">
913 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
914 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
915 <require Tcompiler="GCC"/>
916 </condition>
917 <condition id="CM4F_LE_GCC_STD">
918 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
919 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
920 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
921 <require Tcompiler="GCC"/>
922 </condition>
923 <condition id="CM4F_LE_GCC_IFX">
924 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
925 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
926 <require Tcompiler="GCC"/>
927 </condition>
928
929 <condition id="CM7_LE_GCC">
930 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
931 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
932 <require Tcompiler="GCC"/>
933 </condition>
934
935 <condition id="CM7_BE_GCC">
936 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
937 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
938 <require Tcompiler="GCC"/>
939 </condition>
940
941 <condition id="CM7F_LE_GCC">
942 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
943 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
944 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
945 <require Tcompiler="GCC"/>
946 </condition>
947
948 <condition id="CM7F_BE_GCC">
949 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
950 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
951 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
952 <require Tcompiler="GCC"/>
953 </condition>
954
955 <condition id="CM7FSP_LE_GCC">
956 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
957 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
958 <require Tcompiler="GCC"/>
959 </condition>
960
961 <condition id="CM7FSP_BE_GCC">
962 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
963 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
964 <require Tcompiler="GCC"/>
965 </condition>
966
967 <condition id="CM7FDP_LE_GCC">
968 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
969 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
970 <require Tcompiler="GCC"/>
971 </condition>
972
973 <condition id="CM7FDP_BE_GCC">
974 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
975 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
976 <require Tcompiler="GCC"/>
977 </condition>
978
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]979 <condition id="ARMv8MBL_LE_GCC">
980 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
981 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
982 <require Tcompiler="GCC"/>
983 </condition>
984
985 <condition id="ARMv8MML_LE_GCC">
986 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
987 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
988 <require Tcompiler="GCC"/>
989 </condition>
990
991 <condition id="ARMv8MML_FP_LE_GCC">
992 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
993 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
994 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
995 <require Tcompiler="GCC"/>
996 </condition>
997
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]998 <!-- IAR compiler -->
999 <condition id="CM0_LE_IAR">
1000 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1001 <accept Dcore="Cortex-M0"/>
1002 <accept Dcore="Cortex-M0+"/>
1003 <accept Dcore="SC000"/>
1004 <require Dendian="Little-endian"/>
1005 <require Tcompiler="IAR"/>
1006 </condition>
1007
1008 <condition id="CM0_BE_IAR">
1009 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1010 <accept Dcore="Cortex-M0"/>
1011 <accept Dcore="Cortex-M0+"/>
1012 <accept Dcore="SC000"/>
1013 <require Dendian="Big-endian"/>
1014 <require Tcompiler="IAR"/>
1015 </condition>
1016
1017 <condition id="CM3_LE_IAR">
1018 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1019 <accept Dcore="Cortex-M3"/>
1020 <accept Dcore="SC300"/>
1021 <require Dendian="Little-endian"/>
1022 <require Tcompiler="IAR"/>
1023 </condition>
1024
1025 <condition id="CM3_BE_IAR">
1026 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1027 <accept Dcore="Cortex-M3"/>
1028 <accept Dcore="SC300"/>
1029 <require Dendian="Big-endian"/>
1030 <require Tcompiler="IAR"/>
1031 </condition>
1032
1033 <condition id="CM4_LE_IAR">
1034 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1035 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1036 <require Tcompiler="IAR"/>
1037 </condition>
1038
1039 <condition id="CM4_BE_IAR">
1040 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1041 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
1042 <require Tcompiler="IAR"/>
1043 </condition>
1044
1045 <condition id="CM4F_LE_IAR">
1046 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1047 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1048 <require Tcompiler="IAR"/>
1049 </condition>
1050
1051 <condition id="CM4F_BE_IAR">
1052 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1053 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
1054 <require Tcompiler="IAR"/>
1055 </condition>
1056
1057 <condition id="CM7_LE_IAR">
1058 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1059 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1060 <require Tcompiler="IAR"/>
1061 </condition>
1062
1063 <condition id="CM7_BE_IAR">
1064 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1065 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1066 <require Tcompiler="IAR"/>
1067 </condition>
1068
1069 <condition id="CM7F_LE_IAR">
1070 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1071 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1072 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1073 <require Tcompiler="IAR"/>
1074 </condition>
1075
1076 <condition id="CM7F_BE_IAR">
1077 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1078 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1079 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1080 <require Tcompiler="IAR"/>
1081 </condition>
1082
1083 <condition id="CM7FSP_LE_IAR">
1084 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1085 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1086 <require Tcompiler="IAR"/>
1087 </condition>
1088
1089 <condition id="CM7FSP_BE_IAR">
1090 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1091 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1092 <require Tcompiler="IAR"/>
1093 </condition>
1094
1095 <condition id="CM7FDP_LE_IAR">
1096 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1097 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1098 <require Tcompiler="IAR"/>
1099 </condition>
1100
1101 <condition id="CM7FDP_BE_IAR">
1102 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1103 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1104 <require Tcompiler="IAR"/>
1105 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1106
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1107 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1108 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1109 <require condition="Cortex-M Device"/>
1110 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1111 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1112 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1113 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1114 <description>Components required for RTOS RTX5</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1115 <require condition="Cortex-M Device"/>
1116 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1117 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1118 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1119 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1120 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1121 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1122 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1123 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1124 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1125 <condition id="RTOS2 RTX5 ARMv8M">
1126 <description>Components required for RTOS2 RTX5 on ARMv8M</description>
1127 <accept Dcore="ARMV8MBL"/>
1128 <accept Dcore="ARMV8MML"/>
1129 <require Cclass="CMSIS" Cgroup="CORE"/>
1130 <require Cclass="Device" Cgroup="Startup"/>
1131 </condition>
1132
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1133 </conditions>
1134
1135 <components>
1136 <!-- CMSIS-Core component -->
1137 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1138 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1139 <files>
1140 <!-- CPU independent -->
1141 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1142 <file category="include" name="CMSIS/Include/"/>
1143 </files>
1144 </component>
1145
1146 <!-- CMSIS-Startup components -->
1147 <!-- Cortex-M0 -->
1148 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1149 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1150 <files>
1151 <!-- include folder / device header file -->
1152 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1153 <!-- startup / system file -->
1154 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1155 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1156 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1157 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1158 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1159 </files>
1160 </component>
1161 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1162 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1163 <files>
1164 <!-- include folder / device header file -->
1165 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1166 <!-- startup / system file -->
1167 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1168 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1169 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1170 </files>
1171 </component>
1172
1173 <!-- Cortex-M0+ -->
1174 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1175 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1176 <files>
1177 <!-- include folder / device header file -->
1178 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1179 <!-- startup / system file -->
1180 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1181 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1182 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1183 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1184 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1185 </files>
1186 </component>
1187 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1188 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1189 <files>
1190 <!-- include folder / device header file -->
1191 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1192 <!-- startup / system file -->
1193 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1194 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1195 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1196 </files>
1197 </component>
1198
1199 <!-- Cortex-M3 -->
1200 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1201 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1202 <files>
1203 <!-- include folder / device header file -->
1204 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1205 <!-- startup / system file -->
1206 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1207 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1208 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1209 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1210 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1211 </files>
1212 </component>
1213 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1214 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1215 <files>
1216 <!-- include folder / device header file -->
1217 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1218 <!-- startup / system file -->
1219 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1220 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1221 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1222 </files>
1223 </component>
1224
1225 <!-- Cortex-M4 -->
1226 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1227 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1228 <files>
1229 <!-- include folder / device header file -->
1230 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1231 <!-- startup / system file -->
1232 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1233 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1234 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1235 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1236 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1237 </files>
1238 </component>
1239 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1240 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1241 <files>
1242 <!-- include folder / device header file -->
1243 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1244 <!-- startup / system file -->
1245 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1246 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1247 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1248 </files>
1249 </component>
1250
1251 <!-- Cortex-M7 -->
1252 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1253 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1254 <files>
1255 <!-- include folder / device header file -->
1256 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1257 <!-- startup / system file -->
1258 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1259 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1260 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1261 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1262 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1263 </files>
1264 </component>
1265 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1266 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1267 <files>
1268 <!-- include folder / device header file -->
1269 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1270 <!-- startup / system file -->
1271 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1272 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1273 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1274 </files>
1275 </component>
1276
1277 <!-- Cortex-SC000 -->
1278 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1279 <description>System and Startup for Generic ARM SC000 device</description>
1280 <files>
1281 <!-- include folder / device header file -->
1282 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1283 <!-- startup / system file -->
1284 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1285 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1286 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1287 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1288 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1289 </files>
1290 </component>
1291 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1292 <description>System and Startup for Generic ARM SC000 device</description>
1293 <files>
1294 <!-- include folder / device header file -->
1295 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1296 <!-- startup / system file -->
1297 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1298 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1299 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1300 </files>
1301 </component>
1302
1303 <!-- Cortex-SC300 -->
1304 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1305 <description>System and Startup for Generic ARM SC300 device</description>
1306 <files>
1307 <!-- include folder / device header file -->
1308 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1309 <!-- startup / system file -->
1310 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1311 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1312 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1313 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1314 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1315 </files>
1316 </component>
1317 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1318 <description>System and Startup for Generic ARM SC300 device</description>
1319 <files>
1320 <!-- include folder / device header file -->
1321 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1322 <!-- startup / system file -->
1323 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1324 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1325 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1326 </files>
1327 </component>
1328
1329 <!-- ARMv8MBL -->
1330 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1331 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1332 <files>
1333 <!-- include folder / device header file -->
1334 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1335 <!-- startup / system file -->
1336 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1337 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1338 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1339 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1340 <!-- SAU configuration -->
1341 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1342 </files>
1343 </component>
1344 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1345 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1346 <files>
1347 <!-- include folder / device header file -->
1348 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1349 <!-- startup / system file -->
1350 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1351 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1352 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1353 </files>
1354 </component>
1355
1356 <!-- ARMv8MML -->
1357 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1358 <description>System and Startup for Generic ARM ARMv8MML device</description>
1359 <files>
1360 <!-- include folder / device header file -->
1361 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1362 <!-- startup / system file -->
1363 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1364 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1365 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1366 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1367 <!-- SAU configuration -->
1368 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1369 </files>
1370 </component>
1371 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1372 <description>System and Startup for Generic ARM ARMv8MML device</description>
1373 <files>
1374 <!-- include folder / device header file -->
1375 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1376 <!-- startup / system file -->
1377 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1378 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1379 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1380 </files>
1381 </component>
1382
1383
1384 <!-- CMSIS-DSP component -->
1385 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1386 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1387 <files>
1388 <!-- CPU independent -->
1389 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1390 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1391 <file category="header" name="CMSIS/Include/arm_math.h"/>
1392 <!-- CPU and Compiler dependent -->
1393 <!-- ARMCC -->
1394 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1395 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1396 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1397 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1398 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1399 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1400 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1401 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1402 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1403 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1404 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1405 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1406 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1407 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1408 <!-- GCC -->
1409 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1410 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1411 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1412 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1413 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1414 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1415 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1416 </files>
1417 </component>
1418
1419 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1420 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1421 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1422 <RTE_Components_h>
1423 <!-- the following content goes into file 'RTE_Components.h' -->
1424 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1425 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1426 </RTE_Components_h>
1427 <files>
1428 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1429 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1430 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1431 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1432
1433 <!-- RTX templates -->
1434 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1435 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1436 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1437 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1438 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1439 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1440 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1441 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1442 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1443 <!-- tool-chain specific template file -->
1444 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1445 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1446 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1447
1448 <!-- CPU and Compiler dependent -->
1449 <!-- ARMCC -->
1450 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1451 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1452 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1453 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1454 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1455 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1456 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1457 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1458 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1459 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1460 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1461 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1462 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1463 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1464 <!-- GCC -->
1465 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1466 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1467 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1468 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1469 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1470 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1471 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1472 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1473 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1474 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1475 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1476 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1477 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1478 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1479 <!-- IAR -->
1480 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1481 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1482 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1483 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1484 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1485 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1486 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1487 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1488 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1489 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1490 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1491 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1492 </files>
1493 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1494
1495 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1496 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1497 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1498 <RTE_Components_h>
1499 <!-- the following content goes into file 'RTE_Components.h' -->
1500 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1501 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1502 </RTE_Components_h>
1503 <files>
1504 <!-- RTX header file -->
1505 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1506 <!-- RTX compatibility module for API V1 -->
1507 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1508 </files>
1509 </component>
1510
1511 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1512 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1513 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1514 <RTE_Components_h>
1515 <!-- the following content goes into file 'RTE_Components.h' -->
1516 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1517 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1518 </RTE_Components_h>
1519 <files>
1520 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1521 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1522
1523 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1524 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1525 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1526
1527 <!-- RTX configuration -->
1528 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1529
1530 <!-- RTX templates -->
1531 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1532 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1533 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1534
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1535 <!-- RTX libraries (CPU and Compiler dependent) -->
1536 <!-- ARMCC -->
1537 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1538 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1539 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1540 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1541 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1542 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1543 <!-- GCC -->
1544 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1545 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1546 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1547 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1548 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1549 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1550 </files>
1551 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1552 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
1553 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M</description>
1554 <RTE_Components_h>
1555 <!-- the following content goes into file 'RTE_Components.h' -->
1556 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1557 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1558 </RTE_Components_h>
1559 <files>
1560 <!-- RTX documentation -->
1561 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1562
1563 <!-- RTX header files -->
1564 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1565 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1566
1567 <!-- RTX configuration -->
1568 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1569
1570 <!-- RTX templates -->
1571 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1572 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1573 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1574
1575 <!-- RTX libraries (CPU and Compiler dependent) -->
1576 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1577 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1578 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1579 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1580 <!-- GCC -->
1581 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1582 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1583 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1584 </files>
1585 </component>
1586 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
Robert Rostoharb240dc82016-09-23 16:46:39 +0200[diff] [blame]1587 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M Non-Secure Domain</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1588 <RTE_Components_h>
1589 <!-- the following content goes into file 'RTE_Components.h' -->
1590 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1591 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1592 </RTE_Components_h>
1593 <files>
1594 <!-- RTX documentation -->
1595 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1596
1597 <!-- RTX header files -->
1598 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1599 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1600
1601 <!-- RTX configuration -->
1602 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1603
1604 <!-- RTX templates -->
1605 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1606 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1607 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1608
1609 <!-- RTX libraries (CPU and Compiler dependent) -->
1610 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1611 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1612 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1613 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1614 <!-- GCC -->
1615 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1616 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1617 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1618 </files>
1619 </component>
1620
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1621 </components>
1622
1623 <boards>
1624 <board name="uVision Simulator" vendor="Keil">
1625 <description>uVision Simulator</description>
1626 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1627 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1628 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1629 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1630 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1631 </board>
1632 </boards>
1633
1634 <examples>
1635 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1636 <description>DSP_Lib Class Marks example</description>
1637 <board name="uVision Simulator" vendor="Keil"/>
1638 <project>
1639 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1640 </project>
1641 <attributes>
1642 <component Cclass="CMSIS" Cgroup="CORE"/>
1643 <component Cclass="CMSIS" Cgroup="DSP"/>
1644 <component Cclass="Device" Cgroup="Startup"/>
1645 <category>Getting Started</category>
1646 </attributes>
1647 </example>
1648
1649 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1650 <description>DSP_Lib Convolution example</description>
1651 <board name="uVision Simulator" vendor="Keil"/>
1652 <project>
1653 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1654 </project>
1655 <attributes>
1656 <component Cclass="CMSIS" Cgroup="CORE"/>
1657 <component Cclass="CMSIS" Cgroup="DSP"/>
1658 <component Cclass="Device" Cgroup="Startup"/>
1659 <category>Getting Started</category>
1660 </attributes>
1661 </example>
1662
1663 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1664 <description>DSP_Lib Dotproduct example</description>
1665 <board name="uVision Simulator" vendor="Keil"/>
1666 <project>
1667 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1668 </project>
1669 <attributes>
1670 <component Cclass="CMSIS" Cgroup="CORE"/>
1671 <component Cclass="CMSIS" Cgroup="DSP"/>
1672 <component Cclass="Device" Cgroup="Startup"/>
1673 <category>Getting Started</category>
1674 </attributes>
1675 </example>
1676
1677 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1678 <description>DSP_Lib FFT Bin example</description>
1679 <board name="uVision Simulator" vendor="Keil"/>
1680 <project>
1681 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1682 </project>
1683 <attributes>
1684 <component Cclass="CMSIS" Cgroup="CORE"/>
1685 <component Cclass="CMSIS" Cgroup="DSP"/>
1686 <component Cclass="Device" Cgroup="Startup"/>
1687 <category>Getting Started</category>
1688 </attributes>
1689 </example>
1690
1691 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1692 <description>DSP_Lib FIR example</description>
1693 <board name="uVision Simulator" vendor="Keil"/>
1694 <project>
1695 <environment name="uv" load="arm_fir_example.uvprojx"/>
1696 </project>
1697 <attributes>
1698 <component Cclass="CMSIS" Cgroup="CORE"/>
1699 <component Cclass="CMSIS" Cgroup="DSP"/>
1700 <component Cclass="Device" Cgroup="Startup"/>
1701 <category>Getting Started</category>
1702 </attributes>
1703 </example>
1704
1705 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1706 <description>DSP_Lib Graphic Equalizer example</description>
1707 <board name="uVision Simulator" vendor="Keil"/>
1708 <project>
1709 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1710 </project>
1711 <attributes>
1712 <component Cclass="CMSIS" Cgroup="CORE"/>
1713 <component Cclass="CMSIS" Cgroup="DSP"/>
1714 <component Cclass="Device" Cgroup="Startup"/>
1715 <category>Getting Started</category>
1716 </attributes>
1717 </example>
1718
1719 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1720 <description>DSP_Lib Linear Interpolation example</description>
1721 <board name="uVision Simulator" vendor="Keil"/>
1722 <project>
1723 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1724 </project>
1725 <attributes>
1726 <component Cclass="CMSIS" Cgroup="CORE"/>
1727 <component Cclass="CMSIS" Cgroup="DSP"/>
1728 <component Cclass="Device" Cgroup="Startup"/>
1729 <category>Getting Started</category>
1730 </attributes>
1731 </example>
1732
1733 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1734 <description>DSP_Lib Matrix example</description>
1735 <board name="uVision Simulator" vendor="Keil"/>
1736 <project>
1737 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1738 </project>
1739 <attributes>
1740 <component Cclass="CMSIS" Cgroup="CORE"/>
1741 <component Cclass="CMSIS" Cgroup="DSP"/>
1742 <component Cclass="Device" Cgroup="Startup"/>
1743 <category>Getting Started</category>
1744 </attributes>
1745 </example>
1746
1747 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1748 <description>DSP_Lib Signal Convergence example</description>
1749 <board name="uVision Simulator" vendor="Keil"/>
1750 <project>
1751 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1752 </project>
1753 <attributes>
1754 <component Cclass="CMSIS" Cgroup="CORE"/>
1755 <component Cclass="CMSIS" Cgroup="DSP"/>
1756 <component Cclass="Device" Cgroup="Startup"/>
1757 <category>Getting Started</category>
1758 </attributes>
1759 </example>
1760
1761 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1762 <description>DSP_Lib Sinus/Cosinus example</description>
1763 <board name="uVision Simulator" vendor="Keil"/>
1764 <project>
1765 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1766 </project>
1767 <attributes>
1768 <component Cclass="CMSIS" Cgroup="CORE"/>
1769 <component Cclass="CMSIS" Cgroup="DSP"/>
1770 <component Cclass="Device" Cgroup="Startup"/>
1771 <category>Getting Started</category>
1772 </attributes>
1773 </example>
1774
1775 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1776 <description>DSP_Lib Variance example</description>
1777 <board name="uVision Simulator" vendor="Keil"/>
1778 <project>
1779 <environment name="uv" load="arm_variance_example.uvprojx"/>
1780 </project>
1781 <attributes>
1782 <component Cclass="CMSIS" Cgroup="CORE"/>
1783 <component Cclass="CMSIS" Cgroup="DSP"/>
1784 <component Cclass="Device" Cgroup="Startup"/>
1785 <category>Getting Started</category>
1786 </attributes>
1787 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1788
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1789 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1790 <description>CMSIS-RTOS2 Blinky example</description>
1791 <board name="uVision Simulator" vendor="Keil"/>
1792 <project>
1793 <environment name="uv" load="Blinky.uvprojx"/>
1794 </project>
1795 <attributes>
1796 <component Cclass="CMSIS" Cgroup="CORE"/>
1797 <component Cclass="CMSIS" Cgroup="RTOS2"/>
1798 <component Cclass="Device" Cgroup="Startup"/>
1799 <category>Getting Started</category>
1800 </attributes>
1801 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1802
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1803 </examples>
1804
1805</package>