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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 2a0fd6d22d4d697f302ca6e4ea246b5d8f29afb1 / . / ARM.CMSIS.pdsc
blob: 578301364bdc6de2f2686e9b89a1f080ba8165fc [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]11 <release version="5.0.0-Beta12">
12 CMSIS_Core:
13 - Added new file cmsis_compiler.h.
14 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]15 - Reworked compiler specific include files.
16 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]17 - Added __PACKED macro.
18 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]19 <release version="5.0.0-Beta11">
20 CMSIS_Core:
21 - Added CMSE support to cmsis_gcc.h.
22 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]23 <release version="5.0.0-Beta10">
24 CMSIS-RTOS2:
25 - Added RTX5 component.
26 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]27 <release version="5.0.0-Beta9">
28 CMSIS_Core:
29 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
30 - Reworked SAU register and functions.
31 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]32 <release version="5.0.0-Beta8">
33 CMSIS-RTOS:
34 - API 2.0
35 - RTX 5.0.0-Alpha
36 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]37 <release version="5.0.0-Beta7">
38 CMSIS_Core:
39 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]40 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]41 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]42 <release version="5.0.0-Beta6">
43 CMSIS_Core:
44 - Added SCB_CFSR register bit definitions in core_*.h.
45 - Added NVIC_GetEnableIRQ function in core_*.h.
46 - Updated core instruction macros in cmsis_gcc.h.
47 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]48 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]49 CMSIS_DSP:
50 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
51 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]52 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]53 <release version="5.0.0-Beta4">
54 Updated ARMv8MML device files.
55 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
56 Updated CMSIS core files.
57 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
58 </release>
59 <release version="5.0.0-Beta3">
60 Updated CMSIS ARMv8M core / device files
61 - increased SAU regions to 8.
62 - moved TZ_SAU_Setup() to partition_#device#.h.
63 </release>
64 <release version="5.0.0-Beta2">
65 - renamed core_*.h to lower case.
66 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
67 - updated ARMv8M?L.svd.
68 </release>
69 <release version="5.0.0-Beta1">
70 - added function SCB_GetFPUType() to all CMSIS cores.
71 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
72 - updated CMSIS core files to V5.0
73 - updated CMSIS Core change log.
74 - updated CMSIS DSP_Lib change log.
75 - updated CMSIS DSP_Lib libraries.
76 </release>
77 <release version="5.0.0-Beta" date="2015-12-15">
78 Added ARMv8M support to CMSIS-Core.
79 - CMSIS-Core 5.0.0 Beta (see revision history for details)
80 - CMSIS-RTOS
81 -- API 1.02 (unchanged)
82 -- RTX 4.81.0 (see revision history for details)
83 - CMSIS-SVD 1.3.2 (see revision history for details)
84 </release>
85 <release version="4.5.0" date="2015-10-28">
86 - CMSIS-Core 4.30.0 (see revision history for details)
87 - CMSIS-DAP 1.1.0 (unchanged)
88 - CMSIS-Driver 2.04.0 (see revision history for details)
89 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
90 - CMSIS-PACK 1.4.1 (see revision history for details)
91 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
92 - CMSIS-SVD 1.3.1 (see revision history for details)
93 </release>
94 <release version="4.4.0" date="2015-09-11">
95 - CMSIS-Core 4.20 (see revision history for details)
96 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
97 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
98 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
99 - CMSIS-RTOS
100 -- API 1.02 (unchanged)
101 -- RTX 4.79 (see revision history for details)
102 - CMSIS-SVD 1.3.0 (see revision history for details)
103 - CMSIS-DAP 1.1.0 (extended with SWO support)
104 </release>
105 <release version="4.3.0" date="2015-03-20">
106 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
107 - CMSIS-DSP 1.4.5 (see revision history for details)
108 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
109 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
110 - CMSIS-RTOS
111 -- API 1.02 (unchanged)
112 -- RTX 4.78 (see revision history for details)
113 - CMSIS-SVD 1.2 (unchanged)
114 </release>
115 <release version="4.2.0" date="2014-09-24">
116 Adding Cortex-M7 support
117 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
118 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
119 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
120 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
121 - CMSIS-RTOS RTX 4.75 (see revision history for details)
122 </release>
123 <release version="4.1.1" date="2014-06-30">
124 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
125 </release>
126 <release version="4.1.0" date="2014-06-12">
127 - CMSIS-Driver 2.02 (incompatible update)
128 - CMSIS-Pack 1.3 (see revision history for details)
129 - CMSIS-DSP 1.4.2 (unchanged)
130 - CMSIS-Core 3.30 (unchanged)
131 - CMSIS-RTOS RTX 4.74 (unchanged)
132 - CMSIS-RTOS API 1.02 (unchanged)
133 - CMSIS-SVD 1.10 (unchanged)
134 PACK:
135 - removed G++ specific files from PACK
136 - added Component Startup variant "C Startup"
137 - added Pack Checking Utility
138 - updated conditions to reflect tool-chain dependency
139 - added Taxonomy for Graphics
140 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
141 </release>
142 <release version="4.0.0">
143 - CMSIS-Driver 2.00 Preliminary (incompatible update)
144 - CMSIS-Pack 1.1 Preliminary
145 - CMSIS-DSP 1.4.2 (see revision history for details)
146 - CMSIS-Core 3.30 (see revision history for details)
147 - CMSIS-RTOS RTX 4.74 (see revision history for details)
148 - CMSIS-RTOS API 1.02 (unchanged)
149 - CMSIS-SVD 1.10 (unchanged)
150 </release>
151 <release version="3.20.4">
152 - CMSIS-RTOS 4.74 (see revision history for details)
153 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
154 </release>
155 <release version="3.20.3">
156 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
157 - CMSIS-RTOS 4.73 (see revision history for details)
158 </release>
159 <release version="3.20.2">
160 - CMSIS-Pack documentation has been added
161 - CMSIS-Drivers header and documentation have been added to PACK
162 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
163 </release>
164 <release version="3.20.1">
165 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
166 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
167 </release>
168 <release version="3.20.0">
169 The software portions that are deployed in the application program are now under a BSD license which allows usage
170 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
171 The individual components have been update as listed below:
172 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
173 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
174 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
175 - CMSIS-SVD is unchanged.
176 </release>
177 </releases>
178
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]179 <taxonomy>
180 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
181 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
182 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
183 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
184 <description Cclass="File System">File Drive Support and File System</description>
185 <description Cclass="Graphics">Graphical User Interface</description>
186 <description Cclass="Network">Network Stack using Internet Protocols</description>
187 <description Cclass="USB">Universal Serial Bus Stack</description>
188 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
189 </taxonomy>
190
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]191 <devices>
192 <!-- ****************************** Cortex-M0 ****************************** -->
193 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]194 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]195 <description>
196The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
197- simple, easy-to-use programmers model
198- highly efficient ultra-low power operation
199- excellent code density
200- deterministic, high-performance interrupt handling
201- upward compatibility with the rest of the Cortex-M processor family.
202 </description>
203 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
204 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
205 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
206 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
207
208 <device Dname="ARMCM0">
209 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
210 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
211 </device>
212 </family>
213
214 <!-- ****************************** Cortex-M0P ****************************** -->
215 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]216 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]217 <description>
218The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
219- simple, easy-to-use programmers model
220- highly efficient ultra-low power operation
221- excellent code density
222- deterministic, high-performance interrupt handling
223- upward compatibility with the rest of the Cortex-M processor family.
224 </description>
225 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
226 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
227 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
228 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
229
230 <device Dname="ARMCM0P">
231 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
232 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
233 </device>
234 </family>
235
236 <!-- ****************************** Cortex-M3 ****************************** -->
237 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]238 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]239 <description>
240The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
241- simple, easy-to-use programmers model
242- highly efficient ultra-low power operation
243- excellent code density
244- deterministic, high-performance interrupt handling
245- upward compatibility with the rest of the Cortex-M processor family.
246 </description>
247 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
248 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
249 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
250 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
251
252 <device Dname="ARMCM3">
253 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
254 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
255 </device>
256 </family>
257
258 <!-- ****************************** Cortex-M4 ****************************** -->
259 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]260 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]261 <description>
262The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
263- simple, easy-to-use programmers model
264- highly efficient ultra-low power operation
265- excellent code density
266- deterministic, high-performance interrupt handling
267- upward compatibility with the rest of the Cortex-M processor family.
268 </description>
269 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
270 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
271 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
272 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
273
274 <device Dname="ARMCM4">
275 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
276 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
277 </device>
278
279 <device Dname="ARMCM4_FP">
280 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
281 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
282 </device>
283 </family>
284
285 <!-- ****************************** Cortex-M7 ****************************** -->
286 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]287 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]288 <description>
289The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
290- simple, easy-to-use programmers model
291- highly efficient ultra-low power operation
292- excellent code density
293- deterministic, high-performance interrupt handling
294- upward compatibility with the rest of the Cortex-M processor family.
295 </description>
296 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
297 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
298 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
299 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
300
301 <device Dname="ARMCM7">
302 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
303 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
304 </device>
305
306 <device Dname="ARMCM7_SP">
307 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
308 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
309 </device>
310
311 <device Dname="ARMCM7_DP">
312 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
313 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
314 </device>
315 </family>
316
317 <!-- ****************************** ARMSC000 ****************************** -->
318 <family Dfamily="ARM SC000" Dvendor="ARM:82">
319 <description>
320The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
321- simple, easy-to-use programmers model
322- highly efficient ultra-low power operation
323- excellent code density
324- deterministic, high-performance interrupt handling
325 </description>
326 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
327 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
328 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
329 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
330
331 <device Dname="ARMSC000">
332 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
333 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
334 </device>
335 </family>
336
337 <!-- ****************************** ARMSC300 ****************************** -->
338 <family Dfamily="ARM SC300" Dvendor="ARM:82">
339 <description>
340The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
341- simple, easy-to-use programmers model
342- highly efficient ultra-low power operation
343- excellent code density
344- deterministic, high-performance interrupt handling
345 </description>
346 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
347 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
348 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
349 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
350
351 <device Dname="ARMSC300">
352 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
353 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
354 </device>
355 </family>
356
357 <!-- ****************************** ARMv8-M Baseline ********************** -->
358 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
359 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
360 <description>
361The ARMv8MBL processor is brand new.
362 </description>
363 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
364 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
365 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
366 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
367
368 <device Dname="ARMv8MBL">
369 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
370 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
371 </device>
372 </family>
373
374 <!-- ****************************** ARMv8-M Mainline ****************************** -->
375 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
376 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
377 <description>
378The ARMv8MML processor is brand new.
379 </description>
380 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
381 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
382 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
383 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
384
385 <device Dname="ARMv8MML">
386 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
387 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
388 </device>
389
390 <device Dname="ARMv8MML_SP">
391 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
392 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
393 </device>
394
395 <device Dname="ARMv8MML_DP">
396 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
397 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
398 </device>
399 </family>
400
401 </devices>
402
403
404 <apis>
405 <!-- CMSIS-RTOS API -->
406 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
407 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
408 <files>
409 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
410 </files>
411 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]412 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]413 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
414 <files>
415 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
416 </files>
417 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]418 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
419 <description>USART Driver API for Cortex-M</description>
420 <files>
421 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
422 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
423 </files>
424 </api>
425 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
426 <description>SPI Driver API for Cortex-M</description>
427 <files>
428 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
429 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
430 </files>
431 </api>
432 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
433 <description>SAI Driver API for Cortex-M</description>
434 <files>
435 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
436 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
437 </files>
438 </api>
439 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
440 <description>I2C Driver API for Cortex-M</description>
441 <files>
442 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
443 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
444 </files>
445 </api>
446 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
447 <description>CAN Driver API for Cortex-M</description>
448 <files>
449 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
450 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
451 </files>
452 </api>
453 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
454 <description>Flash Driver API for Cortex-M</description>
455 <files>
456 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
457 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
458 </files>
459 </api>
460 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
461 <description>MCI Driver API for Cortex-M</description>
462 <files>
463 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
464 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
465 </files>
466 </api>
467 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
468 <description>NAND Flash Driver API for Cortex-M</description>
469 <files>
470 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
471 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
472 </files>
473 </api>
474 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
475 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
476 <files>
477 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
478 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
479 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
480 </files>
481 </api>
482 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
483 <description>Ethernet MAC Driver API for Cortex-M</description>
484 <files>
485 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
486 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
487 </files>
488 </api>
489 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
490 <description>Ethernet PHY Driver API for Cortex-M</description>
491 <files>
492 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
493 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
494 </files>
495 </api>
496 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
497 <description>USB Device Driver API for Cortex-M</description>
498 <files>
499 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
500 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
501 </files>
502 </api>
503 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
504 <description>USB Host Driver API for Cortex-M</description>
505 <files>
506 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
507 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
508 </files>
509 </api>
510 </apis>
511
512 <!-- conditions are dependency rules that can apply to a component or an individual file -->
513 <conditions>
514 <condition id="ARMCC">
515 <require Tcompiler="ARMCC"/>
516 </condition>
517
518 <condition id="GCC">
519 <require Tcompiler="GCC"/>
520 </condition>
521
522 <condition id="IAR">
523 <require Tcompiler="IAR"/>
524 </condition>
525
526 <condition id="ARMCC GCC">
527 <accept Tcompiler="ARMCC"/>
528 <accept Tcompiler="GCC"/>
529 </condition>
530
531 <condition id="Cortex-M Device">
532 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
533 <accept Dcore="Cortex-M0"/>
534 <accept Dcore="Cortex-M0+"/>
535 <accept Dcore="Cortex-M3"/>
536 <accept Dcore="Cortex-M4"/>
537 <accept Dcore="Cortex-M7"/>
538 <accept Dcore="SC000"/>
539 <accept Dcore="SC300"/>
540 </condition>
541
542 <condition id="Cortex-M ARMv8-M Device">
543 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
544 <accept Dcore="Cortex-M0"/>
545 <accept Dcore="Cortex-M0+"/>
546 <accept Dcore="Cortex-M3"/>
547 <accept Dcore="Cortex-M4"/>
548 <accept Dcore="Cortex-M7"/>
549 <accept Dcore="SC000"/>
550 <accept Dcore="SC300"/>
551 <accept Dcore="ARMV8MBL"/>
552 <accept Dcore="ARMV8MML"/>
553 </condition>
554
555 <condition id="Cortex-M Device CMSIS Core">
556 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
557 <require condition="Cortex-M Device"/>
558 <require Cclass="CMSIS" Cgroup="CORE"/>
559 </condition>
560
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]561 <condition id="CMSIS Core">
562 <description>CMSIS CORE processor and device specific Startup files</description>
563 <require Cclass="CMSIS" Cgroup="CORE"/>
564 </condition>
565
566 <condition id="ARMCM0 CMSIS">
567 <!-- conditions selecting Devices -->
568 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
569 <require Dvendor="ARM:82" Dname="ARMCM0"/>
570 <require Cclass="CMSIS" Cgroup="CORE"/>
571 </condition>
572
573 <condition id="ARMCM0 CMSIS GCC">
574 <!-- conditions selecting Devices -->
575 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
576 <require condition="ARMCM0 CMSIS"/>
577 <require condition="GCC"/>
578 </condition>
579
580 <condition id="ARMCM0+ CMSIS">
581 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
582 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
583 <require Cclass="CMSIS" Cgroup="CORE"/>
584 </condition>
585
586 <condition id="ARMCM0+ CMSIS GCC">
587 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
588 <require condition="ARMCM0+ CMSIS"/>
589 <require condition="GCC"/>
590 </condition>
591
592 <condition id="ARMCM3 CMSIS">
593 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
594 <require Dvendor="ARM:82" Dname="ARMCM3"/>
595 <require Cclass="CMSIS" Cgroup="CORE"/>
596 </condition>
597
598 <condition id="ARMCM3 CMSIS GCC">
599 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
600 <require condition="ARMCM3 CMSIS"/>
601 <require condition="GCC"/>
602 </condition>
603
604 <condition id="ARMCM4 CMSIS">
605 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
606 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
607 <require Cclass="CMSIS" Cgroup="CORE"/>
608 </condition>
609
610 <condition id="ARMCM4 CMSIS GCC">
611 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
612 <require condition="ARMCM4 CMSIS"/>
613 <require condition="GCC"/>
614 </condition>
615
616 <condition id="ARMCM7 CMSIS">
617 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
618 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
619 <require Cclass="CMSIS" Cgroup="CORE"/>
620 </condition>
621
622 <condition id="ARMCM7 CMSIS GCC">
623 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
624 <require condition="ARMCM7 CMSIS"/>
625 <require condition="GCC"/>
626 </condition>
627
628 <condition id="ARMSC000 CMSIS">
629 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
630 <require Dvendor="ARM:82" Dname="ARMSC000"/>
631 <require Cclass="CMSIS" Cgroup="CORE"/>
632 </condition>
633
634 <condition id="ARMSC000 CMSIS GCC">
635 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
636 <require condition="ARMSC000 CMSIS"/>
637 <require condition="GCC"/>
638 </condition>
639
640 <condition id="ARMSC300 CMSIS">
641 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
642 <require Dvendor="ARM:82" Dname="ARMSC300"/>
643 <require Cclass="CMSIS" Cgroup="CORE"/>
644 </condition>
645
646 <condition id="ARMSC300 CMSIS GCC">
647 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
648 <require condition="ARMSC300 CMSIS"/>
649 <require condition="GCC"/>
650 </condition>
651
652 <condition id="ARMv8MBL CMSIS">
653 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
654 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
655 <require Cclass="CMSIS" Cgroup="CORE"/>
656 </condition>
657
658 <condition id="ARMv8MBL CMSIS GCC">
659 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
660 <require condition="ARMv8MBL CMSIS"/>
661 <require condition="GCC"/>
662 </condition>
663
664 <condition id="ARMv8MML CMSIS">
665 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
666 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
667 <require Cclass="CMSIS" Cgroup="CORE"/>
668 </condition>
669
670 <condition id="ARMv8MML CMSIS GCC">
671 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
672 <require condition="ARMv8MML CMSIS"/>
673 <require condition="GCC"/>
674 </condition>
675
676 <condition id="CMSIS DSP">
677 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
678 <require condition="Cortex-M Device CMSIS Core"/>
679 <accept Tcompiler="GCC"/>
680 <accept Tcompiler="ARMCC"/>
681 <accept Tcompiler="IAR"/>
682 </condition>
683
684 <!-- ARMCC compiler -->
685 <condition id="CM0_LE_ARMCC">
686 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
687 <accept Dcore="Cortex-M0"/>
688 <accept Dcore="Cortex-M0+"/>
689 <accept Dcore="SC000"/>
690 <require Dendian="Little-endian"/>
691 <require Tcompiler="ARMCC"/>
692 </condition>
693
694 <condition id="CM0_BE_ARMCC">
695 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
696 <accept Dcore="Cortex-M0"/>
697 <accept Dcore="Cortex-M0+"/>
698 <accept Dcore="SC000"/>
699 <require Dendian="Big-endian"/>
700 <require Tcompiler="ARMCC"/>
701 </condition>
702
703 <condition id="CM3_LE_ARMCC">
704 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
705 <accept Dcore="Cortex-M3"/>
706 <accept Dcore="SC300"/>
707 <require Dendian="Little-endian"/>
708 <require Tcompiler="ARMCC"/>
709 </condition>
710
711 <condition id="CM3_BE_ARMCC">
712 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
713 <accept Dcore="Cortex-M3"/>
714 <accept Dcore="SC300"/>
715 <require Dendian="Big-endian"/>
716 <require Tcompiler="ARMCC"/>
717 </condition>
718
719 <condition id="CM4_LE_ARMCC">
720 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
721 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
722 <require Tcompiler="ARMCC"/>
723 </condition>
724
725 <condition id="CM4_BE_ARMCC">
726 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
727 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
728 <require Tcompiler="ARMCC"/>
729 </condition>
730
731 <condition id="CM4F_LE_ARMCC">
732 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
733 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
734 <require Tcompiler="ARMCC"/>
735 </condition>
736
737 <condition id="CM4F_BE_ARMCC">
738 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
739 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
740 <require Tcompiler="ARMCC"/>
741 </condition>
742
743 <!-- XMC 4000 Series devices from Infineon require a special library -->
744 <condition id="CM4_LE_ARMCC_STD">
745 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
746 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
747 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750 <condition id="CM4_LE_ARMCC_IFX">
751 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
752 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
753 <require Tcompiler="ARMCC"/>
754 </condition>
755 <condition id="CM4F_LE_ARMCC_STD">
756 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
757 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
758 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
759 <require Tcompiler="ARMCC"/>
760 </condition>
761 <condition id="CM4F_LE_ARMCC_IFX">
762 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
763 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
764 <require Tcompiler="ARMCC"/>
765 </condition>
766
767 <condition id="CM7_LE_ARMCC">
768 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
769 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
770 <require Tcompiler="ARMCC"/>
771 </condition>
772
773 <condition id="CM7_BE_ARMCC">
774 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
775 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
776 <require Tcompiler="ARMCC"/>
777 </condition>
778
779 <condition id="CM7F_LE_ARMCC">
780 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
781 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
782 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
783 <require Tcompiler="ARMCC"/>
784 </condition>
785
786 <condition id="CM7F_BE_ARMCC">
787 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
788 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
789 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
790 <require Tcompiler="ARMCC"/>
791 </condition>
792
793 <condition id="CM7FSP_LE_ARMCC">
794 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
795 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
796 <require Tcompiler="ARMCC"/>
797 </condition>
798
799 <condition id="CM7FSP_BE_ARMCC">
800 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
801 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
802 <require Tcompiler="ARMCC"/>
803 </condition>
804
805 <condition id="CM7FDP_LE_ARMCC">
806 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
807 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
808 <require Tcompiler="ARMCC"/>
809 </condition>
810
811 <condition id="CM7FDP_BE_ARMCC">
812 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
813 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
814 <require Tcompiler="ARMCC"/>
815 </condition>
816
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]817 <condition id="ARMv8MBL_LE_ARMCC">
818 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
819 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
820 <require Tcompiler="ARMCC"/>
821 </condition>
822
823 <condition id="ARMv8MML_LE_ARMCC">
824 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
825 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
826 <require Tcompiler="ARMCC"/>
827 </condition>
828
829 <condition id="ARMv8MML_FP_LE_ARMCC">
830 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
831 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
832 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
833 <require Tcompiler="ARMCC"/>
834 </condition>
835
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]836 <!-- GCC compiler -->
837 <condition id="CM0_LE_GCC">
838 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
839 <accept Dcore="Cortex-M0"/>
840 <accept Dcore="Cortex-M0+"/>
841 <accept Dcore="SC000"/>
842 <require Dendian="Little-endian"/>
843 <require Tcompiler="GCC"/>
844 </condition>
845
846 <condition id="CM0_BE_GCC">
847 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
848 <accept Dcore="Cortex-M0"/>
849 <accept Dcore="Cortex-M0+"/>
850 <accept Dcore="SC000"/>
851 <require Dendian="Big-endian"/>
852 <require Tcompiler="GCC"/>
853 </condition>
854
855 <condition id="CM3_LE_GCC">
856 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
857 <accept Dcore="Cortex-M3"/>
858 <accept Dcore="SC300"/>
859 <require Dendian="Little-endian"/>
860 <require Tcompiler="GCC"/>
861 </condition>
862
863 <condition id="CM3_BE_GCC">
864 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
865 <accept Dcore="Cortex-M3"/>
866 <accept Dcore="SC300"/>
867 <require Dendian="Big-endian"/>
868 <require Tcompiler="GCC"/>
869 </condition>
870
871 <condition id="CM4_LE_GCC">
872 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
873 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
874 <require Tcompiler="GCC"/>
875 </condition>
876
877 <condition id="CM4_BE_GCC">
878 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
879 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
880 <require Tcompiler="GCC"/>
881 </condition>
882
883 <condition id="CM4F_LE_GCC">
884 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
885 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
886 <require Tcompiler="GCC"/>
887 </condition>
888
889 <condition id="CM4F_BE_GCC">
890 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
891 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
892 <require Tcompiler="GCC"/>
893 </condition>
894
895 <!-- XMC 4000 Series devices from Infineon require a special library -->
896 <condition id="CM4_LE_GCC_STD">
897 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
898 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
899 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
900 <require Tcompiler="GCC"/>
901 </condition>
902 <condition id="CM4_LE_GCC_IFX">
903 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
904 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
905 <require Tcompiler="GCC"/>
906 </condition>
907 <condition id="CM4F_LE_GCC_STD">
908 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
909 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
910 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
911 <require Tcompiler="GCC"/>
912 </condition>
913 <condition id="CM4F_LE_GCC_IFX">
914 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
915 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
916 <require Tcompiler="GCC"/>
917 </condition>
918
919 <condition id="CM7_LE_GCC">
920 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
921 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
922 <require Tcompiler="GCC"/>
923 </condition>
924
925 <condition id="CM7_BE_GCC">
926 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
927 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
928 <require Tcompiler="GCC"/>
929 </condition>
930
931 <condition id="CM7F_LE_GCC">
932 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
933 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
934 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
935 <require Tcompiler="GCC"/>
936 </condition>
937
938 <condition id="CM7F_BE_GCC">
939 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
940 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
941 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
942 <require Tcompiler="GCC"/>
943 </condition>
944
945 <condition id="CM7FSP_LE_GCC">
946 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
947 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
948 <require Tcompiler="GCC"/>
949 </condition>
950
951 <condition id="CM7FSP_BE_GCC">
952 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
953 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
954 <require Tcompiler="GCC"/>
955 </condition>
956
957 <condition id="CM7FDP_LE_GCC">
958 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
959 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
960 <require Tcompiler="GCC"/>
961 </condition>
962
963 <condition id="CM7FDP_BE_GCC">
964 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
965 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
966 <require Tcompiler="GCC"/>
967 </condition>
968
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame^]969 <condition id="ARMv8MBL_LE_GCC">
970 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
971 <require Dcore="ARMV8MBL" Dendian="Little-endian"/>
972 <require Tcompiler="GCC"/>
973 </condition>
974
975 <condition id="ARMv8MML_LE_GCC">
976 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
977 <require Dcore="ARMV8MML" Dfpu="0" Dendian="Little-endian"/>
978 <require Tcompiler="GCC"/>
979 </condition>
980
981 <condition id="ARMv8MML_FP_LE_GCC">
982 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
983 <accept Dcore="ARMV8MML" Dfpu="SP_FPU" Dendian="Little-endian"/>
984 <accept Dcore="ARMV8MML" Dfpu="DP_FPU" Dendian="Little-endian"/>
985 <require Tcompiler="GCC"/>
986 </condition>
987
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]988 <!-- IAR compiler -->
989 <condition id="CM0_LE_IAR">
990 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
991 <accept Dcore="Cortex-M0"/>
992 <accept Dcore="Cortex-M0+"/>
993 <accept Dcore="SC000"/>
994 <require Dendian="Little-endian"/>
995 <require Tcompiler="IAR"/>
996 </condition>
997
998 <condition id="CM0_BE_IAR">
999 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1000 <accept Dcore="Cortex-M0"/>
1001 <accept Dcore="Cortex-M0+"/>
1002 <accept Dcore="SC000"/>
1003 <require Dendian="Big-endian"/>
1004 <require Tcompiler="IAR"/>
1005 </condition>
1006
1007 <condition id="CM3_LE_IAR">
1008 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1009 <accept Dcore="Cortex-M3"/>
1010 <accept Dcore="SC300"/>
1011 <require Dendian="Little-endian"/>
1012 <require Tcompiler="IAR"/>
1013 </condition>
1014
1015 <condition id="CM3_BE_IAR">
1016 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1017 <accept Dcore="Cortex-M3"/>
1018 <accept Dcore="SC300"/>
1019 <require Dendian="Big-endian"/>
1020 <require Tcompiler="IAR"/>
1021 </condition>
1022
1023 <condition id="CM4_LE_IAR">
1024 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1025 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1026 <require Tcompiler="IAR"/>
1027 </condition>
1028
1029 <condition id="CM4_BE_IAR">
1030 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1031 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
1032 <require Tcompiler="IAR"/>
1033 </condition>
1034
1035 <condition id="CM4F_LE_IAR">
1036 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1037 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1038 <require Tcompiler="IAR"/>
1039 </condition>
1040
1041 <condition id="CM4F_BE_IAR">
1042 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1043 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
1044 <require Tcompiler="IAR"/>
1045 </condition>
1046
1047 <condition id="CM7_LE_IAR">
1048 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1049 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1050 <require Tcompiler="IAR"/>
1051 </condition>
1052
1053 <condition id="CM7_BE_IAR">
1054 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1055 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1056 <require Tcompiler="IAR"/>
1057 </condition>
1058
1059 <condition id="CM7F_LE_IAR">
1060 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1061 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1062 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1063 <require Tcompiler="IAR"/>
1064 </condition>
1065
1066 <condition id="CM7F_BE_IAR">
1067 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1068 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1069 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1070 <require Tcompiler="IAR"/>
1071 </condition>
1072
1073 <condition id="CM7FSP_LE_IAR">
1074 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1075 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1076 <require Tcompiler="IAR"/>
1077 </condition>
1078
1079 <condition id="CM7FSP_BE_IAR">
1080 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1081 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1082 <require Tcompiler="IAR"/>
1083 </condition>
1084
1085 <condition id="CM7FDP_LE_IAR">
1086 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1087 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1088 <require Tcompiler="IAR"/>
1089 </condition>
1090
1091 <condition id="CM7FDP_BE_IAR">
1092 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1093 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1094 <require Tcompiler="IAR"/>
1095 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1096
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1097 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1098 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1099 <require condition="Cortex-M Device"/>
1100 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1101 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1102 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1103 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1104 <description>Components required for RTOS RTX5</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1105 <require condition="Cortex-M Device"/>
1106 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1107 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1108 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1109 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1110 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1111 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1112 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1113 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1114 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1115 <condition id="RTOS2 RTX5 ARMv8M">
1116 <description>Components required for RTOS2 RTX5 on ARMv8M</description>
1117 <accept Dcore="ARMV8MBL"/>
1118 <accept Dcore="ARMV8MML"/>
1119 <require Cclass="CMSIS" Cgroup="CORE"/>
1120 <require Cclass="Device" Cgroup="Startup"/>
1121 </condition>
1122
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1123 </conditions>
1124
1125 <components>
1126 <!-- CMSIS-Core component -->
1127 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1128 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1129 <files>
1130 <!-- CPU independent -->
1131 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1132 <file category="include" name="CMSIS/Include/"/>
1133 </files>
1134 </component>
1135
1136 <!-- CMSIS-Startup components -->
1137 <!-- Cortex-M0 -->
1138 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1139 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1140 <files>
1141 <!-- include folder / device header file -->
1142 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1143 <!-- startup / system file -->
1144 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1145 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1146 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1147 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1148 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1149 </files>
1150 </component>
1151 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1152 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1153 <files>
1154 <!-- include folder / device header file -->
1155 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1156 <!-- startup / system file -->
1157 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1158 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1159 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1160 </files>
1161 </component>
1162
1163 <!-- Cortex-M0+ -->
1164 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1165 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1166 <files>
1167 <!-- include folder / device header file -->
1168 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1169 <!-- startup / system file -->
1170 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1171 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1172 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1173 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1174 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1175 </files>
1176 </component>
1177 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1178 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1179 <files>
1180 <!-- include folder / device header file -->
1181 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1182 <!-- startup / system file -->
1183 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1184 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1185 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1186 </files>
1187 </component>
1188
1189 <!-- Cortex-M3 -->
1190 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1191 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1192 <files>
1193 <!-- include folder / device header file -->
1194 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1195 <!-- startup / system file -->
1196 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1197 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1198 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1199 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1200 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1201 </files>
1202 </component>
1203 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1204 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1205 <files>
1206 <!-- include folder / device header file -->
1207 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1208 <!-- startup / system file -->
1209 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1210 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1211 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1212 </files>
1213 </component>
1214
1215 <!-- Cortex-M4 -->
1216 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1217 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1218 <files>
1219 <!-- include folder / device header file -->
1220 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1221 <!-- startup / system file -->
1222 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1223 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1224 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1225 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1226 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1227 </files>
1228 </component>
1229 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1230 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1231 <files>
1232 <!-- include folder / device header file -->
1233 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1234 <!-- startup / system file -->
1235 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1236 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1237 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1238 </files>
1239 </component>
1240
1241 <!-- Cortex-M7 -->
1242 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1243 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1244 <files>
1245 <!-- include folder / device header file -->
1246 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1247 <!-- startup / system file -->
1248 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1249 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1250 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1251 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1252 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1253 </files>
1254 </component>
1255 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1256 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1257 <files>
1258 <!-- include folder / device header file -->
1259 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1260 <!-- startup / system file -->
1261 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1262 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1263 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1264 </files>
1265 </component>
1266
1267 <!-- Cortex-SC000 -->
1268 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1269 <description>System and Startup for Generic ARM SC000 device</description>
1270 <files>
1271 <!-- include folder / device header file -->
1272 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1273 <!-- startup / system file -->
1274 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1275 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1276 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1277 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1278 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1279 </files>
1280 </component>
1281 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1282 <description>System and Startup for Generic ARM SC000 device</description>
1283 <files>
1284 <!-- include folder / device header file -->
1285 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1286 <!-- startup / system file -->
1287 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1288 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1289 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1290 </files>
1291 </component>
1292
1293 <!-- Cortex-SC300 -->
1294 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1295 <description>System and Startup for Generic ARM SC300 device</description>
1296 <files>
1297 <!-- include folder / device header file -->
1298 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1299 <!-- startup / system file -->
1300 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1301 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1302 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1303 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1304 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1305 </files>
1306 </component>
1307 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1308 <description>System and Startup for Generic ARM SC300 device</description>
1309 <files>
1310 <!-- include folder / device header file -->
1311 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1312 <!-- startup / system file -->
1313 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1314 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1315 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1316 </files>
1317 </component>
1318
1319 <!-- ARMv8MBL -->
1320 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1321 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1322 <files>
1323 <!-- include folder / device header file -->
1324 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1325 <!-- startup / system file -->
1326 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1327 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1328 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1329 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1330 <!-- SAU configuration -->
1331 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1332 </files>
1333 </component>
1334 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1335 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1336 <files>
1337 <!-- include folder / device header file -->
1338 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1339 <!-- startup / system file -->
1340 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1341 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1342 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1343 </files>
1344 </component>
1345
1346 <!-- ARMv8MML -->
1347 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1348 <description>System and Startup for Generic ARM ARMv8MML device</description>
1349 <files>
1350 <!-- include folder / device header file -->
1351 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1352 <!-- startup / system file -->
1353 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1354 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1355 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1356 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1357 <!-- SAU configuration -->
1358 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1359 </files>
1360 </component>
1361 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1362 <description>System and Startup for Generic ARM ARMv8MML device</description>
1363 <files>
1364 <!-- include folder / device header file -->
1365 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1366 <!-- startup / system file -->
1367 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1368 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1369 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1370 </files>
1371 </component>
1372
1373
1374 <!-- CMSIS-DSP component -->
1375 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1376 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1377 <files>
1378 <!-- CPU independent -->
1379 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1380 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1381 <file category="header" name="CMSIS/Include/arm_math.h"/>
1382 <!-- CPU and Compiler dependent -->
1383 <!-- ARMCC -->
1384 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1385 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1386 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1387 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1388 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1389 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1390 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1391 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1392 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1393 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1394 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1395 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1396 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1397 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1398 <!-- GCC -->
1399 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1400 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1401 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1402 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1403 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1404 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1405 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1406 </files>
1407 </component>
1408
1409 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1410 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1411 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1412 <RTE_Components_h>
1413 <!-- the following content goes into file 'RTE_Components.h' -->
1414 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1415 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1416 </RTE_Components_h>
1417 <files>
1418 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1419 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1420 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1421 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1422
1423 <!-- RTX templates -->
1424 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1425 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1426 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1427 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1428 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1429 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1430 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1431 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1432 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1433 <!-- tool-chain specific template file -->
1434 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1435 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1436 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1437
1438 <!-- CPU and Compiler dependent -->
1439 <!-- ARMCC -->
1440 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1441 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1442 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1443 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1444 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1445 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1446 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1447 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1448 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1449 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1450 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1451 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1452 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1453 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1454 <!-- GCC -->
1455 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1456 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1457 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1458 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1459 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1460 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1461 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1462 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1463 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1464 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1465 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1466 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1467 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1468 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1469 <!-- IAR -->
1470 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1471 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1472 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1473 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1474 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1475 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1476 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1477 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1478 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1479 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1480 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1481 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1482 </files>
1483 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1484
1485 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1486 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1487 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1488 <RTE_Components_h>
1489 <!-- the following content goes into file 'RTE_Components.h' -->
1490 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1491 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1492 </RTE_Components_h>
1493 <files>
1494 <!-- RTX header file -->
1495 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1496 <!-- RTX compatibility module for API V1 -->
1497 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1498 </files>
1499 </component>
1500
1501 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1502 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1503 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1504 <RTE_Components_h>
1505 <!-- the following content goes into file 'RTE_Components.h' -->
1506 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1507 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1508 </RTE_Components_h>
1509 <files>
1510 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1511 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1512
1513 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1514 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1515 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1516
1517 <!-- RTX configuration -->
1518 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1519
1520 <!-- RTX templates -->
1521 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1522 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1523 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1524
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1525 <!-- RTX libraries (CPU and Compiler dependent) -->
1526 <!-- ARMCC -->
1527 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1528 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1529 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1530 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1531 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1532 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1533 <!-- GCC -->
1534 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1535 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1536 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1537 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1538 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1539 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1540 </files>
1541 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1542 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
1543 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M</description>
1544 <RTE_Components_h>
1545 <!-- the following content goes into file 'RTE_Components.h' -->
1546 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1547 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1548 </RTE_Components_h>
1549 <files>
1550 <!-- RTX documentation -->
1551 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1552
1553 <!-- RTX header files -->
1554 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1555 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1556
1557 <!-- RTX configuration -->
1558 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1559
1560 <!-- RTX templates -->
1561 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1562 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1563 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1564
1565 <!-- RTX libraries (CPU and Compiler dependent) -->
1566 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame^]1567 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1568 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1569 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1570 <!-- GCC -->
1571 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1572 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1573 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1574 </files>
1575 </component>
1576 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 ARMv8M">
Robert Rostoharb240dc82016-09-23 16:46:39 +0200[diff] [blame]1577 <description>CMSIS-RTOS2 RTX5 implementation for ARMv8-M Non-Secure Domain</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1578 <RTE_Components_h>
1579 <!-- the following content goes into file 'RTE_Components.h' -->
1580 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1581 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1582 </RTE_Components_h>
1583 <files>
1584 <!-- RTX documentation -->
1585 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1586
1587 <!-- RTX header files -->
1588 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1589 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1590
1591 <!-- RTX configuration -->
1592 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1593
1594 <!-- RTX templates -->
1595 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1596 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1597 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1598
1599 <!-- RTX libraries (CPU and Compiler dependent) -->
1600 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame^]1601 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1602 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1603 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1604 <!-- GCC -->
1605 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1606 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1607 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1608 </files>
1609 </component>
1610
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1611 </components>
1612
1613 <boards>
1614 <board name="uVision Simulator" vendor="Keil">
1615 <description>uVision Simulator</description>
1616 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1617 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1618 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1619 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1620 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1621 </board>
1622 </boards>
1623
1624 <examples>
1625 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1626 <description>DSP_Lib Class Marks example</description>
1627 <board name="uVision Simulator" vendor="Keil"/>
1628 <project>
1629 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1630 </project>
1631 <attributes>
1632 <component Cclass="CMSIS" Cgroup="CORE"/>
1633 <component Cclass="CMSIS" Cgroup="DSP"/>
1634 <component Cclass="Device" Cgroup="Startup"/>
1635 <category>Getting Started</category>
1636 </attributes>
1637 </example>
1638
1639 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1640 <description>DSP_Lib Convolution example</description>
1641 <board name="uVision Simulator" vendor="Keil"/>
1642 <project>
1643 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1644 </project>
1645 <attributes>
1646 <component Cclass="CMSIS" Cgroup="CORE"/>
1647 <component Cclass="CMSIS" Cgroup="DSP"/>
1648 <component Cclass="Device" Cgroup="Startup"/>
1649 <category>Getting Started</category>
1650 </attributes>
1651 </example>
1652
1653 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1654 <description>DSP_Lib Dotproduct example</description>
1655 <board name="uVision Simulator" vendor="Keil"/>
1656 <project>
1657 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1658 </project>
1659 <attributes>
1660 <component Cclass="CMSIS" Cgroup="CORE"/>
1661 <component Cclass="CMSIS" Cgroup="DSP"/>
1662 <component Cclass="Device" Cgroup="Startup"/>
1663 <category>Getting Started</category>
1664 </attributes>
1665 </example>
1666
1667 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1668 <description>DSP_Lib FFT Bin example</description>
1669 <board name="uVision Simulator" vendor="Keil"/>
1670 <project>
1671 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1672 </project>
1673 <attributes>
1674 <component Cclass="CMSIS" Cgroup="CORE"/>
1675 <component Cclass="CMSIS" Cgroup="DSP"/>
1676 <component Cclass="Device" Cgroup="Startup"/>
1677 <category>Getting Started</category>
1678 </attributes>
1679 </example>
1680
1681 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1682 <description>DSP_Lib FIR example</description>
1683 <board name="uVision Simulator" vendor="Keil"/>
1684 <project>
1685 <environment name="uv" load="arm_fir_example.uvprojx"/>
1686 </project>
1687 <attributes>
1688 <component Cclass="CMSIS" Cgroup="CORE"/>
1689 <component Cclass="CMSIS" Cgroup="DSP"/>
1690 <component Cclass="Device" Cgroup="Startup"/>
1691 <category>Getting Started</category>
1692 </attributes>
1693 </example>
1694
1695 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1696 <description>DSP_Lib Graphic Equalizer example</description>
1697 <board name="uVision Simulator" vendor="Keil"/>
1698 <project>
1699 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1700 </project>
1701 <attributes>
1702 <component Cclass="CMSIS" Cgroup="CORE"/>
1703 <component Cclass="CMSIS" Cgroup="DSP"/>
1704 <component Cclass="Device" Cgroup="Startup"/>
1705 <category>Getting Started</category>
1706 </attributes>
1707 </example>
1708
1709 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1710 <description>DSP_Lib Linear Interpolation example</description>
1711 <board name="uVision Simulator" vendor="Keil"/>
1712 <project>
1713 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1714 </project>
1715 <attributes>
1716 <component Cclass="CMSIS" Cgroup="CORE"/>
1717 <component Cclass="CMSIS" Cgroup="DSP"/>
1718 <component Cclass="Device" Cgroup="Startup"/>
1719 <category>Getting Started</category>
1720 </attributes>
1721 </example>
1722
1723 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1724 <description>DSP_Lib Matrix example</description>
1725 <board name="uVision Simulator" vendor="Keil"/>
1726 <project>
1727 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1728 </project>
1729 <attributes>
1730 <component Cclass="CMSIS" Cgroup="CORE"/>
1731 <component Cclass="CMSIS" Cgroup="DSP"/>
1732 <component Cclass="Device" Cgroup="Startup"/>
1733 <category>Getting Started</category>
1734 </attributes>
1735 </example>
1736
1737 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1738 <description>DSP_Lib Signal Convergence example</description>
1739 <board name="uVision Simulator" vendor="Keil"/>
1740 <project>
1741 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1742 </project>
1743 <attributes>
1744 <component Cclass="CMSIS" Cgroup="CORE"/>
1745 <component Cclass="CMSIS" Cgroup="DSP"/>
1746 <component Cclass="Device" Cgroup="Startup"/>
1747 <category>Getting Started</category>
1748 </attributes>
1749 </example>
1750
1751 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1752 <description>DSP_Lib Sinus/Cosinus example</description>
1753 <board name="uVision Simulator" vendor="Keil"/>
1754 <project>
1755 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1756 </project>
1757 <attributes>
1758 <component Cclass="CMSIS" Cgroup="CORE"/>
1759 <component Cclass="CMSIS" Cgroup="DSP"/>
1760 <component Cclass="Device" Cgroup="Startup"/>
1761 <category>Getting Started</category>
1762 </attributes>
1763 </example>
1764
1765 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1766 <description>DSP_Lib Variance example</description>
1767 <board name="uVision Simulator" vendor="Keil"/>
1768 <project>
1769 <environment name="uv" load="arm_variance_example.uvprojx"/>
1770 </project>
1771 <attributes>
1772 <component Cclass="CMSIS" Cgroup="CORE"/>
1773 <component Cclass="CMSIS" Cgroup="DSP"/>
1774 <component Cclass="Device" Cgroup="Startup"/>
1775 <category>Getting Started</category>
1776 </attributes>
1777 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1778
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1779 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1780 <description>CMSIS-RTOS2 Blinky example</description>
1781 <board name="uVision Simulator" vendor="Keil"/>
1782 <project>
1783 <environment name="uv" load="Blinky.uvprojx"/>
1784 </project>
1785 <attributes>
1786 <component Cclass="CMSIS" Cgroup="CORE"/>
1787 <component Cclass="CMSIS" Cgroup="RTOS2"/>
1788 <component Cclass="Device" Cgroup="Startup"/>
1789 <category>Getting Started</category>
1790 </attributes>
1791 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1792
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1793 </examples>
1794
1795</package>