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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 4ed87816bf4aa0b08d9682922d6b46341d9a96d6 / . / ARM.CMSIS.pdsc
blob: d5f61f6e3be8c8321b4185f30137f4b7bf17c9b3 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]11 <release version="5.0.0-Beta15">
12 Reworked conditions.
13 </release>
Robert Rostoharc9453672016-10-24 11:06:40 +0200[diff] [blame]14 <release version="5.0.0-Beta14">
15 CMSIS-RTOS RTX 4.82 (see revision history for details)
16 </release>
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]17 <release version="5.0.0-Beta13" date="2016-10-21">
18 Interim Beta Release:
19 CMSIS-RTOS2 and RTX implementation:
20 - reworked API based on customer feedback
21 CMSIS-SVD:
22 - reworked SVD format documentation
23 </release>
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]24 <release version="5.0.0-Beta12" date="2016-09-29">
25 Interim Beta Release:
26 CMSIS-RTOS2 and RTX implementation:
27 - added context management API for ARMv8-M TrustZone
28 - added ARMv8-M support (ARMClang, GCC)
29 CMSIS-Core:
30 - Updated documentation
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]31 - Added new file cmsis_compiler.h.
32 - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]33 - Reworked compiler specific include files.
34 - Reworked core dependent include files.
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]35 - Added __PACKED macro.
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]36 CMSIS-DSP:
37 - updated library projects
38 CMSIS-SVD:
39 - removed SVD file database documentation as SVD files are distributed in packs
40 - updated SVDConv for Win32 and Linux
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]41 </release>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]42 <release version="5.0.0-Beta11">
43 CMSIS_Core:
44 - Added CMSE support to cmsis_gcc.h.
45 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]46 <release version="5.0.0-Beta10">
47 CMSIS-RTOS2:
48 - Added RTX5 component.
49 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]50 <release version="5.0.0-Beta9">
51 CMSIS_Core:
52 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
53 - Reworked SAU register and functions.
54 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]55 <release version="5.0.0-Beta8">
56 CMSIS-RTOS:
57 - API 2.0
58 - RTX 5.0.0-Alpha
59 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]60 <release version="5.0.0-Beta7">
61 CMSIS_Core:
62 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]63 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]64 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]65 <release version="5.0.0-Beta6">
66 CMSIS_Core:
67 - Added SCB_CFSR register bit definitions in core_*.h.
68 - Added NVIC_GetEnableIRQ function in core_*.h.
69 - Updated core instruction macros in cmsis_gcc.h.
70 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]71 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]72 CMSIS_DSP:
73 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
74 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]75 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]76 <release version="5.0.0-Beta4">
77 Updated ARMv8MML device files.
78 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
79 Updated CMSIS core files.
80 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
81 </release>
82 <release version="5.0.0-Beta3">
83 Updated CMSIS ARMv8M core / device files
84 - increased SAU regions to 8.
85 - moved TZ_SAU_Setup() to partition_#device#.h.
86 </release>
87 <release version="5.0.0-Beta2">
88 - renamed core_*.h to lower case.
89 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
90 - updated ARMv8M?L.svd.
91 </release>
92 <release version="5.0.0-Beta1">
93 - added function SCB_GetFPUType() to all CMSIS cores.
94 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
95 - updated CMSIS core files to V5.0
96 - updated CMSIS Core change log.
97 - updated CMSIS DSP_Lib change log.
98 - updated CMSIS DSP_Lib libraries.
99 </release>
100 <release version="5.0.0-Beta" date="2015-12-15">
101 Added ARMv8M support to CMSIS-Core.
102 - CMSIS-Core 5.0.0 Beta (see revision history for details)
103 - CMSIS-RTOS
104 -- API 1.02 (unchanged)
105 -- RTX 4.81.0 (see revision history for details)
106 - CMSIS-SVD 1.3.2 (see revision history for details)
107 </release>
108 <release version="4.5.0" date="2015-10-28">
109 - CMSIS-Core 4.30.0 (see revision history for details)
110 - CMSIS-DAP 1.1.0 (unchanged)
111 - CMSIS-Driver 2.04.0 (see revision history for details)
112 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
113 - CMSIS-PACK 1.4.1 (see revision history for details)
114 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
115 - CMSIS-SVD 1.3.1 (see revision history for details)
116 </release>
117 <release version="4.4.0" date="2015-09-11">
118 - CMSIS-Core 4.20 (see revision history for details)
119 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
120 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
121 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
122 - CMSIS-RTOS
123 -- API 1.02 (unchanged)
124 -- RTX 4.79 (see revision history for details)
125 - CMSIS-SVD 1.3.0 (see revision history for details)
126 - CMSIS-DAP 1.1.0 (extended with SWO support)
127 </release>
128 <release version="4.3.0" date="2015-03-20">
129 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
130 - CMSIS-DSP 1.4.5 (see revision history for details)
131 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
132 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
133 - CMSIS-RTOS
134 -- API 1.02 (unchanged)
135 -- RTX 4.78 (see revision history for details)
136 - CMSIS-SVD 1.2 (unchanged)
137 </release>
138 <release version="4.2.0" date="2014-09-24">
139 Adding Cortex-M7 support
140 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
141 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
142 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
143 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
144 - CMSIS-RTOS RTX 4.75 (see revision history for details)
145 </release>
146 <release version="4.1.1" date="2014-06-30">
147 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
148 </release>
149 <release version="4.1.0" date="2014-06-12">
150 - CMSIS-Driver 2.02 (incompatible update)
151 - CMSIS-Pack 1.3 (see revision history for details)
152 - CMSIS-DSP 1.4.2 (unchanged)
153 - CMSIS-Core 3.30 (unchanged)
154 - CMSIS-RTOS RTX 4.74 (unchanged)
155 - CMSIS-RTOS API 1.02 (unchanged)
156 - CMSIS-SVD 1.10 (unchanged)
157 PACK:
158 - removed G++ specific files from PACK
159 - added Component Startup variant "C Startup"
160 - added Pack Checking Utility
161 - updated conditions to reflect tool-chain dependency
162 - added Taxonomy for Graphics
163 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
164 </release>
165 <release version="4.0.0">
166 - CMSIS-Driver 2.00 Preliminary (incompatible update)
167 - CMSIS-Pack 1.1 Preliminary
168 - CMSIS-DSP 1.4.2 (see revision history for details)
169 - CMSIS-Core 3.30 (see revision history for details)
170 - CMSIS-RTOS RTX 4.74 (see revision history for details)
171 - CMSIS-RTOS API 1.02 (unchanged)
172 - CMSIS-SVD 1.10 (unchanged)
173 </release>
174 <release version="3.20.4">
175 - CMSIS-RTOS 4.74 (see revision history for details)
176 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
177 </release>
178 <release version="3.20.3">
179 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
180 - CMSIS-RTOS 4.73 (see revision history for details)
181 </release>
182 <release version="3.20.2">
183 - CMSIS-Pack documentation has been added
184 - CMSIS-Drivers header and documentation have been added to PACK
185 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
186 </release>
187 <release version="3.20.1">
188 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
189 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
190 </release>
191 <release version="3.20.0">
192 The software portions that are deployed in the application program are now under a BSD license which allows usage
193 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
194 The individual components have been update as listed below:
195 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
196 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
197 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
198 - CMSIS-SVD is unchanged.
199 </release>
200 </releases>
201
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]202 <taxonomy>
203 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
204 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
205 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
206 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
207 <description Cclass="File System">File Drive Support and File System</description>
208 <description Cclass="Graphics">Graphical User Interface</description>
209 <description Cclass="Network">Network Stack using Internet Protocols</description>
210 <description Cclass="USB">Universal Serial Bus Stack</description>
211 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
212 </taxonomy>
213
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]214 <devices>
215 <!-- ****************************** Cortex-M0 ****************************** -->
216 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]217 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]218 <description>
219The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
220- simple, easy-to-use programmers model
221- highly efficient ultra-low power operation
222- excellent code density
223- deterministic, high-performance interrupt handling
224- upward compatibility with the rest of the Cortex-M processor family.
225 </description>
226 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
227 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
228 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
229 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
230
231 <device Dname="ARMCM0">
232 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
233 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
234 </device>
235 </family>
236
237 <!-- ****************************** Cortex-M0P ****************************** -->
238 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]239 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]240 <description>
241The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
242- simple, easy-to-use programmers model
243- highly efficient ultra-low power operation
244- excellent code density
245- deterministic, high-performance interrupt handling
246- upward compatibility with the rest of the Cortex-M processor family.
247 </description>
248 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
249 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
250 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
251 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
252
253 <device Dname="ARMCM0P">
254 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
255 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
256 </device>
257 </family>
258
259 <!-- ****************************** Cortex-M3 ****************************** -->
260 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]261 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]262 <description>
263The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
264- simple, easy-to-use programmers model
265- highly efficient ultra-low power operation
266- excellent code density
267- deterministic, high-performance interrupt handling
268- upward compatibility with the rest of the Cortex-M processor family.
269 </description>
270 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
271 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
272 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
273 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
274
275 <device Dname="ARMCM3">
276 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
277 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
278 </device>
279 </family>
280
281 <!-- ****************************** Cortex-M4 ****************************** -->
282 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]283 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]284 <description>
285The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
286- simple, easy-to-use programmers model
287- highly efficient ultra-low power operation
288- excellent code density
289- deterministic, high-performance interrupt handling
290- upward compatibility with the rest of the Cortex-M processor family.
291 </description>
292 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
293 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
294 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
295 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
296
297 <device Dname="ARMCM4">
298 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
299 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
300 </device>
301
302 <device Dname="ARMCM4_FP">
303 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
304 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
305 </device>
306 </family>
307
308 <!-- ****************************** Cortex-M7 ****************************** -->
309 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]310 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]311 <description>
312The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
313- simple, easy-to-use programmers model
314- highly efficient ultra-low power operation
315- excellent code density
316- deterministic, high-performance interrupt handling
317- upward compatibility with the rest of the Cortex-M processor family.
318 </description>
319 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
320 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
321 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
322 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
323
324 <device Dname="ARMCM7">
325 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
326 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
327 </device>
328
329 <device Dname="ARMCM7_SP">
330 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
332 </device>
333
334 <device Dname="ARMCM7_DP">
335 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
336 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
337 </device>
338 </family>
339
340 <!-- ****************************** ARMSC000 ****************************** -->
341 <family Dfamily="ARM SC000" Dvendor="ARM:82">
342 <description>
343The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
344- simple, easy-to-use programmers model
345- highly efficient ultra-low power operation
346- excellent code density
347- deterministic, high-performance interrupt handling
348 </description>
349 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
350 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
351 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
352 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
353
354 <device Dname="ARMSC000">
355 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
356 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
357 </device>
358 </family>
359
360 <!-- ****************************** ARMSC300 ****************************** -->
361 <family Dfamily="ARM SC300" Dvendor="ARM:82">
362 <description>
363The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
364- simple, easy-to-use programmers model
365- highly efficient ultra-low power operation
366- excellent code density
367- deterministic, high-performance interrupt handling
368 </description>
369 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
370 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
371 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
372 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
373
374 <device Dname="ARMSC300">
375 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
376 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
377 </device>
378 </family>
379
380 <!-- ****************************** ARMv8-M Baseline ********************** -->
381 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
382 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
383 <description>
384The ARMv8MBL processor is brand new.
385 </description>
386 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
387 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
388 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
389 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
390
391 <device Dname="ARMv8MBL">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]392 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dtz="1" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]393 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
394 </device>
395 </family>
396
397 <!-- ****************************** ARMv8-M Mainline ****************************** -->
398 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
399 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
400 <description>
401The ARMv8MML processor is brand new.
402 </description>
403 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
404 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
405 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
406 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
407
408 <device Dname="ARMv8MML">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]409 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dtz="1" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]410 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
411 </device>
412
413 <device Dname="ARMv8MML_SP">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]414 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dtz="1" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]415 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
416 </device>
417
418 <device Dname="ARMv8MML_DP">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]419 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dtz="1" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]420 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
421 </device>
422 </family>
423
424 </devices>
425
426
427 <apis>
428 <!-- CMSIS-RTOS API -->
429 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
430 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
431 <files>
432 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
433 </files>
434 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]435 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]436 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
437 <files>
438 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
439 </files>
440 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]441 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
442 <description>USART Driver API for Cortex-M</description>
443 <files>
444 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
445 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
446 </files>
447 </api>
448 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
449 <description>SPI Driver API for Cortex-M</description>
450 <files>
451 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
452 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
453 </files>
454 </api>
455 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
456 <description>SAI Driver API for Cortex-M</description>
457 <files>
458 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
459 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
460 </files>
461 </api>
462 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
463 <description>I2C Driver API for Cortex-M</description>
464 <files>
465 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
466 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
467 </files>
468 </api>
469 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
470 <description>CAN Driver API for Cortex-M</description>
471 <files>
472 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
473 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
474 </files>
475 </api>
476 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
477 <description>Flash Driver API for Cortex-M</description>
478 <files>
479 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
480 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
481 </files>
482 </api>
483 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
484 <description>MCI Driver API for Cortex-M</description>
485 <files>
486 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
487 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
488 </files>
489 </api>
490 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
491 <description>NAND Flash Driver API for Cortex-M</description>
492 <files>
493 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
494 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
495 </files>
496 </api>
497 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
498 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
499 <files>
500 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
501 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
502 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
503 </files>
504 </api>
505 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
506 <description>Ethernet MAC Driver API for Cortex-M</description>
507 <files>
508 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
509 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
510 </files>
511 </api>
512 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
513 <description>Ethernet PHY Driver API for Cortex-M</description>
514 <files>
515 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
516 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
517 </files>
518 </api>
519 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
520 <description>USB Device Driver API for Cortex-M</description>
521 <files>
522 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
523 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
524 </files>
525 </api>
526 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
527 <description>USB Host Driver API for Cortex-M</description>
528 <files>
529 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
530 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
531 </files>
532 </api>
533 </apis>
534
535 <!-- conditions are dependency rules that can apply to a component or an individual file -->
536 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]537 <!-- compiler -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]538 <condition id="ARMCC">
539 <require Tcompiler="ARMCC"/>
540 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]541 <condition id="GCC">
542 <require Tcompiler="GCC"/>
543 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]544 <condition id="IAR">
545 <require Tcompiler="IAR"/>
546 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]547 <condition id="ARMCC GCC">
548 <accept Tcompiler="ARMCC"/>
549 <accept Tcompiler="GCC"/>
550 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]551 <condition id="ARMCC GCC IAR">
552 <accept Tcompiler="ARMCC"/>
553 <accept Tcompiler="GCC"/>
554 <accept Tcompiler="IAR"/>
555 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]556
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]557 <!-- ARM architecture -->
558 <condition id="ARMv6-M Device">
559 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]560 <accept Dcore="Cortex-M0"/>
561 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]562 <accept Dcore="SC000"/>
563 </condition>
564 <condition id="ARMv7-M Device">
565 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]566 <accept Dcore="Cortex-M3"/>
567 <accept Dcore="Cortex-M4"/>
568 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]569 <accept Dcore="SC300"/>
570 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]571 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]572 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]573 <accept Dcore="ARMV8MBL"/>
574 <accept Dcore="ARMV8MML"/>
575 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]576 <condition id="ARMv8-M TZ Device">
577 <description>ARMv8-M architecture based device with TrustZone</description>
578 <require condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]579 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]580 <condition id="ARMv6_7-M Device">
581 <description>ARMv6_7-M architecture based device</description>
582 <accept condition="ARMv6-M Device"/>
583 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]584 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]585 <condition id="ARMv6_7_8-M Device">
586 <description>ARMv6_7_8-M architecture based device</description>
587 <accept condition="ARMv6-M Device"/>
588 <accept condition="ARMv7-M Device"/>
589 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]590 </condition>
591
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]592 <!-- ARM core -->
593 <condition id="CM0">
594 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
595 <accept Dcore="Cortex-M0"/>
596 <accept Dcore="Cortex-M0+"/>
597 <accept Dcore="SC000"/>
598 </condition>
599 <condition id="CM3">
600 <description>Cortex-M3 or SC300 processor based device</description>
601 <accept Dcore="Cortex-M3"/>
602 <accept Dcore="SC300"/>
603 </condition>
604 <condition id="CM4">
605 <description>Cortex-M4 processor based device</description>
606 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
607 </condition>
608 <condition id="CM4_FP">
609 <description>Cortex-M4 processor based device using Floating Point Unit</description>
610 <require Dcore="Cortex-M4" Dfpu="FPU"/>
611 </condition>
612 <condition id="CM7">
613 <description>Cortex-M7 processor based device</description>
614 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
615 </condition>
616 <condition id="CM7_FP">
617 <description>Cortex-M7 processor based device using Floating Point Unit</description>
618 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
619 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
620 </condition>
621 <condition id="CM7_SP">
622 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
623 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
624 </condition>
625 <condition id="CM7_DP">
626 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
627 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
628 </condition>
629 <condition id="ARMv8MBL">
630 <description>ARMv8-M Baseline processor based device</description>
631 <require Dcore="ARMV8MBL"/>
632 </condition>
633 <condition id="ARMv8MML">
634 <description>ARMv8-M Mainline processor based device</description>
635 <require Dcore="ARMV8MML" Dfpu="0"/>
636 </condition>
637 <condition id="ARMv8MML_FP">
638 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
639 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
640 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]641 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]642 <condition id="ARMv8MML_SP">
643 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
644 <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
645 </condition>
646 <condition id="ARMv8MML_DP">
647 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
648 <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
649 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]650
651 <!-- ARMCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]652 <condition id="CM0_ARMCC">
653 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
654 <require condition="CM0"/>
655 <require Tcompiler="ARMCC"/>
656 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]657 <condition id="CM0_LE_ARMCC">
658 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]659 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]660 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]661 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]662 <condition id="CM0_BE_ARMCC">
663 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]664 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]665 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]666 </condition>
667
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]668 <condition id="CM3_ARMCC">
669 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
670 <require condition="CM3"/>
671 <require Tcompiler="ARMCC"/>
672 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]673 <condition id="CM3_LE_ARMCC">
674 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]675 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]676 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]677 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]678 <condition id="CM3_BE_ARMCC">
679 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]680 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]681 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]682 </condition>
683
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]684 <condition id="CM4_ARMCC">
685 <description>Cortex-M4 processor based device for the ARM Compiler</description>
686 <require condition="CM4"/>
687 <require Tcompiler="ARMCC"/>
688 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]689 <condition id="CM4_LE_ARMCC">
690 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]691 <require condition="CM4_ARMCC"/>
692 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]693 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]694 <condition id="CM4_BE_ARMCC">
695 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]696 <require condition="CM4_ARMCC"/>
697 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]698 </condition>
699
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]700 <condition id="CM4_FP_ARMCC">
701 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
702 <require condition="CM4_FP"/>
703 <require Tcompiler="ARMCC"/>
704 </condition>
705 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]706 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]707 <require condition="CM4_FP_ARMCC"/>
708 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]709 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]710 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]711 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]712 <require condition="CM4_FP_ARMCC"/>
713 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]714 </condition>
715
716 <!-- XMC 4000 Series devices from Infineon require a special library -->
717 <condition id="CM4_LE_ARMCC_STD">
718 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
719 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
720 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
721 <require Tcompiler="ARMCC"/>
722 </condition>
723 <condition id="CM4_LE_ARMCC_IFX">
724 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
725 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]728 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]729 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
730 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
731 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]734 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]735 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
736 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
737 <require Tcompiler="ARMCC"/>
738 </condition>
739
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]740 <condition id="CM7_ARMCC">
741 <description>Cortex-M7 processor based device for the ARM Compiler</description>
742 <require condition="CM7"/>
743 <require Tcompiler="ARMCC"/>
744 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]745 <condition id="CM7_LE_ARMCC">
746 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]747 <require condition="CM7_ARMCC"/>
748 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]749 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]750 <condition id="CM7_BE_ARMCC">
751 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]752 <require condition="CM7_ARMCC"/>
753 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]754 </condition>
755
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]756 <condition id="CM7_FP_ARMCC">
757 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
758 <require condition="CM7_FP"/>
759 <require Tcompiler="ARMCC"/>
760 </condition>
761 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]762 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]763 <require condition="CM7_FP_ARMCC"/>
764 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]765 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]766 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]767 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]768 <require condition="CM7_FP_ARMCC"/>
769 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]770 </condition>
771
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]772 <condition id="CM7_SP_ARMCC">
773 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
774 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]775 <require Tcompiler="ARMCC"/>
776 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]777 <condition id="CM7_SP_LE_ARMCC">
778 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
779 <require condition="CM7_SP_ARMCC"/>
780 <require Dendian="Little-endian"/>
781 </condition>
782 <condition id="CM7_SP_BE_ARMCC">
783 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
784 <require condition="CM7_SP_ARMCC"/>
785 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]786 </condition>
787
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]788 <condition id="CM7_DP_ARMCC">
789 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
790 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]791 <require Tcompiler="ARMCC"/>
792 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]793 <condition id="CM7_DP_LE_ARMCC">
794 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
795 <require condition="CM7_DP_ARMCC"/>
796 <require Dendian="Little-endian"/>
797 </condition>
798 <condition id="CM7_DP_BE_ARMCC">
799 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
800 <require condition="CM7_DP_ARMCC"/>
801 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]802 </condition>
803
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]804 <condition id="ARMv8MBL_ARMCC">
805 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
806 <require condition="ARMv8MBL"/>
807 <require Tcompiler="ARMCC"/>
808 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]809 <condition id="ARMv8MBL_LE_ARMCC">
810 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]811 <require condition="ARMv8MBL_ARMCC"/>
812 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]813 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]814 <condition id="ARMv8MBL_BE_ARMCC">
815 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
816 <require condition="ARMv8MBL_ARMCC"/>
817 <require Dendian="Big-endian"/>
818 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]819
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]820 <condition id="ARMv8MML_ARMCC">
821 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
822 <require condition="ARMv8MML"/>
823 <require Tcompiler="ARMCC"/>
824 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]825 <condition id="ARMv8MML_LE_ARMCC">
826 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]827 <require condition="ARMv8MML_ARMCC"/>
828 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]829 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]830 <condition id="ARMv8MML_BE_ARMCC">
831 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
832 <require condition="ARMv8MML_ARMCC"/>
833 <require Dendian="Big-endian"/>
834 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]835
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]836 <condition id="ARMv8MML_FP_ARMCC">
837 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
838 <require condition="ARMv8MML_FP"/>
839 <require Tcompiler="ARMCC"/>
840 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]841 <condition id="ARMv8MML_FP_LE_ARMCC">
842 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]843 <require condition="ARMv8MML_FP_ARMCC"/>
844 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]845 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]846 <condition id="ARMv8MML_FP_BE_ARMCC">
847 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
848 <require condition="ARMv8MML_FP_ARMCC"/>
849 <require Dendian="Big-endian"/>
850 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]851
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]852 <!-- GCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]853 <condition id="CM0_GCC">
854 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
855 <require condition="CM0"/>
856 <require Tcompiler="GCC"/>
857 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]858 <condition id="CM0_LE_GCC">
859 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]860 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]861 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]862 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]863 <condition id="CM0_BE_GCC">
864 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]865 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]866 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]867 </condition>
868
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]869 <condition id="CM3_GCC">
870 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
871 <require condition="CM3"/>
872 <require Tcompiler="GCC"/>
873 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]874 <condition id="CM3_LE_GCC">
875 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]876 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]877 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]878 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]879 <condition id="CM3_BE_GCC">
880 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]881 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]882 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]883 </condition>
884
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]885 <condition id="CM4_GCC">
886 <description>Cortex-M4 processor based device for the GCC Compiler</description>
887 <require condition="CM4"/>
888 <require Tcompiler="GCC"/>
889 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]890 <condition id="CM4_LE_GCC">
891 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]892 <require condition="CM4_GCC"/>
893 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]894 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]895 <condition id="CM4_BE_GCC">
896 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]897 <require condition="CM4_GCC"/>
898 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]899 </condition>
900
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]901 <condition id="CM4_FP_GCC">
902 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
903 <require condition="CM4_FP"/>
904 <require Tcompiler="GCC"/>
905 </condition>
906 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]907 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]908 <require condition="CM4_FP_GCC"/>
909 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]910 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]911 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]912 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]913 <require condition="CM4_FP_GCC"/>
914 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]915 </condition>
916
917 <!-- XMC 4000 Series devices from Infineon require a special library -->
918 <condition id="CM4_LE_GCC_STD">
919 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
920 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
921 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
922 <require Tcompiler="GCC"/>
923 </condition>
924 <condition id="CM4_LE_GCC_IFX">
925 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
926 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
927 <require Tcompiler="GCC"/>
928 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]929 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]930 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
931 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
932 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
933 <require Tcompiler="GCC"/>
934 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]935 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]936 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
937 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
938 <require Tcompiler="GCC"/>
939 </condition>
940
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]941 <condition id="CM7_GCC">
942 <description>Cortex-M7 processor based device for the GCC Compiler</description>
943 <require condition="CM7"/>
944 <require Tcompiler="GCC"/>
945 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]946 <condition id="CM7_LE_GCC">
947 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]948 <require condition="CM7_GCC"/>
949 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]950 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]951 <condition id="CM7_BE_GCC">
952 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]953 <require condition="CM7_GCC"/>
954 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]955 </condition>
956
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]957 <condition id="CM7_FP_GCC">
958 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
959 <require condition="CM7_FP"/>
960 <require Tcompiler="GCC"/>
961 </condition>
962 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]963 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]964 <require condition="CM7_FP_GCC"/>
965 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]966 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]967 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]968 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]969 <require condition="CM7_FP_GCC"/>
970 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]971 </condition>
972
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]973 <condition id="CM7_SP_GCC">
974 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
975 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]976 <require Tcompiler="GCC"/>
977 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]978 <condition id="CM7_SP_LE_GCC">
979 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
980 <require condition="CM7_SP_GCC"/>
981 <require Dendian="Little-endian"/>
982 </condition>
983 <condition id="CM7_SP_BE_GCC">
984 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
985 <require condition="CM7_SP_GCC"/>
986 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]987 </condition>
988
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]989 <condition id="CM7_DP_GCC">
990 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
991 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]992 <require Tcompiler="GCC"/>
993 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]994 <condition id="CM7_DP_LE_GCC">
995 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
996 <require condition="CM7_DP_GCC"/>
997 <require Dendian="Little-endian"/>
998 </condition>
999 <condition id="CM7_DP_BE_GCC">
1000 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1001 <require condition="CM7_DP_GCC"/>
1002 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1003 </condition>
1004
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1005 <condition id="ARMv8MBL_GCC">
1006 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1007 <require condition="ARMv8MBL"/>
1008 <require Tcompiler="GCC"/>
1009 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1010 <condition id="ARMv8MBL_LE_GCC">
1011 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1012 <require condition="ARMv8MBL_GCC"/>
1013 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1014 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1015 <condition id="ARMv8MBL_BE_GCC">
1016 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1017 <require condition="ARMv8MBL_GCC"/>
1018 <require Dendian="Big-endian"/>
1019 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1020
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1021 <condition id="ARMv8MML_GCC">
1022 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1023 <require condition="ARMv8MML"/>
1024 <require Tcompiler="GCC"/>
1025 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1026 <condition id="ARMv8MML_LE_GCC">
1027 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1028 <require condition="ARMv8MML_GCC"/>
1029 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1030 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1031 <condition id="ARMv8MML_BE_GCC">
1032 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1033 <require condition="ARMv8MML_GCC"/>
1034 <require Dendian="Big-endian"/>
1035 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1036
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1037 <condition id="ARMv8MML_FP_GCC">
1038 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1039 <require condition="ARMv8MML_FP"/>
1040 <require Tcompiler="GCC"/>
1041 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1042 <condition id="ARMv8MML_FP_LE_GCC">
1043 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1044 <require condition="ARMv8MML_FP_GCC"/>
1045 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1046 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1047 <condition id="ARMv8MML_FP_BE_GCC">
1048 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1049 <require condition="ARMv8MML_FP_GCC"/>
1050 <require Dendian="Big-endian"/>
1051 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1052
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1053 <!-- IAR compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1054 <condition id="CM0_IAR">
1055 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1056 <require condition="CM0"/>
1057 <require Tcompiler="IAR"/>
1058 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1059 <condition id="CM0_LE_IAR">
1060 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1061 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1062 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1063 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1064 <condition id="CM0_BE_IAR">
1065 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1066 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1067 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1068 </condition>
1069
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1070 <condition id="CM3_IAR">
1071 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1072 <require condition="CM3"/>
1073 <require Tcompiler="IAR"/>
1074 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1075 <condition id="CM3_LE_IAR">
1076 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1077 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1078 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1079 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1080 <condition id="CM3_BE_IAR">
1081 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1082 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1083 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1084 </condition>
1085
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1086 <condition id="CM4_IAR">
1087 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1088 <require condition="CM4"/>
1089 <require Tcompiler="IAR"/>
1090 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1091 <condition id="CM4_LE_IAR">
1092 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1093 <require condition="CM4_IAR"/>
1094 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1095 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1096 <condition id="CM4_BE_IAR">
1097 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1098 <require condition="CM4_IAR"/>
1099 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1100 </condition>
1101
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1102 <condition id="CM4_FP_IAR">
1103 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1104 <require condition="CM4_FP"/>
1105 <require Tcompiler="IAR"/>
1106 </condition>
1107 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1108 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1109 <require condition="CM4_FP_IAR"/>
1110 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1111 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1112 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1113 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1114 <require condition="CM4_FP_IAR"/>
1115 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1116 </condition>
1117
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1118 <condition id="CM7_IAR">
1119 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1120 <require condition="CM7"/>
1121 <require Tcompiler="IAR"/>
1122 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1123 <condition id="CM7_LE_IAR">
1124 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1125 <require condition="CM7_IAR"/>
1126 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1127 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1128 <condition id="CM7_BE_IAR">
1129 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1130 <require condition="CM7_IAR"/>
1131 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1132 </condition>
1133
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1134 <condition id="CM7_FP_IAR">
1135 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1136 <require condition="CM7_FP"/>
1137 <require Tcompiler="IAR"/>
1138 </condition>
1139 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1140 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1141 <require condition="CM7_FP_IAR"/>
1142 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1143 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1144 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1145 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1146 <require condition="CM7_FP_IAR"/>
1147 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1148 </condition>
1149
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1150 <condition id="CM7_SP_IAR">
1151 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1152 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1153 <require Tcompiler="IAR"/>
1154 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1155 <condition id="CM7_SP_LE_IAR">
1156 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1157 <require condition="CM7_SP_IAR"/>
1158 <require Dendian="Little-endian"/>
1159 </condition>
1160 <condition id="CM7_SP_BE_IAR">
1161 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1162 <require condition="CM7_SP_IAR"/>
1163 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1164 </condition>
1165
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1166 <condition id="CM7_DP_IAR">
1167 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1168 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1169 <require Tcompiler="IAR"/>
1170 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1171 <condition id="CM7_DP_LE_IAR">
1172 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1173 <require condition="CM7_DP_IAR"/>
1174 <require Dendian="Little-endian"/>
1175 </condition>
1176 <condition id="CM7_DP_BE_IAR">
1177 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1178 <require condition="CM7_DP_IAR"/>
1179 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1180 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1181
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1182 <!-- conditions selecting single devices and CMSIS Core -->
1183 <!-- used for component startup, GCC version is used for C-Startup -->
1184 <condition id="ARMCM0 CMSIS">
1185 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1186 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1187 <require Cclass="CMSIS" Cgroup="CORE"/>
1188 </condition>
1189 <condition id="ARMCM0 CMSIS GCC">
1190 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1191 <require condition="ARMCM0 CMSIS"/>
1192 <require condition="GCC"/>
1193 </condition>
1194
1195 <condition id="ARMCM0+ CMSIS">
1196 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1197 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1198 <require Cclass="CMSIS" Cgroup="CORE"/>
1199 </condition>
1200 <condition id="ARMCM0+ CMSIS GCC">
1201 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1202 <require condition="ARMCM0+ CMSIS"/>
1203 <require condition="GCC"/>
1204 </condition>
1205
1206 <condition id="ARMCM3 CMSIS">
1207 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1208 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1209 <require Cclass="CMSIS" Cgroup="CORE"/>
1210 </condition>
1211 <condition id="ARMCM3 CMSIS GCC">
1212 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1213 <require condition="ARMCM3 CMSIS"/>
1214 <require condition="GCC"/>
1215 </condition>
1216
1217 <condition id="ARMCM4 CMSIS">
1218 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1219 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1220 <require Cclass="CMSIS" Cgroup="CORE"/>
1221 </condition>
1222 <condition id="ARMCM4 CMSIS GCC">
1223 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1224 <require condition="ARMCM4 CMSIS"/>
1225 <require condition="GCC"/>
1226 </condition>
1227
1228 <condition id="ARMCM7 CMSIS">
1229 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1230 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1231 <require Cclass="CMSIS" Cgroup="CORE"/>
1232 </condition>
1233 <condition id="ARMCM7 CMSIS GCC">
1234 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1235 <require condition="ARMCM7 CMSIS"/>
1236 <require condition="GCC"/>
1237 </condition>
1238
1239 <condition id="ARMSC000 CMSIS">
1240 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1241 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1242 <require Cclass="CMSIS" Cgroup="CORE"/>
1243 </condition>
1244 <condition id="ARMSC000 CMSIS GCC">
1245 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1246 <require condition="ARMSC000 CMSIS"/>
1247 <require condition="GCC"/>
1248 </condition>
1249
1250 <condition id="ARMSC300 CMSIS">
1251 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1252 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1253 <require Cclass="CMSIS" Cgroup="CORE"/>
1254 </condition>
1255 <condition id="ARMSC300 CMSIS GCC">
1256 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1257 <require condition="ARMSC300 CMSIS"/>
1258 <require condition="GCC"/>
1259 </condition>
1260
1261 <condition id="ARMv8MBL CMSIS">
1262 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1263 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1264 <require Cclass="CMSIS" Cgroup="CORE"/>
1265 </condition>
1266 <condition id="ARMv8MBL CMSIS GCC">
1267 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1268 <require condition="ARMv8MBL CMSIS"/>
1269 <require condition="GCC"/>
1270 </condition>
1271
1272 <condition id="ARMv8MML CMSIS">
1273 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1274 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1275 <require Cclass="CMSIS" Cgroup="CORE"/>
1276 </condition>
1277 <condition id="ARMv8MML CMSIS GCC">
1278 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1279 <require condition="ARMv8MML CMSIS"/>
1280 <require condition="GCC"/>
1281 </condition>
1282
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1283 <!-- CMSIS DSP -->
1284 <condition id="CMSIS DSP">
1285 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1286 <require condition="ARMv6_7-M Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1287 <require Cclass="CMSIS" Cgroup="CORE"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1288 <require condition="ARMCC GCC IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1289 </condition>
1290
1291 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1292 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1293 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1294 <require condition="ARMv6_7-M Device"/>
1295 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1296 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1297 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1298 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1299 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1300 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1301 <require condition="ARMv6_7_8-M Device"/>
1302 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1303 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1304 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1305 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1306 <description>Components required for RTOS2 RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1307 <require condition="ARMv6_7_8-M Device"/>
1308 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1309 <require Cclass="CMSIS" Cgroup="CORE"/>
1310 <require Cclass="Device" Cgroup="Startup"/>
1311 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1312 <condition id="RTOS2 RTX5 NS">
1313 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1314 <require condition="ARMv8-M TZ Device"/>
1315 <require condition="ARMCC GCC"/>
1316 <require Cclass="CMSIS" Cgroup="CORE"/>
1317 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1318 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1319
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1320 </conditions>
1321
1322 <components>
1323 <!-- CMSIS-Core component -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1324 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1325 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1326 <files>
1327 <!-- CPU independent -->
1328 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1329 <file category="include" name="CMSIS/Include/"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1330 <!-- Code template -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1331 <file category="sourceC" attr="template" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="CMSIS-Core 'main' function for ARMv8-M" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1332 </files>
1333 </component>
1334
1335 <!-- CMSIS-Startup components -->
1336 <!-- Cortex-M0 -->
1337 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1338 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1339 <files>
1340 <!-- include folder / device header file -->
1341 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1342 <!-- startup / system file -->
1343 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1344 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1345 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1346 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1347 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1348 </files>
1349 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1350 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1351 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1352 <files>
1353 <!-- include folder / device header file -->
1354 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1355 <!-- startup / system file -->
1356 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1357 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1358 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1359 </files>
1360 </component>
1361
1362 <!-- Cortex-M0+ -->
1363 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1364 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1365 <files>
1366 <!-- include folder / device header file -->
1367 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1368 <!-- startup / system file -->
1369 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1370 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1371 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1372 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1373 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1374 </files>
1375 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1376 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1377 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1378 <files>
1379 <!-- include folder / device header file -->
1380 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1381 <!-- startup / system file -->
1382 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1383 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1384 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1385 </files>
1386 </component>
1387
1388 <!-- Cortex-M3 -->
1389 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1390 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1391 <files>
1392 <!-- include folder / device header file -->
1393 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1394 <!-- startup / system file -->
1395 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1396 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1397 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1398 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1399 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1400 </files>
1401 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1402 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1403 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1404 <files>
1405 <!-- include folder / device header file -->
1406 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1407 <!-- startup / system file -->
1408 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1409 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1410 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1411 </files>
1412 </component>
1413
1414 <!-- Cortex-M4 -->
1415 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1416 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1417 <files>
1418 <!-- include folder / device header file -->
1419 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1420 <!-- startup / system file -->
1421 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1422 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1423 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1424 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1425 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1426 </files>
1427 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1428 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1429 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1430 <files>
1431 <!-- include folder / device header file -->
1432 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1433 <!-- startup / system file -->
1434 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1435 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1436 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1437 </files>
1438 </component>
1439
1440 <!-- Cortex-M7 -->
1441 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1442 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1443 <files>
1444 <!-- include folder / device header file -->
1445 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1446 <!-- startup / system file -->
1447 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1448 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1449 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1450 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1451 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1452 </files>
1453 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1454 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1455 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1456 <files>
1457 <!-- include folder / device header file -->
1458 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1459 <!-- startup / system file -->
1460 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1461 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1462 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1463 </files>
1464 </component>
1465
1466 <!-- Cortex-SC000 -->
1467 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1468 <description>System and Startup for Generic ARM SC000 device</description>
1469 <files>
1470 <!-- include folder / device header file -->
1471 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1472 <!-- startup / system file -->
1473 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1474 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1475 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1476 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1477 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1478 </files>
1479 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1480 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1481 <description>System and Startup for Generic ARM SC000 device</description>
1482 <files>
1483 <!-- include folder / device header file -->
1484 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1485 <!-- startup / system file -->
1486 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1487 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1488 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1489 </files>
1490 </component>
1491
1492 <!-- Cortex-SC300 -->
1493 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1494 <description>System and Startup for Generic ARM SC300 device</description>
1495 <files>
1496 <!-- include folder / device header file -->
1497 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1498 <!-- startup / system file -->
1499 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1500 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1501 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1502 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1503 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1504 </files>
1505 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1506 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1507 <description>System and Startup for Generic ARM SC300 device</description>
1508 <files>
1509 <!-- include folder / device header file -->
1510 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1511 <!-- startup / system file -->
1512 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1513 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1514 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1515 </files>
1516 </component>
1517
1518 <!-- ARMv8MBL -->
1519 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1520 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1521 <files>
1522 <!-- include folder / device header file -->
1523 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1524 <!-- startup / system file -->
1525 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1526 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1527 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1528 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1529 <!-- SAU configuration -->
1530 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1531 </files>
1532 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1533 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1534 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1535 <files>
1536 <!-- include folder / device header file -->
1537 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1538 <!-- startup / system file -->
1539 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1540 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1541 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1542 <!-- SAU configuration -->
1543 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1544 </files>
1545 </component>
1546
1547 <!-- ARMv8MML -->
1548 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1549 <description>System and Startup for Generic ARM ARMv8MML device</description>
1550 <files>
1551 <!-- include folder / device header file -->
1552 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1553 <!-- startup / system file -->
1554 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1555 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1556 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1557 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1558 <!-- SAU configuration -->
1559 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1560 </files>
1561 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1562 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 <description>System and Startup for Generic ARM ARMv8MML device</description>
1564 <files>
1565 <!-- include folder / device header file -->
1566 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1567 <!-- startup / system file -->
1568 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1569 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1570 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1571 <!-- SAU configuration -->
1572 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1573 </files>
1574 </component>
1575
1576
1577 <!-- CMSIS-DSP component -->
1578 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1579 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1580 <files>
1581 <!-- CPU independent -->
1582 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1583 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1584
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1585 <!-- CPU and Compiler dependent -->
1586 <!-- ARMCC -->
1587 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1588 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1589 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1590 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1591 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1592 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1594 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1596 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1597 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1598 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1599 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1600 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1601 <!-- GCC -->
1602 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1603 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1604 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1605 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1606 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1607 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1608 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1609 </files>
1610 </component>
1611
1612 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1613 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1614 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1615 <RTE_Components_h>
1616 <!-- the following content goes into file 'RTE_Components.h' -->
1617 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1618 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1619 </RTE_Components_h>
1620 <files>
1621 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]1622 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1623 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1624 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1625
1626 <!-- RTX templates -->
1627 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1628 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1629 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1630 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1631 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1632 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1633 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1634 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1635 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1636 <!-- tool-chain specific template file -->
1637 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1638 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1639 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1640
1641 <!-- CPU and Compiler dependent -->
1642 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1643 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1644 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1645 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1646 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1647 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1648 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1649 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1650 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1651 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1652 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1653 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1654 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1655 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1656 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1657 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1658 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1659 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1660 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1661 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1662 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1663 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1664 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1665 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1666 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1667 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1668 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1669 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1670 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1671 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1672 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1673 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1674 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1675 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1676 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1677 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1678 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1679 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1680 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1681 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1682 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1683 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1684 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1685 </files>
1686 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1687
1688 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1689 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1690 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1691 <RTE_Components_h>
1692 <!-- the following content goes into file 'RTE_Components.h' -->
1693 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1694 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1695 </RTE_Components_h>
1696 <files>
1697 <!-- RTX header file -->
1698 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1699 <!-- RTX compatibility module for API V1 -->
1700 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1701 </files>
1702 </component>
1703
1704 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1705 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1706 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Release)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1707 <RTE_Components_h>
1708 <!-- the following content goes into file 'RTE_Components.h' -->
1709 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1710 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1711 </RTE_Components_h>
1712 <files>
1713 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1714 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1715
1716 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1717 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1718 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1719
1720 <!-- RTX configuration -->
1721 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1722
1723 <!-- RTX templates -->
1724 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1725 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]1726 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]1727
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1728 <!-- RTX libraries (CPU and Compiler dependent) -->
1729 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1730 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1731 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1732 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1733 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1734 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1735 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1736 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
1737 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
1738 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
1739 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1740 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1741 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1742 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1743 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1744 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1745 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1746 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
1747 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
1748 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1749 </files>
1750 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1751 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Release NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1752 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Release)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1753 <RTE_Components_h>
1754 <!-- the following content goes into file 'RTE_Components.h' -->
1755 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1756 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1757 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1758 </RTE_Components_h>
1759 <files>
1760 <!-- RTX documentation -->
1761 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1762
1763 <!-- RTX header files -->
1764 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1765 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1766
1767 <!-- RTX configuration -->
1768 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1769
1770 <!-- RTX templates -->
1771 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1772 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1773 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1774
1775 <!-- RTX libraries (CPU and Compiler dependent) -->
1776 <!-- ARMCC -->
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1777 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1778 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1779 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
1780 <!-- GCC -->
1781 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
1782 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
1783 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1784 </files>
1785 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1786 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Debug" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1787 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Debug)</description>
1788 <RTE_Components_h>
1789 <!-- the following content goes into file 'RTE_Components.h' -->
1790 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1791 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1792 #define RTE_CMSIS_RTOS2_RTX5_DEBUG /* CMSIS-RTOS2 Keil RTX5 Debug */
1793 </RTE_Components_h>
1794 <files>
1795 <!-- RTX documentation -->
1796 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1797
1798 <!-- RTX header files -->
1799 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1800 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1801
1802 <!-- RTX configuration -->
1803 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1804
1805 <!-- RTX templates -->
1806 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1807 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1808 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1809
1810 <!-- RTX sources (core) -->
1811 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
1812 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
1813 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
1814 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
1815 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
1816 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
1817 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
1818 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
1819 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
1820 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
1821 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
1822 <!-- RTX sources (handlers ARMCC) -->
1823 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
1824 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
1825 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
1826 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
1827 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
1828 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
1829 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
1830 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
1831 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
1832 <!-- RTX sources (handlers GCC) -->
1833 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s" condition="CM0_GCC"/>
1834 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM3_GCC"/>
1835 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM4_GCC"/>
1836 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM4_FP_GCC"/>
1837 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM7_GCC"/>
1838 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM7_FP_GCC"/>
1839 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s" condition="ARMv8MBL_GCC"/>
1840 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s" condition="ARMv8MML_GCC"/>
1841 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="ARMv8MML_FP_GCC"/>
1842 </files>
1843 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1844 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Debug NS" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1845 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Debug)</description>
1846 <RTE_Components_h>
1847 <!-- the following content goes into file 'RTE_Components.h' -->
1848 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1849 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
1850 #define RTE_CMSIS_RTOS2_RTX5_DEBUG /* CMSIS-RTOS2 Keil RTX5 Debug */
1851 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
1852 </RTE_Components_h>
1853 <files>
1854 <!-- RTX documentation -->
1855 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
1856
1857 <!-- RTX header files -->
1858 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
1859 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1860
1861 <!-- RTX configuration -->
1862 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1863
1864 <!-- RTX templates -->
1865 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1866 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1867 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1868
1869 <!-- RTX sources (core) -->
1870 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
1871 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
1872 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
1873 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
1874 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
1875 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
1876 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
1877 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
1878 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
1879 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
1880 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
1881 <!-- RTX sources (ARMCC handlers) -->
1882 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
1883 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
1884 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
1885 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
1886 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
1887 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
1888 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
1889 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
1890 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
1891 <!-- RTX sources (GCC handlers) -->
1892 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s" condition="CM0_GCC"/>
1893 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM3_GCC"/>
1894 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM4_GCC"/>
1895 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM4_FP_GCC"/>
1896 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s" condition="CM7_GCC"/>
1897 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s" condition="CM7_FP_GCC"/>
1898 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s" condition="ARMv8MBL_GCC"/>
1899 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s" condition="ARMv8MML_GCC"/>
1900 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="ARMv8MML_FP_GCC"/>
1901 </files>
1902 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1903
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1904 </components>
1905
1906 <boards>
1907 <board name="uVision Simulator" vendor="Keil">
1908 <description>uVision Simulator</description>
1909 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1910 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1911 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1912 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame^]1913 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1914 </board>
1915 </boards>
1916
1917 <examples>
1918 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1919 <description>DSP_Lib Class Marks example</description>
1920 <board name="uVision Simulator" vendor="Keil"/>
1921 <project>
1922 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1923 </project>
1924 <attributes>
1925 <component Cclass="CMSIS" Cgroup="CORE"/>
1926 <component Cclass="CMSIS" Cgroup="DSP"/>
1927 <component Cclass="Device" Cgroup="Startup"/>
1928 <category>Getting Started</category>
1929 </attributes>
1930 </example>
1931
1932 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1933 <description>DSP_Lib Convolution example</description>
1934 <board name="uVision Simulator" vendor="Keil"/>
1935 <project>
1936 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1937 </project>
1938 <attributes>
1939 <component Cclass="CMSIS" Cgroup="CORE"/>
1940 <component Cclass="CMSIS" Cgroup="DSP"/>
1941 <component Cclass="Device" Cgroup="Startup"/>
1942 <category>Getting Started</category>
1943 </attributes>
1944 </example>
1945
1946 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1947 <description>DSP_Lib Dotproduct example</description>
1948 <board name="uVision Simulator" vendor="Keil"/>
1949 <project>
1950 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1951 </project>
1952 <attributes>
1953 <component Cclass="CMSIS" Cgroup="CORE"/>
1954 <component Cclass="CMSIS" Cgroup="DSP"/>
1955 <component Cclass="Device" Cgroup="Startup"/>
1956 <category>Getting Started</category>
1957 </attributes>
1958 </example>
1959
1960 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1961 <description>DSP_Lib FFT Bin example</description>
1962 <board name="uVision Simulator" vendor="Keil"/>
1963 <project>
1964 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1965 </project>
1966 <attributes>
1967 <component Cclass="CMSIS" Cgroup="CORE"/>
1968 <component Cclass="CMSIS" Cgroup="DSP"/>
1969 <component Cclass="Device" Cgroup="Startup"/>
1970 <category>Getting Started</category>
1971 </attributes>
1972 </example>
1973
1974 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1975 <description>DSP_Lib FIR example</description>
1976 <board name="uVision Simulator" vendor="Keil"/>
1977 <project>
1978 <environment name="uv" load="arm_fir_example.uvprojx"/>
1979 </project>
1980 <attributes>
1981 <component Cclass="CMSIS" Cgroup="CORE"/>
1982 <component Cclass="CMSIS" Cgroup="DSP"/>
1983 <component Cclass="Device" Cgroup="Startup"/>
1984 <category>Getting Started</category>
1985 </attributes>
1986 </example>
1987
1988 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1989 <description>DSP_Lib Graphic Equalizer example</description>
1990 <board name="uVision Simulator" vendor="Keil"/>
1991 <project>
1992 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1993 </project>
1994 <attributes>
1995 <component Cclass="CMSIS" Cgroup="CORE"/>
1996 <component Cclass="CMSIS" Cgroup="DSP"/>
1997 <component Cclass="Device" Cgroup="Startup"/>
1998 <category>Getting Started</category>
1999 </attributes>
2000 </example>
2001
2002 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2003 <description>DSP_Lib Linear Interpolation example</description>
2004 <board name="uVision Simulator" vendor="Keil"/>
2005 <project>
2006 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2007 </project>
2008 <attributes>
2009 <component Cclass="CMSIS" Cgroup="CORE"/>
2010 <component Cclass="CMSIS" Cgroup="DSP"/>
2011 <component Cclass="Device" Cgroup="Startup"/>
2012 <category>Getting Started</category>
2013 </attributes>
2014 </example>
2015
2016 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2017 <description>DSP_Lib Matrix example</description>
2018 <board name="uVision Simulator" vendor="Keil"/>
2019 <project>
2020 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2021 </project>
2022 <attributes>
2023 <component Cclass="CMSIS" Cgroup="CORE"/>
2024 <component Cclass="CMSIS" Cgroup="DSP"/>
2025 <component Cclass="Device" Cgroup="Startup"/>
2026 <category>Getting Started</category>
2027 </attributes>
2028 </example>
2029
2030 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2031 <description>DSP_Lib Signal Convergence example</description>
2032 <board name="uVision Simulator" vendor="Keil"/>
2033 <project>
2034 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2035 </project>
2036 <attributes>
2037 <component Cclass="CMSIS" Cgroup="CORE"/>
2038 <component Cclass="CMSIS" Cgroup="DSP"/>
2039 <component Cclass="Device" Cgroup="Startup"/>
2040 <category>Getting Started</category>
2041 </attributes>
2042 </example>
2043
2044 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2045 <description>DSP_Lib Sinus/Cosinus example</description>
2046 <board name="uVision Simulator" vendor="Keil"/>
2047 <project>
2048 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2049 </project>
2050 <attributes>
2051 <component Cclass="CMSIS" Cgroup="CORE"/>
2052 <component Cclass="CMSIS" Cgroup="DSP"/>
2053 <component Cclass="Device" Cgroup="Startup"/>
2054 <category>Getting Started</category>
2055 </attributes>
2056 </example>
2057
2058 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2059 <description>DSP_Lib Variance example</description>
2060 <board name="uVision Simulator" vendor="Keil"/>
2061 <project>
2062 <environment name="uv" load="arm_variance_example.uvprojx"/>
2063 </project>
2064 <attributes>
2065 <component Cclass="CMSIS" Cgroup="CORE"/>
2066 <component Cclass="CMSIS" Cgroup="DSP"/>
2067 <component Cclass="Device" Cgroup="Startup"/>
2068 <category>Getting Started</category>
2069 </attributes>
2070 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2071
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2072 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2073 <description>CMSIS-RTOS2 Blinky example</description>
2074 <board name="uVision Simulator" vendor="Keil"/>
2075 <project>
2076 <environment name="uv" load="Blinky.uvprojx"/>
2077 </project>
2078 <attributes>
2079 <component Cclass="CMSIS" Cgroup="CORE"/>
2080 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2081 <component Cclass="Device" Cgroup="Startup"/>
2082 <category>Getting Started</category>
2083 </attributes>
2084 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2085
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2086 </examples>
2087
2088</package>