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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / b73eaf331c06449336c3d3db2f4045f72026b17f / . / ARM.CMSIS.pdsc
blob: 021c8bc6c9c82ace5002cbefa821491ce0efac00 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther517e2202016-07-12 15:06:22 +0200[diff] [blame]11 <release version="5.0.0-Beta11">
12 CMSIS_Core:
13 - Added CMSE support to cmsis_gcc.h.
14 </release>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]15 <release version="5.0.0-Beta10">
16 CMSIS-RTOS2:
17 - Added RTX5 component.
18 </release>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]19 <release version="5.0.0-Beta9">
20 CMSIS_Core:
21 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
22 - Reworked SAU register and functions.
23 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]24 <release version="5.0.0-Beta8">
25 CMSIS-RTOS:
26 - API 2.0
27 - RTX 5.0.0-Alpha
28 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]29 <release version="5.0.0-Beta7">
30 CMSIS_Core:
31 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]32 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]33 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]34 <release version="5.0.0-Beta6">
35 CMSIS_Core:
36 - Added SCB_CFSR register bit definitions in core_*.h.
37 - Added NVIC_GetEnableIRQ function in core_*.h.
38 - Updated core instruction macros in cmsis_gcc.h.
39 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]40 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]41 CMSIS_DSP:
42 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
43 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]44 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]45 <release version="5.0.0-Beta4">
46 Updated ARMv8MML device files.
47 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
48 Updated CMSIS core files.
49 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
50 </release>
51 <release version="5.0.0-Beta3">
52 Updated CMSIS ARMv8M core / device files
53 - increased SAU regions to 8.
54 - moved TZ_SAU_Setup() to partition_#device#.h.
55 </release>
56 <release version="5.0.0-Beta2">
57 - renamed core_*.h to lower case.
58 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
59 - updated ARMv8M?L.svd.
60 </release>
61 <release version="5.0.0-Beta1">
62 - added function SCB_GetFPUType() to all CMSIS cores.
63 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
64 - updated CMSIS core files to V5.0
65 - updated CMSIS Core change log.
66 - updated CMSIS DSP_Lib change log.
67 - updated CMSIS DSP_Lib libraries.
68 </release>
69 <release version="5.0.0-Beta" date="2015-12-15">
70 Added ARMv8M support to CMSIS-Core.
71 - CMSIS-Core 5.0.0 Beta (see revision history for details)
72 - CMSIS-RTOS
73 -- API 1.02 (unchanged)
74 -- RTX 4.81.0 (see revision history for details)
75 - CMSIS-SVD 1.3.2 (see revision history for details)
76 </release>
77 <release version="4.5.0" date="2015-10-28">
78 - CMSIS-Core 4.30.0 (see revision history for details)
79 - CMSIS-DAP 1.1.0 (unchanged)
80 - CMSIS-Driver 2.04.0 (see revision history for details)
81 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
82 - CMSIS-PACK 1.4.1 (see revision history for details)
83 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
84 - CMSIS-SVD 1.3.1 (see revision history for details)
85 </release>
86 <release version="4.4.0" date="2015-09-11">
87 - CMSIS-Core 4.20 (see revision history for details)
88 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
89 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
90 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
91 - CMSIS-RTOS
92 -- API 1.02 (unchanged)
93 -- RTX 4.79 (see revision history for details)
94 - CMSIS-SVD 1.3.0 (see revision history for details)
95 - CMSIS-DAP 1.1.0 (extended with SWO support)
96 </release>
97 <release version="4.3.0" date="2015-03-20">
98 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
99 - CMSIS-DSP 1.4.5 (see revision history for details)
100 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
101 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
102 - CMSIS-RTOS
103 -- API 1.02 (unchanged)
104 -- RTX 4.78 (see revision history for details)
105 - CMSIS-SVD 1.2 (unchanged)
106 </release>
107 <release version="4.2.0" date="2014-09-24">
108 Adding Cortex-M7 support
109 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
110 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
111 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
112 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
113 - CMSIS-RTOS RTX 4.75 (see revision history for details)
114 </release>
115 <release version="4.1.1" date="2014-06-30">
116 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
117 </release>
118 <release version="4.1.0" date="2014-06-12">
119 - CMSIS-Driver 2.02 (incompatible update)
120 - CMSIS-Pack 1.3 (see revision history for details)
121 - CMSIS-DSP 1.4.2 (unchanged)
122 - CMSIS-Core 3.30 (unchanged)
123 - CMSIS-RTOS RTX 4.74 (unchanged)
124 - CMSIS-RTOS API 1.02 (unchanged)
125 - CMSIS-SVD 1.10 (unchanged)
126 PACK:
127 - removed G++ specific files from PACK
128 - added Component Startup variant "C Startup"
129 - added Pack Checking Utility
130 - updated conditions to reflect tool-chain dependency
131 - added Taxonomy for Graphics
132 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
133 </release>
134 <release version="4.0.0">
135 - CMSIS-Driver 2.00 Preliminary (incompatible update)
136 - CMSIS-Pack 1.1 Preliminary
137 - CMSIS-DSP 1.4.2 (see revision history for details)
138 - CMSIS-Core 3.30 (see revision history for details)
139 - CMSIS-RTOS RTX 4.74 (see revision history for details)
140 - CMSIS-RTOS API 1.02 (unchanged)
141 - CMSIS-SVD 1.10 (unchanged)
142 </release>
143 <release version="3.20.4">
144 - CMSIS-RTOS 4.74 (see revision history for details)
145 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
146 </release>
147 <release version="3.20.3">
148 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
149 - CMSIS-RTOS 4.73 (see revision history for details)
150 </release>
151 <release version="3.20.2">
152 - CMSIS-Pack documentation has been added
153 - CMSIS-Drivers header and documentation have been added to PACK
154 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
155 </release>
156 <release version="3.20.1">
157 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
158 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
159 </release>
160 <release version="3.20.0">
161 The software portions that are deployed in the application program are now under a BSD license which allows usage
162 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
163 The individual components have been update as listed below:
164 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
165 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
166 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
167 - CMSIS-SVD is unchanged.
168 </release>
169 </releases>
170
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]171 <taxonomy>
172 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
173 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
174 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
175 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
176 <description Cclass="File System">File Drive Support and File System</description>
177 <description Cclass="Graphics">Graphical User Interface</description>
178 <description Cclass="Network">Network Stack using Internet Protocols</description>
179 <description Cclass="USB">Universal Serial Bus Stack</description>
180 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
181 </taxonomy>
182
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]183 <devices>
184 <!-- ****************************** Cortex-M0 ****************************** -->
185 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]186 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]187 <description>
188The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
189- simple, easy-to-use programmers model
190- highly efficient ultra-low power operation
191- excellent code density
192- deterministic, high-performance interrupt handling
193- upward compatibility with the rest of the Cortex-M processor family.
194 </description>
195 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
196 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
197 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
198 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
199
200 <device Dname="ARMCM0">
201 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
202 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
203 </device>
204 </family>
205
206 <!-- ****************************** Cortex-M0P ****************************** -->
207 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]208 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]209 <description>
210The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
211- simple, easy-to-use programmers model
212- highly efficient ultra-low power operation
213- excellent code density
214- deterministic, high-performance interrupt handling
215- upward compatibility with the rest of the Cortex-M processor family.
216 </description>
217 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
218 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
219 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
220 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
221
222 <device Dname="ARMCM0P">
223 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
224 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
225 </device>
226 </family>
227
228 <!-- ****************************** Cortex-M3 ****************************** -->
229 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]230 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]231 <description>
232The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
233- simple, easy-to-use programmers model
234- highly efficient ultra-low power operation
235- excellent code density
236- deterministic, high-performance interrupt handling
237- upward compatibility with the rest of the Cortex-M processor family.
238 </description>
239 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
240 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
241 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
242 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
243
244 <device Dname="ARMCM3">
245 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
246 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
247 </device>
248 </family>
249
250 <!-- ****************************** Cortex-M4 ****************************** -->
251 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]252 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]253 <description>
254The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
255- simple, easy-to-use programmers model
256- highly efficient ultra-low power operation
257- excellent code density
258- deterministic, high-performance interrupt handling
259- upward compatibility with the rest of the Cortex-M processor family.
260 </description>
261 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
262 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
263 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
264 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
265
266 <device Dname="ARMCM4">
267 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
268 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
269 </device>
270
271 <device Dname="ARMCM4_FP">
272 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
273 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
274 </device>
275 </family>
276
277 <!-- ****************************** Cortex-M7 ****************************** -->
278 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]279 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]280 <description>
281The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
282- simple, easy-to-use programmers model
283- highly efficient ultra-low power operation
284- excellent code density
285- deterministic, high-performance interrupt handling
286- upward compatibility with the rest of the Cortex-M processor family.
287 </description>
288 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
289 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
290 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
291 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
292
293 <device Dname="ARMCM7">
294 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
295 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
296 </device>
297
298 <device Dname="ARMCM7_SP">
299 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
300 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
301 </device>
302
303 <device Dname="ARMCM7_DP">
304 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
305 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
306 </device>
307 </family>
308
309 <!-- ****************************** ARMSC000 ****************************** -->
310 <family Dfamily="ARM SC000" Dvendor="ARM:82">
311 <description>
312The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
313- simple, easy-to-use programmers model
314- highly efficient ultra-low power operation
315- excellent code density
316- deterministic, high-performance interrupt handling
317 </description>
318 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
319 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
320 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
321 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
322
323 <device Dname="ARMSC000">
324 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
325 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
326 </device>
327 </family>
328
329 <!-- ****************************** ARMSC300 ****************************** -->
330 <family Dfamily="ARM SC300" Dvendor="ARM:82">
331 <description>
332The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
333- simple, easy-to-use programmers model
334- highly efficient ultra-low power operation
335- excellent code density
336- deterministic, high-performance interrupt handling
337 </description>
338 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
339 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
340 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
341 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
342
343 <device Dname="ARMSC300">
344 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
345 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
346 </device>
347 </family>
348
349 <!-- ****************************** ARMv8-M Baseline ********************** -->
350 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
351 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
352 <description>
353The ARMv8MBL processor is brand new.
354 </description>
355 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
356 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
357 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
358 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
359
360 <device Dname="ARMv8MBL">
361 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
362 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
363 </device>
364 </family>
365
366 <!-- ****************************** ARMv8-M Mainline ****************************** -->
367 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
368 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
369 <description>
370The ARMv8MML processor is brand new.
371 </description>
372 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
373 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
374 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
375 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
376
377 <device Dname="ARMv8MML">
378 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
379 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
380 </device>
381
382 <device Dname="ARMv8MML_SP">
383 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
384 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
385 </device>
386
387 <device Dname="ARMv8MML_DP">
388 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
389 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
390 </device>
391 </family>
392
393 </devices>
394
395
396 <apis>
397 <!-- CMSIS-RTOS API -->
398 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
399 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
400 <files>
401 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
402 </files>
403 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]404 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]405 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
406 <files>
407 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
408 </files>
409 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]410 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
411 <description>USART Driver API for Cortex-M</description>
412 <files>
413 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
414 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
415 </files>
416 </api>
417 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
418 <description>SPI Driver API for Cortex-M</description>
419 <files>
420 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
421 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
422 </files>
423 </api>
424 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
425 <description>SAI Driver API for Cortex-M</description>
426 <files>
427 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
428 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
429 </files>
430 </api>
431 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
432 <description>I2C Driver API for Cortex-M</description>
433 <files>
434 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
435 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
436 </files>
437 </api>
438 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
439 <description>CAN Driver API for Cortex-M</description>
440 <files>
441 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
442 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
446 <description>Flash Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
453 <description>MCI Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
456 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
457 </files>
458 </api>
459 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
460 <description>NAND Flash Driver API for Cortex-M</description>
461 <files>
462 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
463 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
464 </files>
465 </api>
466 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
467 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
468 <files>
469 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
470 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
471 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
472 </files>
473 </api>
474 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
475 <description>Ethernet MAC Driver API for Cortex-M</description>
476 <files>
477 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
478 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
479 </files>
480 </api>
481 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
482 <description>Ethernet PHY Driver API for Cortex-M</description>
483 <files>
484 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
485 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
486 </files>
487 </api>
488 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
489 <description>USB Device Driver API for Cortex-M</description>
490 <files>
491 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
492 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
493 </files>
494 </api>
495 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
496 <description>USB Host Driver API for Cortex-M</description>
497 <files>
498 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
499 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
500 </files>
501 </api>
502 </apis>
503
504 <!-- conditions are dependency rules that can apply to a component or an individual file -->
505 <conditions>
506 <condition id="ARMCC">
507 <require Tcompiler="ARMCC"/>
508 </condition>
509
510 <condition id="GCC">
511 <require Tcompiler="GCC"/>
512 </condition>
513
514 <condition id="IAR">
515 <require Tcompiler="IAR"/>
516 </condition>
517
518 <condition id="ARMCC GCC">
519 <accept Tcompiler="ARMCC"/>
520 <accept Tcompiler="GCC"/>
521 </condition>
522
523 <condition id="Cortex-M Device">
524 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
525 <accept Dcore="Cortex-M0"/>
526 <accept Dcore="Cortex-M0+"/>
527 <accept Dcore="Cortex-M3"/>
528 <accept Dcore="Cortex-M4"/>
529 <accept Dcore="Cortex-M7"/>
530 <accept Dcore="SC000"/>
531 <accept Dcore="SC300"/>
532 </condition>
533
534 <condition id="Cortex-M ARMv8-M Device">
535 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
536 <accept Dcore="Cortex-M0"/>
537 <accept Dcore="Cortex-M0+"/>
538 <accept Dcore="Cortex-M3"/>
539 <accept Dcore="Cortex-M4"/>
540 <accept Dcore="Cortex-M7"/>
541 <accept Dcore="SC000"/>
542 <accept Dcore="SC300"/>
543 <accept Dcore="ARMV8MBL"/>
544 <accept Dcore="ARMV8MML"/>
545 </condition>
546
547 <condition id="Cortex-M Device CMSIS Core">
548 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
549 <require condition="Cortex-M Device"/>
550 <require Cclass="CMSIS" Cgroup="CORE"/>
551 </condition>
552
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]553 <condition id="CMSIS Core">
554 <description>CMSIS CORE processor and device specific Startup files</description>
555 <require Cclass="CMSIS" Cgroup="CORE"/>
556 </condition>
557
558 <condition id="ARMCM0 CMSIS">
559 <!-- conditions selecting Devices -->
560 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
561 <require Dvendor="ARM:82" Dname="ARMCM0"/>
562 <require Cclass="CMSIS" Cgroup="CORE"/>
563 </condition>
564
565 <condition id="ARMCM0 CMSIS GCC">
566 <!-- conditions selecting Devices -->
567 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
568 <require condition="ARMCM0 CMSIS"/>
569 <require condition="GCC"/>
570 </condition>
571
572 <condition id="ARMCM0+ CMSIS">
573 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
574 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
575 <require Cclass="CMSIS" Cgroup="CORE"/>
576 </condition>
577
578 <condition id="ARMCM0+ CMSIS GCC">
579 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
580 <require condition="ARMCM0+ CMSIS"/>
581 <require condition="GCC"/>
582 </condition>
583
584 <condition id="ARMCM3 CMSIS">
585 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
586 <require Dvendor="ARM:82" Dname="ARMCM3"/>
587 <require Cclass="CMSIS" Cgroup="CORE"/>
588 </condition>
589
590 <condition id="ARMCM3 CMSIS GCC">
591 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
592 <require condition="ARMCM3 CMSIS"/>
593 <require condition="GCC"/>
594 </condition>
595
596 <condition id="ARMCM4 CMSIS">
597 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
598 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
599 <require Cclass="CMSIS" Cgroup="CORE"/>
600 </condition>
601
602 <condition id="ARMCM4 CMSIS GCC">
603 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
604 <require condition="ARMCM4 CMSIS"/>
605 <require condition="GCC"/>
606 </condition>
607
608 <condition id="ARMCM7 CMSIS">
609 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
610 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
611 <require Cclass="CMSIS" Cgroup="CORE"/>
612 </condition>
613
614 <condition id="ARMCM7 CMSIS GCC">
615 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
616 <require condition="ARMCM7 CMSIS"/>
617 <require condition="GCC"/>
618 </condition>
619
620 <condition id="ARMSC000 CMSIS">
621 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
622 <require Dvendor="ARM:82" Dname="ARMSC000"/>
623 <require Cclass="CMSIS" Cgroup="CORE"/>
624 </condition>
625
626 <condition id="ARMSC000 CMSIS GCC">
627 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
628 <require condition="ARMSC000 CMSIS"/>
629 <require condition="GCC"/>
630 </condition>
631
632 <condition id="ARMSC300 CMSIS">
633 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
634 <require Dvendor="ARM:82" Dname="ARMSC300"/>
635 <require Cclass="CMSIS" Cgroup="CORE"/>
636 </condition>
637
638 <condition id="ARMSC300 CMSIS GCC">
639 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
640 <require condition="ARMSC300 CMSIS"/>
641 <require condition="GCC"/>
642 </condition>
643
644 <condition id="ARMv8MBL CMSIS">
645 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
646 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
647 <require Cclass="CMSIS" Cgroup="CORE"/>
648 </condition>
649
650 <condition id="ARMv8MBL CMSIS GCC">
651 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
652 <require condition="ARMv8MBL CMSIS"/>
653 <require condition="GCC"/>
654 </condition>
655
656 <condition id="ARMv8MML CMSIS">
657 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
658 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
659 <require Cclass="CMSIS" Cgroup="CORE"/>
660 </condition>
661
662 <condition id="ARMv8MML CMSIS GCC">
663 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
664 <require condition="ARMv8MML CMSIS"/>
665 <require condition="GCC"/>
666 </condition>
667
668 <condition id="CMSIS DSP">
669 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
670 <require condition="Cortex-M Device CMSIS Core"/>
671 <accept Tcompiler="GCC"/>
672 <accept Tcompiler="ARMCC"/>
673 <accept Tcompiler="IAR"/>
674 </condition>
675
676 <!-- ARMCC compiler -->
677 <condition id="CM0_LE_ARMCC">
678 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
679 <accept Dcore="Cortex-M0"/>
680 <accept Dcore="Cortex-M0+"/>
681 <accept Dcore="SC000"/>
682 <require Dendian="Little-endian"/>
683 <require Tcompiler="ARMCC"/>
684 </condition>
685
686 <condition id="CM0_BE_ARMCC">
687 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
688 <accept Dcore="Cortex-M0"/>
689 <accept Dcore="Cortex-M0+"/>
690 <accept Dcore="SC000"/>
691 <require Dendian="Big-endian"/>
692 <require Tcompiler="ARMCC"/>
693 </condition>
694
695 <condition id="CM3_LE_ARMCC">
696 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
697 <accept Dcore="Cortex-M3"/>
698 <accept Dcore="SC300"/>
699 <require Dendian="Little-endian"/>
700 <require Tcompiler="ARMCC"/>
701 </condition>
702
703 <condition id="CM3_BE_ARMCC">
704 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
705 <accept Dcore="Cortex-M3"/>
706 <accept Dcore="SC300"/>
707 <require Dendian="Big-endian"/>
708 <require Tcompiler="ARMCC"/>
709 </condition>
710
711 <condition id="CM4_LE_ARMCC">
712 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
713 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
714 <require Tcompiler="ARMCC"/>
715 </condition>
716
717 <condition id="CM4_BE_ARMCC">
718 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
719 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
720 <require Tcompiler="ARMCC"/>
721 </condition>
722
723 <condition id="CM4F_LE_ARMCC">
724 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
725 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728
729 <condition id="CM4F_BE_ARMCC">
730 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
731 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
734
735 <!-- XMC 4000 Series devices from Infineon require a special library -->
736 <condition id="CM4_LE_ARMCC_STD">
737 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
738 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
739 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
740 <require Tcompiler="ARMCC"/>
741 </condition>
742 <condition id="CM4_LE_ARMCC_IFX">
743 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
744 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
745 <require Tcompiler="ARMCC"/>
746 </condition>
747 <condition id="CM4F_LE_ARMCC_STD">
748 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
749 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
750 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
751 <require Tcompiler="ARMCC"/>
752 </condition>
753 <condition id="CM4F_LE_ARMCC_IFX">
754 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
755 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
756 <require Tcompiler="ARMCC"/>
757 </condition>
758
759 <condition id="CM7_LE_ARMCC">
760 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
761 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
762 <require Tcompiler="ARMCC"/>
763 </condition>
764
765 <condition id="CM7_BE_ARMCC">
766 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
767 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
768 <require Tcompiler="ARMCC"/>
769 </condition>
770
771 <condition id="CM7F_LE_ARMCC">
772 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
773 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
774 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
775 <require Tcompiler="ARMCC"/>
776 </condition>
777
778 <condition id="CM7F_BE_ARMCC">
779 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
780 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
781 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
782 <require Tcompiler="ARMCC"/>
783 </condition>
784
785 <condition id="CM7FSP_LE_ARMCC">
786 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
787 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
788 <require Tcompiler="ARMCC"/>
789 </condition>
790
791 <condition id="CM7FSP_BE_ARMCC">
792 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
793 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
794 <require Tcompiler="ARMCC"/>
795 </condition>
796
797 <condition id="CM7FDP_LE_ARMCC">
798 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
799 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
800 <require Tcompiler="ARMCC"/>
801 </condition>
802
803 <condition id="CM7FDP_BE_ARMCC">
804 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
805 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
806 <require Tcompiler="ARMCC"/>
807 </condition>
808
809 <!-- GCC compiler -->
810 <condition id="CM0_LE_GCC">
811 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
812 <accept Dcore="Cortex-M0"/>
813 <accept Dcore="Cortex-M0+"/>
814 <accept Dcore="SC000"/>
815 <require Dendian="Little-endian"/>
816 <require Tcompiler="GCC"/>
817 </condition>
818
819 <condition id="CM0_BE_GCC">
820 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
821 <accept Dcore="Cortex-M0"/>
822 <accept Dcore="Cortex-M0+"/>
823 <accept Dcore="SC000"/>
824 <require Dendian="Big-endian"/>
825 <require Tcompiler="GCC"/>
826 </condition>
827
828 <condition id="CM3_LE_GCC">
829 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
830 <accept Dcore="Cortex-M3"/>
831 <accept Dcore="SC300"/>
832 <require Dendian="Little-endian"/>
833 <require Tcompiler="GCC"/>
834 </condition>
835
836 <condition id="CM3_BE_GCC">
837 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
838 <accept Dcore="Cortex-M3"/>
839 <accept Dcore="SC300"/>
840 <require Dendian="Big-endian"/>
841 <require Tcompiler="GCC"/>
842 </condition>
843
844 <condition id="CM4_LE_GCC">
845 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
846 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
847 <require Tcompiler="GCC"/>
848 </condition>
849
850 <condition id="CM4_BE_GCC">
851 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
852 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
853 <require Tcompiler="GCC"/>
854 </condition>
855
856 <condition id="CM4F_LE_GCC">
857 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
858 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
859 <require Tcompiler="GCC"/>
860 </condition>
861
862 <condition id="CM4F_BE_GCC">
863 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
864 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
865 <require Tcompiler="GCC"/>
866 </condition>
867
868 <!-- XMC 4000 Series devices from Infineon require a special library -->
869 <condition id="CM4_LE_GCC_STD">
870 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
871 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
872 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
873 <require Tcompiler="GCC"/>
874 </condition>
875 <condition id="CM4_LE_GCC_IFX">
876 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
877 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880 <condition id="CM4F_LE_GCC_STD">
881 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
882 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
883 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
884 <require Tcompiler="GCC"/>
885 </condition>
886 <condition id="CM4F_LE_GCC_IFX">
887 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
888 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
889 <require Tcompiler="GCC"/>
890 </condition>
891
892 <condition id="CM7_LE_GCC">
893 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
894 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
895 <require Tcompiler="GCC"/>
896 </condition>
897
898 <condition id="CM7_BE_GCC">
899 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
900 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
901 <require Tcompiler="GCC"/>
902 </condition>
903
904 <condition id="CM7F_LE_GCC">
905 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
906 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
907 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
908 <require Tcompiler="GCC"/>
909 </condition>
910
911 <condition id="CM7F_BE_GCC">
912 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
913 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
914 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
915 <require Tcompiler="GCC"/>
916 </condition>
917
918 <condition id="CM7FSP_LE_GCC">
919 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
920 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
921 <require Tcompiler="GCC"/>
922 </condition>
923
924 <condition id="CM7FSP_BE_GCC">
925 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
926 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
927 <require Tcompiler="GCC"/>
928 </condition>
929
930 <condition id="CM7FDP_LE_GCC">
931 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
932 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
933 <require Tcompiler="GCC"/>
934 </condition>
935
936 <condition id="CM7FDP_BE_GCC">
937 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
938 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
939 <require Tcompiler="GCC"/>
940 </condition>
941
942 <!-- IAR compiler -->
943 <condition id="CM0_LE_IAR">
944 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
945 <accept Dcore="Cortex-M0"/>
946 <accept Dcore="Cortex-M0+"/>
947 <accept Dcore="SC000"/>
948 <require Dendian="Little-endian"/>
949 <require Tcompiler="IAR"/>
950 </condition>
951
952 <condition id="CM0_BE_IAR">
953 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
954 <accept Dcore="Cortex-M0"/>
955 <accept Dcore="Cortex-M0+"/>
956 <accept Dcore="SC000"/>
957 <require Dendian="Big-endian"/>
958 <require Tcompiler="IAR"/>
959 </condition>
960
961 <condition id="CM3_LE_IAR">
962 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
963 <accept Dcore="Cortex-M3"/>
964 <accept Dcore="SC300"/>
965 <require Dendian="Little-endian"/>
966 <require Tcompiler="IAR"/>
967 </condition>
968
969 <condition id="CM3_BE_IAR">
970 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
971 <accept Dcore="Cortex-M3"/>
972 <accept Dcore="SC300"/>
973 <require Dendian="Big-endian"/>
974 <require Tcompiler="IAR"/>
975 </condition>
976
977 <condition id="CM4_LE_IAR">
978 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
979 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
980 <require Tcompiler="IAR"/>
981 </condition>
982
983 <condition id="CM4_BE_IAR">
984 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
985 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
986 <require Tcompiler="IAR"/>
987 </condition>
988
989 <condition id="CM4F_LE_IAR">
990 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
991 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
992 <require Tcompiler="IAR"/>
993 </condition>
994
995 <condition id="CM4F_BE_IAR">
996 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
997 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
998 <require Tcompiler="IAR"/>
999 </condition>
1000
1001 <condition id="CM7_LE_IAR">
1002 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1003 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
1004 <require Tcompiler="IAR"/>
1005 </condition>
1006
1007 <condition id="CM7_BE_IAR">
1008 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1009 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1010 <require Tcompiler="IAR"/>
1011 </condition>
1012
1013 <condition id="CM7F_LE_IAR">
1014 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1015 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1016 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1017 <require Tcompiler="IAR"/>
1018 </condition>
1019
1020 <condition id="CM7F_BE_IAR">
1021 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1022 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1023 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1024 <require Tcompiler="IAR"/>
1025 </condition>
1026
1027 <condition id="CM7FSP_LE_IAR">
1028 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1029 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1030 <require Tcompiler="IAR"/>
1031 </condition>
1032
1033 <condition id="CM7FSP_BE_IAR">
1034 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1035 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1036 <require Tcompiler="IAR"/>
1037 </condition>
1038
1039 <condition id="CM7FDP_LE_IAR">
1040 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1041 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1042 <require Tcompiler="IAR"/>
1043 </condition>
1044
1045 <condition id="CM7FDP_BE_IAR">
1046 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1047 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1048 <require Tcompiler="IAR"/>
1049 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1050
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1051 <condition id="RTOS RTX Dependency">
1052 <description>Components required for RTOS RTX</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1053 <require condition="Cortex-M Device"/>
1054 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1055 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/> -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1056 </condition>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1057 <condition id="RTOS RTX5 Dependency">
1058 <description>Components required for RTOS RTX5</description>
1059 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/> -->
1060 </condition>
1061 <condition id="RTOS2 RTX5 Dependency">
1062 <description>Components required for RTOS2 RTX5</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1063 <require condition="Cortex-M Device"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1064 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1065 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1066 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1067 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1068 </conditions>
1069
1070 <components>
1071 <!-- CMSIS-Core component -->
1072 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1073 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1074 <files>
1075 <!-- CPU independent -->
1076 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1077 <file category="include" name="CMSIS/Include/"/>
1078 </files>
1079 </component>
1080
1081 <!-- CMSIS-Startup components -->
1082 <!-- Cortex-M0 -->
1083 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1084 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1085 <files>
1086 <!-- include folder / device header file -->
1087 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1088 <!-- startup / system file -->
1089 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1090 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1091 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1092 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1093 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1094 </files>
1095 </component>
1096 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1097 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1098 <files>
1099 <!-- include folder / device header file -->
1100 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1101 <!-- startup / system file -->
1102 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1103 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1104 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1105 </files>
1106 </component>
1107
1108 <!-- Cortex-M0+ -->
1109 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1110 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1111 <files>
1112 <!-- include folder / device header file -->
1113 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1114 <!-- startup / system file -->
1115 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1116 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1117 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1118 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1119 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1120 </files>
1121 </component>
1122 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1123 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1124 <files>
1125 <!-- include folder / device header file -->
1126 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1127 <!-- startup / system file -->
1128 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1129 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1130 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1131 </files>
1132 </component>
1133
1134 <!-- Cortex-M3 -->
1135 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1136 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1137 <files>
1138 <!-- include folder / device header file -->
1139 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1140 <!-- startup / system file -->
1141 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1142 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1143 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1144 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1145 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1146 </files>
1147 </component>
1148 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1149 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1150 <files>
1151 <!-- include folder / device header file -->
1152 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1153 <!-- startup / system file -->
1154 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1155 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1156 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1157 </files>
1158 </component>
1159
1160 <!-- Cortex-M4 -->
1161 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1162 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1163 <files>
1164 <!-- include folder / device header file -->
1165 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1166 <!-- startup / system file -->
1167 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1168 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1169 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1170 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1171 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1172 </files>
1173 </component>
1174 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1175 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1176 <files>
1177 <!-- include folder / device header file -->
1178 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1179 <!-- startup / system file -->
1180 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1181 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1182 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1183 </files>
1184 </component>
1185
1186 <!-- Cortex-M7 -->
1187 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1188 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1189 <files>
1190 <!-- include folder / device header file -->
1191 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1192 <!-- startup / system file -->
1193 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1194 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1195 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1196 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1197 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1198 </files>
1199 </component>
1200 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1201 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1202 <files>
1203 <!-- include folder / device header file -->
1204 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1205 <!-- startup / system file -->
1206 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1207 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1208 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1209 </files>
1210 </component>
1211
1212 <!-- Cortex-SC000 -->
1213 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1214 <description>System and Startup for Generic ARM SC000 device</description>
1215 <files>
1216 <!-- include folder / device header file -->
1217 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1218 <!-- startup / system file -->
1219 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1220 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1221 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1222 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1223 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1224 </files>
1225 </component>
1226 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1227 <description>System and Startup for Generic ARM SC000 device</description>
1228 <files>
1229 <!-- include folder / device header file -->
1230 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1231 <!-- startup / system file -->
1232 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1233 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1234 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1235 </files>
1236 </component>
1237
1238 <!-- Cortex-SC300 -->
1239 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1240 <description>System and Startup for Generic ARM SC300 device</description>
1241 <files>
1242 <!-- include folder / device header file -->
1243 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1244 <!-- startup / system file -->
1245 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1246 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1247 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1248 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1249 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1250 </files>
1251 </component>
1252 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1253 <description>System and Startup for Generic ARM SC300 device</description>
1254 <files>
1255 <!-- include folder / device header file -->
1256 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1257 <!-- startup / system file -->
1258 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1259 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1260 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1261 </files>
1262 </component>
1263
1264 <!-- ARMv8MBL -->
1265 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1266 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1267 <files>
1268 <!-- include folder / device header file -->
1269 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1270 <!-- startup / system file -->
1271 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1272 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1273 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1274 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1275 <!-- SAU configuration -->
1276 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1277 </files>
1278 </component>
1279 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1280 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1281 <files>
1282 <!-- include folder / device header file -->
1283 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1284 <!-- startup / system file -->
1285 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1286 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1287 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1288 </files>
1289 </component>
1290
1291 <!-- ARMv8MML -->
1292 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1293 <description>System and Startup for Generic ARM ARMv8MML device</description>
1294 <files>
1295 <!-- include folder / device header file -->
1296 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1297 <!-- startup / system file -->
1298 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1299 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1300 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1301 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1302 <!-- SAU configuration -->
1303 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1304 </files>
1305 </component>
1306 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1307 <description>System and Startup for Generic ARM ARMv8MML device</description>
1308 <files>
1309 <!-- include folder / device header file -->
1310 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1311 <!-- startup / system file -->
1312 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1313 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1314 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1315 </files>
1316 </component>
1317
1318
1319 <!-- CMSIS-DSP component -->
1320 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1321 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1322 <files>
1323 <!-- CPU independent -->
1324 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1325 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1326 <file category="header" name="CMSIS/Include/arm_math.h"/>
1327 <!-- CPU and Compiler dependent -->
1328 <!-- ARMCC -->
1329 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1330 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1331 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1332 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1333 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1334 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1335 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1336 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1337 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1338 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1339 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1340 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1341 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1342 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1343 <!-- GCC -->
1344 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1345 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1346 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1347 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1348 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1349 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1350 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1351 </files>
1352 </component>
1353
1354 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1355 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX Dependency">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1356 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1357 <RTE_Components_h>
1358 <!-- the following content goes into file 'RTE_Components.h' -->
1359 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1360 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1361 </RTE_Components_h>
1362 <files>
1363 <!-- CPU independent -->
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame^]1364 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1365 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1366 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1367
1368 <!-- RTX templates -->
1369 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1370 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1371 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1372 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1373 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1374 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1375 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1376 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1377 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1378 <!-- tool-chain specific template file -->
1379 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1380 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1381 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1382
1383 <!-- CPU and Compiler dependent -->
1384 <!-- ARMCC -->
1385 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1386 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1387 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1388 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1389 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1390 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1391 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1392 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1393 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1394 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1395 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1396 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1397 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1398 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1399 <!-- GCC -->
1400 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1401 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1402 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1403 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1404 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1405 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1406 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1407 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1408 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1409 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1410 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1411 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1412 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1413 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1414 <!-- IAR -->
1415 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1416 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1417 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1418 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1419 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1420 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1421 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1422 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1423 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1424 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1425 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1426 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1427 </files>
1428 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1429
1430 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1431 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="1.0" condition="RTOS RTX5 Dependency">
1432 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1433 <RTE_Components_h>
1434 <!-- the following content goes into file 'RTE_Components.h' -->
1435 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1436 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
1437 </RTE_Components_h>
1438 <files>
1439 <!-- RTX header file -->
1440 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
1441 <!-- RTX compatibility module for API V1 -->
1442 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1443 </files>
1444 </component>
1445
1446 <!-- CMSIS-RTOS2 Keil RTX5 component -->
1447 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTOS2 RTX5 Dependency">
1448 <description>CMSIS-RTOS2 RTX5 implementation for Cortex-M, SC000, and SC300</description>
1449 <RTE_Components_h>
1450 <!-- the following content goes into file 'RTE_Components.h' -->
1451 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
1452 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1453 </RTE_Components_h>
1454 <files>
1455 <!-- RTX documentation -->
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame^]1456 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1457
1458 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]1459 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1460 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
1461
1462 <!-- RTX configuration -->
1463 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1464
1465 <!-- RTX templates -->
1466 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1467 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame^]1468 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
1469
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1470 <!-- RTX libraries (CPU and Compiler dependent) -->
1471 <!-- ARMCC -->
1472 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1473 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1474 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1475 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1476 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1477 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1478 <!-- GCC -->
1479 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1480 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1481 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1482 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1483 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1484 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1485 </files>
1486 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1487 </components>
1488
1489 <boards>
1490 <board name="uVision Simulator" vendor="Keil">
1491 <description>uVision Simulator</description>
1492 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1493 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1494 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1495 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1496 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1497 </board>
1498 </boards>
1499
1500 <examples>
1501 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1502 <description>DSP_Lib Class Marks example</description>
1503 <board name="uVision Simulator" vendor="Keil"/>
1504 <project>
1505 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1506 </project>
1507 <attributes>
1508 <component Cclass="CMSIS" Cgroup="CORE"/>
1509 <component Cclass="CMSIS" Cgroup="DSP"/>
1510 <component Cclass="Device" Cgroup="Startup"/>
1511 <category>Getting Started</category>
1512 </attributes>
1513 </example>
1514
1515 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1516 <description>DSP_Lib Convolution example</description>
1517 <board name="uVision Simulator" vendor="Keil"/>
1518 <project>
1519 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1520 </project>
1521 <attributes>
1522 <component Cclass="CMSIS" Cgroup="CORE"/>
1523 <component Cclass="CMSIS" Cgroup="DSP"/>
1524 <component Cclass="Device" Cgroup="Startup"/>
1525 <category>Getting Started</category>
1526 </attributes>
1527 </example>
1528
1529 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1530 <description>DSP_Lib Dotproduct example</description>
1531 <board name="uVision Simulator" vendor="Keil"/>
1532 <project>
1533 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1534 </project>
1535 <attributes>
1536 <component Cclass="CMSIS" Cgroup="CORE"/>
1537 <component Cclass="CMSIS" Cgroup="DSP"/>
1538 <component Cclass="Device" Cgroup="Startup"/>
1539 <category>Getting Started</category>
1540 </attributes>
1541 </example>
1542
1543 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1544 <description>DSP_Lib FFT Bin example</description>
1545 <board name="uVision Simulator" vendor="Keil"/>
1546 <project>
1547 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1548 </project>
1549 <attributes>
1550 <component Cclass="CMSIS" Cgroup="CORE"/>
1551 <component Cclass="CMSIS" Cgroup="DSP"/>
1552 <component Cclass="Device" Cgroup="Startup"/>
1553 <category>Getting Started</category>
1554 </attributes>
1555 </example>
1556
1557 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1558 <description>DSP_Lib FIR example</description>
1559 <board name="uVision Simulator" vendor="Keil"/>
1560 <project>
1561 <environment name="uv" load="arm_fir_example.uvprojx"/>
1562 </project>
1563 <attributes>
1564 <component Cclass="CMSIS" Cgroup="CORE"/>
1565 <component Cclass="CMSIS" Cgroup="DSP"/>
1566 <component Cclass="Device" Cgroup="Startup"/>
1567 <category>Getting Started</category>
1568 </attributes>
1569 </example>
1570
1571 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1572 <description>DSP_Lib Graphic Equalizer example</description>
1573 <board name="uVision Simulator" vendor="Keil"/>
1574 <project>
1575 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1576 </project>
1577 <attributes>
1578 <component Cclass="CMSIS" Cgroup="CORE"/>
1579 <component Cclass="CMSIS" Cgroup="DSP"/>
1580 <component Cclass="Device" Cgroup="Startup"/>
1581 <category>Getting Started</category>
1582 </attributes>
1583 </example>
1584
1585 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1586 <description>DSP_Lib Linear Interpolation example</description>
1587 <board name="uVision Simulator" vendor="Keil"/>
1588 <project>
1589 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1590 </project>
1591 <attributes>
1592 <component Cclass="CMSIS" Cgroup="CORE"/>
1593 <component Cclass="CMSIS" Cgroup="DSP"/>
1594 <component Cclass="Device" Cgroup="Startup"/>
1595 <category>Getting Started</category>
1596 </attributes>
1597 </example>
1598
1599 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1600 <description>DSP_Lib Matrix example</description>
1601 <board name="uVision Simulator" vendor="Keil"/>
1602 <project>
1603 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1604 </project>
1605 <attributes>
1606 <component Cclass="CMSIS" Cgroup="CORE"/>
1607 <component Cclass="CMSIS" Cgroup="DSP"/>
1608 <component Cclass="Device" Cgroup="Startup"/>
1609 <category>Getting Started</category>
1610 </attributes>
1611 </example>
1612
1613 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1614 <description>DSP_Lib Signal Convergence example</description>
1615 <board name="uVision Simulator" vendor="Keil"/>
1616 <project>
1617 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1618 </project>
1619 <attributes>
1620 <component Cclass="CMSIS" Cgroup="CORE"/>
1621 <component Cclass="CMSIS" Cgroup="DSP"/>
1622 <component Cclass="Device" Cgroup="Startup"/>
1623 <category>Getting Started</category>
1624 </attributes>
1625 </example>
1626
1627 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1628 <description>DSP_Lib Sinus/Cosinus example</description>
1629 <board name="uVision Simulator" vendor="Keil"/>
1630 <project>
1631 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1632 </project>
1633 <attributes>
1634 <component Cclass="CMSIS" Cgroup="CORE"/>
1635 <component Cclass="CMSIS" Cgroup="DSP"/>
1636 <component Cclass="Device" Cgroup="Startup"/>
1637 <category>Getting Started</category>
1638 </attributes>
1639 </example>
1640
1641 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1642 <description>DSP_Lib Variance example</description>
1643 <board name="uVision Simulator" vendor="Keil"/>
1644 <project>
1645 <environment name="uv" load="arm_variance_example.uvprojx"/>
1646 </project>
1647 <attributes>
1648 <component Cclass="CMSIS" Cgroup="CORE"/>
1649 <component Cclass="CMSIS" Cgroup="DSP"/>
1650 <component Cclass="Device" Cgroup="Startup"/>
1651 <category>Getting Started</category>
1652 </attributes>
1653 </example>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame^]1654
1655 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
1656 <description>CMSIS-RTOS2 Blinky example</description>
1657 <board name="uVision Simulator" vendor="Keil"/>
1658 <project>
1659 <environment name="uv" load="Blinky.uvprojx"/>
1660 </project>
1661 <attributes>
1662 <component Cclass="CMSIS" Cgroup="CORE"/>
1663 <component Cclass="CMSIS" Cgroup="RTOS2"/>
1664 <component Cclass="Device" Cgroup="Startup"/>
1665 <category>Getting Started</category>
1666 </attributes>
1667 </example>
1668
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1669 </examples>
1670
1671</package>