blob: 51050564a14ad4079242e5ff3a6d4b4e5e400349 [file] [log] [blame]
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -05001#!/usr/bin/env bash
Fathi Boudra422bf772019-12-02 11:10:16 +02002#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050027export CROSS_COMPILE=aarch64-none-elf-
Fathi Boudra422bf772019-12-02 11:10:16 +020028
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050029containing_dir="$(readlink -f "$(dirname "$0")/")"
30. $containing_dir/common-def.sh
31
Fathi Boudra422bf772019-12-02 11:10:16 +020032# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
33# support. The version of mbed TLS to use here must be the same as when
34# building TF in the usual context.
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050035if [ ! -d "$MBED_TLS_DIR" ]; then
36 git clone -q --depth 1 -b "$MBED_TLS_SOURCES_TAG" "$MBED_TLS_URL_REPO" "$MBED_TLS_DIR"
Fathi Boudra422bf772019-12-02 11:10:16 +020037fi
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050038
Fathi Boudra422bf772019-12-02 11:10:16 +020039TBB_OPTIONS="TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$(pwd)/mbedtls"
40ARM_TBB_OPTIONS="$TBB_OPTIONS ARM_ROTPK_LOCATION=devel_rsa"
41
42cd "$TF_SOURCES"
43
44# Clean TF source dir to make sure we don't analyse temporary files.
45make distclean
46
47#
48# Build TF in different configurations to get as much coverage as possible
49#
50
51# We need to clean the platform build between each configuration because Trusted
52# Firmware's build system doesn't track build options dependencies and won't
53# rebuild the files affected by build options changes.
54clean_build()
55{
56 local flags="$*"
57 echo "Building TF with the following build flags:"
58 echo " $flags"
59 make $flags clean
60 make $flags all
61 echo "Build config complete."
62 echo
63}
64
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050065# Defines common flags between platforms
66common_flags() {
67 local release="${1:-}"
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050068 local num_cpus="$(/usr/bin/getconf _NPROCESSORS_ONLN)"
69 local parallel_make="-j $num_cpus"
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050070
71 # default to debug mode, unless a parameter is passed to the function
72 debug="DEBUG=1"
73 [ -n "$release" ] && debug=""
74
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050075 echo " $parallel_make $debug -s "
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050076}
77
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -050078# Check if execution environment is ARM's jenkins (Jenkins running under ARM
79# infraestructure)
80is_arm_jenkins_env() {
81 if [ "$JENKINS_HOME" ]; then
82 if echo "$JENKINS_URL" | grep "arm.com"; then
83 return 0;
84 fi
85 fi
86 return 1
87}
88
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -060089set_cross_compile_gcc_linaro_toolchain() {
90 local cross_compile_path="/home/buildslave/tools"
91
92 # if under arm enviroment, overide cross-compilation path
93 is_arm_jenkins_env && cross_compile_path="/arm/pdsw/tools"
94
95 echo "${cross_compile_path}/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-"
96}
97
Fathi Boudra422bf772019-12-02 11:10:16 +020098#
99# FVP platform
100# We'll use the following flags for all FVP builds.
101#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500102fvp_common_flags="$(common_flags) PLAT=fvp"
Fathi Boudra422bf772019-12-02 11:10:16 +0200103
104# Try all possible SPDs.
105clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
106clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
107 TSP_NS_INTR_ASYNC_PREEMPT=1
108clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
109clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
110
Zelalemc9531f82020-08-04 15:37:08 -0500111# Dualroot chain of trust.
112clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
113
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500114clean_build $fvp_common_flags SPD=trusty
115clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200116
117# SDEI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500118clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200119
Zelalemc9531f82020-08-04 15:37:08 -0500120# SDEI with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500121clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Zelalemc9531f82020-08-04 15:37:08 -0500122
123# Secure interrupt descriptors with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500124clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1
Zelalemc9531f82020-08-04 15:37:08 -0500125
Fathi Boudra422bf772019-12-02 11:10:16 +0200126# Without coherent memory
127clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
128
129# Using PSCI extended State ID format rather than the original format
130clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
131 ARM_RECOM_STATE_ID_ENC=1
132
133# Alternative boot flows (This changes some of the platform initialisation code)
134clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
135clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
136
137# Using the SP804 timer instead of the Generic Timer
138clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
139
140# Using the CCN driver and multi cluster topology
141clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
142
143# PMF
144clean_build $fvp_common_flags ENABLE_PMF=1
145
146# stack protector
147clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
148
149# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500150clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200151 ARCH=aarch32 AARCH32_SP=sp_min \
152 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500153clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200154 ARCH=aarch32 AARCH32_SP=sp_min
155
156# Xlat tables lib version 1 (AArch64 and AArch32)
157clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500158clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200159 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
160
Zelalemc9531f82020-08-04 15:37:08 -0500161# SPM support based on Management Mode Interface Specification
162clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200163
Zelalemc9531f82020-08-04 15:37:08 -0500164# SPM support with TOS(optee) as SPM sitting at S-EL1
165clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
166
167# SPM support with Secure hafnium as SPM sitting at S-EL2
168# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
169# if we have NULL value to it, so passing a dummy string.
170clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
171 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200172
173#BL2 at EL3 support
174clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500175clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200176 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
177
Zelalemc9531f82020-08-04 15:37:08 -0500178# RAS Extension Support
179clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
180 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
181 SDEI_SUPPORT=1
182
183# Hardware Assisted Coherency(DynamIQ)
184clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
185 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
186
187# Pointer Authentication Support
188clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
189 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
190
191# Undefined Behaviour Sanitizer
192# Building with UBSAN SANITIZE_UB=on increases the executable size.
193# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
194make $fvp_common_flags clean
195make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
196
197# debugfs feature
198clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
199
200# MPAM feature
201clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
202
203# Using GICv3.1 driver with extended PPI and SPI range
204clean_build $fvp_common_flags GIC_EXT_INTID=1
205
206# Using GICv4 features with extended PPI and SPI range
207clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
208
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100209# Measured Boot
210clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
211
Manish V Badarkhe447e31a2020-09-03 07:57:17 +0100212# CoT descriptors in device tree
Manish V Badarkhe81102d12020-10-05 08:02:30 +0100213clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} COT_DESC_IN_DTB=1 USE_ROMLIB=1
Manish V Badarkhe447e31a2020-09-03 07:57:17 +0100214
Fathi Boudra422bf772019-12-02 11:10:16 +0200215#
216# Juno platform
217# We'll use the following flags for all Juno builds.
218#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500219juno_common_flags="$(common_flags) PLAT=juno"
Fathi Boudra422bf772019-12-02 11:10:16 +0200220clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
221clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
222clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong
223clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500224
225is_arm_jenkins_env && \
226 clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200227
228#
229# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500230# Enable build config with RAS_EXTENSION to cover more files
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500231make $(common_flags) PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500232 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200233#
Zelalemc9531f82020-08-04 15:37:08 -0500234# System Guidance for Mobile platform SGM775
235#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500236make $(common_flags) PLAT=sgm775 ${ARM_TBB_OPTIONS} SPD=tspd \
Zelalemc9531f82020-08-04 15:37:08 -0500237 CSS_USE_SCMI_SDS_DRIVER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200238
239#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530240# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200241#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500242make $(common_flags) PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200243
244#
245# System Guidance for Infrastructure platform RD-E1Edge
246#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500247make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500248
249#
250# System Guidance for Infrastructure platform RD-Daniel
251#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500252make $(common_flags) PLAT=rddaniel ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500253
254#
255# System Guidance for Infrastructure platform RD-Danielxlr
256#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500257make $(common_flags) PLAT=rddanielxlr ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
Zelalemc9531f82020-08-04 15:37:08 -0500258
259#
260# Neoverse N1 SDP platform
261#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500262make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500263
264#
265# FVP VE platform
266#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500267make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500268 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
269 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
270 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
271
272#
273# A5 DesignStart Platform
274#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500275make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500276 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
277 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
278
279#
280# Corstone700 Platform
281#
282
283corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500284 $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500285 PLAT=corstone700 \
286 ARCH=aarch32 \
287 RESET_TO_SP_MIN=1 \
288 AARCH32_SP=sp_min \
289 ARM_LINUX_KERNEL_AS_BL33=0 \
290 ARM_PRELOADED_DTB_BASE=0x80400000 \
291 ENABLE_PIE=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500292 ENABLE_STACK_PROTECTOR=all \
293 all"
294
295echo "Info: Building Corstone700 FVP ..."
296
297make TARGET_PLATFORM=fvp ${corstone700_common_flags}
298
299echo "Info: Building Corstone700 FPGA ..."
300
301make TARGET_PLATFORM=fpga ${corstone700_common_flags}
302
303#
304# Arm internal FPGA port
305#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500306make PLAT=arm_fpga $(common_flags) CROSS_COMPILE=aarch64-none-elf- \
Zelalemc9531f82020-08-04 15:37:08 -0500307 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
308
309#
310# Total Compute platform
311#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500312make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200313
Chandni Cherukurifb803e12020-10-01 17:49:08 +0530314#
315# Morello platform
316#
317make $(common_flags) PLAT=morello all
318
Fathi Boudra422bf772019-12-02 11:10:16 +0200319# Partners' platforms.
320# Enable as many features as possible.
321# We don't need to clean between each build here because we only do one build
322# per platform so we don't hit the build flags dependency problem.
Fathi Boudra422bf772019-12-02 11:10:16 +0200323
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500324make PLAT=mt8173 $(common_flags) all
325make PLAT=mt8183 $(common_flags) all
Zelalemd86e8762020-08-21 18:24:28 -0500326make PLAT=mt8192 $(common_flags) COREBOOT=1 all
327
328# Platforms from Qualcomm
329make PLAT=sc7180 $(common_flags) COREBOOT=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200330
Zelalemc9531f82020-08-04 15:37:08 -0500331make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500332 $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all
333make PLAT=rk3368 $(common_flags) COREBOOT=1 all
334make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 all
335make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 all
336make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200337
338# Although we do several consecutive builds for the Tegra platform below, we
339# don't need to clean between each one because the Tegra makefiles specify
340# a different build directory per SoC.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500341make PLAT=tegra TARGET_SOC=t210 $(common_flags) all
342make PLAT=tegra TARGET_SOC=t132 $(common_flags) all
343make PLAT=tegra TARGET_SOC=t186 $(common_flags) all
344make PLAT=tegra TARGET_SOC=t194 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200345
346# For the Xilinx platform, artificially increase the extents of BL31 memory
347# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
348# If we keep the default values, BL31 doesn't fit when it is built with all
349# these build flags.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500350make PLAT=zynqmp $(common_flags) \
Fathi Boudra422bf772019-12-02 11:10:16 +0200351 RESET_TO_BL31=1 SPD=tspd \
352 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
353 all
354
Zelalemc9531f82020-08-04 15:37:08 -0500355# Build both for silicon (default) and virtual QEMU platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500356clean_build PLAT=versal $(common_flags)
357clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt
Zelalemc9531f82020-08-04 15:37:08 -0500358
359# Platforms from Allwinner
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500360make PLAT=sun50i_a64 $(common_flags) all
361make PLAT=sun50i_h6 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500362
363# Platforms from i.MX
364make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
365 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500366 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500367make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500368 $(common_flags) all
369make PLAT=imx8mm $(common_flags) all
370make PLAT=imx8mn $(common_flags) all
371make PLAT=imx8mp $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500372
373# Temporarily building in release mode until the following ticket is resolved:
374# https://developer.trustedfirmware.org/T626
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500375# make PLAT=imx8mq $(common_flags) all
376make PLAT=imx8mq $(common_flags release) all
Zelalemc9531f82020-08-04 15:37:08 -0500377
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500378make PLAT=imx8qm $(common_flags) all
379make PLAT=imx8qx $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500380
381# Platforms from Intel
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500382make PLAT=stratix10 $(common_flags) all
383make PLAT=agilex $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500384
385# Platforms from Broadcom
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500386clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1
387clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
Zelalemc9531f82020-08-04 15:37:08 -0500388
389# Platforms from Marvell
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500390make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null all
Zelalemc9531f82020-08-04 15:37:08 -0500391
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500392if is_arm_jenkins_env; then
393 # Source files from mv-ddr-marvell repository are necessary
394 # to build below four platforms
395 wget http://files.oss.arm.com/downloads/tf-a/mv-ddr-marvell/mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
396 tar -xzf mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
397 mv mv-ddr-marvell drivers/marvell/mv_ddr
Zelalemc9531f82020-08-04 15:37:08 -0500398
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500399 # These platforms from Marvell have dependency on GCC-6.2.1 toolchain
400 make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600401 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500402 make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600403 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500404 make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600405 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500406 make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600407 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500408 make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600409 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Zelalemd86e8762020-08-21 18:24:28 -0500410 make PLAT=t9130 DEBUG=1 SCP_BL2=/dev/null \
Leonardo Sandovalfeae3a22020-11-17 16:53:59 -0600411 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500412
413 # Removing the source files
414 rm -rf drivers/marvell/mv_ddr 2> /dev/null
415fi
Zelalemc9531f82020-08-04 15:37:08 -0500416
417# Platforms from Meson
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500418make PLAT=gxbb $(common_flags) all
419make PLAT=gxl $(common_flags) all
420make PLAT=g12a $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500421
422# Platforms from Renesas
423# Renesas R-Car D3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500424clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500425 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
426 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
427 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
428 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
429
430# Renesas R-Car H3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500431clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500432 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
433 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
434 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
435 TRUSTED_BOARD_BOOT=1
436
437# Renesas R-Car H3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500438clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500439 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
440 SPD=opteed TRUSTED_BOARD_BOOT=1
441
442# Renesas R-Car M3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500443clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500444 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
445 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
446 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
447 TRUSTED_BOARD_BOOT=1
448
449# Renesas R-Car M3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500450clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500451 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
452 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
453 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
454
455# Renesas R-Car E3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500456clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500457 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
458 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
459 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
460
461# Renesas R-Car V3M Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500462clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500463 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
464 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
465 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
466
467# Platforms from ST
468make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500469 $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500470 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
471 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
472
473# Platforms from TI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500474make PLAT=k3 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500475
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500476clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500477# Use GICV3 driver
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500478clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
Zelalemc9531f82020-08-04 15:37:08 -0500479 ENABLE_STACK_PROTECTOR=strong
480# Use encrypted FIP feature.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500481clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500482 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
483 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
484
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500485clean_build PLAT=qemu_sbsa $(common_flags)
Fathi Boudra422bf772019-12-02 11:10:16 +0200486
Zelalemd86e8762020-08-21 18:24:28 -0500487# QEMU with SPM support
488clean_build PLAT=qemu_sbsa $(common_flags) BL32=Makefile SPM_MM=1 \
489 EL3_EXCEPTION_HANDLING=1
490
Fathi Boudra422bf772019-12-02 11:10:16 +0200491# For hikey enable PMF to include all files in the platform port
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500492make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
493make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
494make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200495
Zelalemc9531f82020-08-04 15:37:08 -0500496# Platforms from Socionext
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500497clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd
498clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200499
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500500clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500501 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
502
503# Support for SCP Message Interface protocol with platform specific drivers
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500504clean_build PLAT=synquacer $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500505 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
506
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500507make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200508
Zelalemc9531f82020-08-04 15:37:08 -0500509# Raspberry Pi Platforms
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500510make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500511 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500512make PLAT=rpi4 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200513
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500514# Cannot use $(common_flags) for LS1043 platform, as then
Fathi Boudra422bf772019-12-02 11:10:16 +0200515# the binaries do not fit in memory.
516clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
517clean_build PLAT=ls1043 SPD=tspd
518
Zelalemc9531f82020-08-04 15:37:08 -0500519# A113D (AXG) platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500520clean_build PLAT=axg $(common_flags) SPD=opteed
521clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1
Zelalemc9531f82020-08-04 15:37:08 -0500522
Fathi Boudra422bf772019-12-02 11:10:16 +0200523cd ..