blob: 67a244fa5b590699cf45f375f0e6b815f72b20ca [file] [log] [blame]
Fathi Boudra422bf772019-12-02 11:10:16 +02001#! /bin/sh
2#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050027export CROSS_COMPILE=aarch64-none-elf-
Fathi Boudra422bf772019-12-02 11:10:16 +020028
29# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
30# support. The version of mbed TLS to use here must be the same as when
31# building TF in the usual context.
32if [ ! -d mbedtls ]; then
33 git clone https://github.com/ARMmbed/mbedtls.git
34fi
35cd mbedtls
36containing_dir="$(readlink -f "$(dirname "$0")/")"
37. $containing_dir/common-def.sh
38git checkout "$MBED_TLS_SOURCES_TAG"
39cd -
40TBB_OPTIONS="TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$(pwd)/mbedtls"
41ARM_TBB_OPTIONS="$TBB_OPTIONS ARM_ROTPK_LOCATION=devel_rsa"
42
43cd "$TF_SOURCES"
44
45# Clean TF source dir to make sure we don't analyse temporary files.
46make distclean
47
48#
49# Build TF in different configurations to get as much coverage as possible
50#
51
52# We need to clean the platform build between each configuration because Trusted
53# Firmware's build system doesn't track build options dependencies and won't
54# rebuild the files affected by build options changes.
55clean_build()
56{
57 local flags="$*"
58 echo "Building TF with the following build flags:"
59 echo " $flags"
60 make $flags clean
61 make $flags all
62 echo "Build config complete."
63 echo
64}
65
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050066# Defines common flags between platforms
67common_flags() {
68 local release="${1:-}"
69
70 # default to debug mode, unless a parameter is passed to the function
71 debug="DEBUG=1"
72 [ -n "$release" ] && debug=""
73
74 echo " -j $debug -s "
75}
76
Fathi Boudra422bf772019-12-02 11:10:16 +020077#
78# FVP platform
79# We'll use the following flags for all FVP builds.
80#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050081fvp_common_flags="$(common_flags) PLAT=fvp"
Fathi Boudra422bf772019-12-02 11:10:16 +020082
83# Try all possible SPDs.
84clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
85clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
86 TSP_NS_INTR_ASYNC_PREEMPT=1
87clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
88clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
89
Zelalemc9531f82020-08-04 15:37:08 -050090# Dualroot chain of trust.
91clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
92
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050093clean_build $fvp_common_flags SPD=trusty
94clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
Fathi Boudra422bf772019-12-02 11:10:16 +020095
96# SDEI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050097clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +020098
Zelalemc9531f82020-08-04 15:37:08 -050099# SDEI with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500100clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Zelalemc9531f82020-08-04 15:37:08 -0500101
102# Secure interrupt descriptors with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500103clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1
Zelalemc9531f82020-08-04 15:37:08 -0500104
Fathi Boudra422bf772019-12-02 11:10:16 +0200105# Without coherent memory
106clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
107
108# Using PSCI extended State ID format rather than the original format
109clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
110 ARM_RECOM_STATE_ID_ENC=1
111
112# Alternative boot flows (This changes some of the platform initialisation code)
113clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
114clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
115
116# Using the SP804 timer instead of the Generic Timer
117clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
118
119# Using the CCN driver and multi cluster topology
120clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
121
122# PMF
123clean_build $fvp_common_flags ENABLE_PMF=1
124
125# stack protector
126clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
127
128# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500129clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200130 ARCH=aarch32 AARCH32_SP=sp_min \
131 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500132clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200133 ARCH=aarch32 AARCH32_SP=sp_min
134
135# Xlat tables lib version 1 (AArch64 and AArch32)
136clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500137clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200138 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
139
Zelalemc9531f82020-08-04 15:37:08 -0500140# SPM support based on Management Mode Interface Specification
141clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200142
Zelalemc9531f82020-08-04 15:37:08 -0500143# SPM support with TOS(optee) as SPM sitting at S-EL1
144clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
145
146# SPM support with Secure hafnium as SPM sitting at S-EL2
147# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
148# if we have NULL value to it, so passing a dummy string.
149clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
150 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200151
152#BL2 at EL3 support
153clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500154clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200155 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
156
Zelalemc9531f82020-08-04 15:37:08 -0500157# RAS Extension Support
158clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
159 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
160 SDEI_SUPPORT=1
161
162# Hardware Assisted Coherency(DynamIQ)
163clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
164 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
165
166# Pointer Authentication Support
167clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
168 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
169
170# Undefined Behaviour Sanitizer
171# Building with UBSAN SANITIZE_UB=on increases the executable size.
172# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
173make $fvp_common_flags clean
174make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
175
176# debugfs feature
177clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
178
179# MPAM feature
180clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
181
182# Using GICv3.1 driver with extended PPI and SPI range
183clean_build $fvp_common_flags GIC_EXT_INTID=1
184
185# Using GICv4 features with extended PPI and SPI range
186clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
187
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100188# Measured Boot
189clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
190
Fathi Boudra422bf772019-12-02 11:10:16 +0200191#
192# Juno platform
193# We'll use the following flags for all Juno builds.
194#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500195juno_common_flags="$(common_flags) PLAT=juno"
Fathi Boudra422bf772019-12-02 11:10:16 +0200196clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
197clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
198clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong
199clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Zelalemc9531f82020-08-04 15:37:08 -0500200clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200201
202#
203# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500204# Enable build config with RAS_EXTENSION to cover more files
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500205make $(common_flags) PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500206 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200207#
Zelalemc9531f82020-08-04 15:37:08 -0500208# System Guidance for Mobile platform SGM775
209#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500210make $(common_flags) PLAT=sgm775 ${ARM_TBB_OPTIONS} SPD=tspd \
Zelalemc9531f82020-08-04 15:37:08 -0500211 CSS_USE_SCMI_SDS_DRIVER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200212
213#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530214# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200215#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500216make $(common_flags) PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200217
218#
219# System Guidance for Infrastructure platform RD-E1Edge
220#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500221make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500222
223#
224# System Guidance for Infrastructure platform RD-Daniel
225#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500226make $(common_flags) PLAT=rddaniel ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500227
228#
229# System Guidance for Infrastructure platform RD-Danielxlr
230#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500231make $(common_flags) PLAT=rddanielxlr ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
Zelalemc9531f82020-08-04 15:37:08 -0500232
233#
234# Neoverse N1 SDP platform
235#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500236make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500237
238#
239# FVP VE platform
240#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500241make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500242 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
243 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
244 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
245
246#
247# A5 DesignStart Platform
248#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500249make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500250 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
251 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
252
253#
254# Corstone700 Platform
255#
256
257corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500258 $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500259 PLAT=corstone700 \
260 ARCH=aarch32 \
261 RESET_TO_SP_MIN=1 \
262 AARCH32_SP=sp_min \
263 ARM_LINUX_KERNEL_AS_BL33=0 \
264 ARM_PRELOADED_DTB_BASE=0x80400000 \
265 ENABLE_PIE=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500266 ENABLE_STACK_PROTECTOR=all \
267 all"
268
269echo "Info: Building Corstone700 FVP ..."
270
271make TARGET_PLATFORM=fvp ${corstone700_common_flags}
272
273echo "Info: Building Corstone700 FPGA ..."
274
275make TARGET_PLATFORM=fpga ${corstone700_common_flags}
276
277#
278# Arm internal FPGA port
279#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500280make PLAT=arm_fpga $(common_flags) CROSS_COMPILE=aarch64-none-elf- \
Zelalemc9531f82020-08-04 15:37:08 -0500281 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
282
283#
284# Total Compute platform
285#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500286make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200287
288# Partners' platforms.
289# Enable as many features as possible.
290# We don't need to clean between each build here because we only do one build
291# per platform so we don't hit the build flags dependency problem.
Fathi Boudra422bf772019-12-02 11:10:16 +0200292
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500293make PLAT=mt8173 $(common_flags) all
294make PLAT=mt8183 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200295
Zelalemc9531f82020-08-04 15:37:08 -0500296make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500297 $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all
298make PLAT=rk3368 $(common_flags) COREBOOT=1 all
299make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 all
300make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 all
301make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200302
303# Although we do several consecutive builds for the Tegra platform below, we
304# don't need to clean between each one because the Tegra makefiles specify
305# a different build directory per SoC.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500306make PLAT=tegra TARGET_SOC=t210 $(common_flags) all
307make PLAT=tegra TARGET_SOC=t132 $(common_flags) all
308make PLAT=tegra TARGET_SOC=t186 $(common_flags) all
309make PLAT=tegra TARGET_SOC=t194 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200310
311# For the Xilinx platform, artificially increase the extents of BL31 memory
312# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
313# If we keep the default values, BL31 doesn't fit when it is built with all
314# these build flags.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500315make PLAT=zynqmp $(common_flags) \
Fathi Boudra422bf772019-12-02 11:10:16 +0200316 RESET_TO_BL31=1 SPD=tspd \
317 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
318 all
319
Zelalemc9531f82020-08-04 15:37:08 -0500320# Build both for silicon (default) and virtual QEMU platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500321clean_build PLAT=versal $(common_flags)
322clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt
Zelalemc9531f82020-08-04 15:37:08 -0500323
324# Platforms from Allwinner
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500325make PLAT=sun50i_a64 $(common_flags) all
326make PLAT=sun50i_h6 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500327
328# Platforms from i.MX
329make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
330 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500331 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500332make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500333 $(common_flags) all
334make PLAT=imx8mm $(common_flags) all
335make PLAT=imx8mn $(common_flags) all
336make PLAT=imx8mp $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500337
338# Temporarily building in release mode until the following ticket is resolved:
339# https://developer.trustedfirmware.org/T626
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500340# make PLAT=imx8mq $(common_flags) all
341make PLAT=imx8mq $(common_flags release) all
Zelalemc9531f82020-08-04 15:37:08 -0500342
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500343make PLAT=imx8qm $(common_flags) all
344make PLAT=imx8qx $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500345
346# Platforms from Intel
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500347make PLAT=stratix10 $(common_flags) all
348make PLAT=agilex $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500349
350# Platforms from Broadcom
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500351clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1
352clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
Zelalemc9531f82020-08-04 15:37:08 -0500353
354# Platforms from Marvell
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500355make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null all
Zelalemc9531f82020-08-04 15:37:08 -0500356# Source files from mv-ddr-marvell repository are necessary
357# to build below four platforms
358wget http://files.oss.arm.com/downloads/tf-a/mv-ddr-marvell/mv-ddr-marvell-a881467ef0f0185e6570dd0483023fde93cbb5f5.tar.gz 2> /dev/null
359tar -xzf mv-ddr-marvell-a881467ef0f0185e6570dd0483023fde93cbb5f5.tar.gz 2> /dev/null
360mv mv-ddr-marvell drivers/marvell/mv_ddr
361
362# These platforms from Marvell have dependency on GCC-6.2.1 toolchain
363make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
364 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
365make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
366 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
367make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
368 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
369make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
370 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
371make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
372 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
373
374# Removing the source files
375rm -rf drivers/marvell/mv_ddr 2> /dev/null
376
377# Platforms from Meson
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500378make PLAT=gxbb $(common_flags) all
379make PLAT=gxl $(common_flags) all
380make PLAT=g12a $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500381
382# Platforms from Renesas
383# Renesas R-Car D3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500384clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500385 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
386 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
387 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
388 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
389
390# Renesas R-Car H3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500391clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500392 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
393 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
394 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
395 TRUSTED_BOARD_BOOT=1
396
397# Renesas R-Car H3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500398clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500399 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
400 SPD=opteed TRUSTED_BOARD_BOOT=1
401
402# Renesas R-Car M3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500403clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500404 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
405 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
406 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
407 TRUSTED_BOARD_BOOT=1
408
409# Renesas R-Car M3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500410clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500411 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
412 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
413 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
414
415# Renesas R-Car E3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500416clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500417 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
418 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
419 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
420
421# Renesas R-Car V3M Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500422clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500423 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
424 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
425 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
426
427# Platforms from ST
428make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500429 $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500430 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
431 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
432
433# Platforms from TI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500434make PLAT=k3 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500435
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500436clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500437# Use GICV3 driver
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500438clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
Zelalemc9531f82020-08-04 15:37:08 -0500439 ENABLE_STACK_PROTECTOR=strong
440# Use encrypted FIP feature.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500441clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500442 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
443 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
444
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500445clean_build PLAT=qemu_sbsa $(common_flags)
Fathi Boudra422bf772019-12-02 11:10:16 +0200446
447# For hikey enable PMF to include all files in the platform port
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500448make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
449make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
450make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200451
Zelalemc9531f82020-08-04 15:37:08 -0500452# Platforms from Socionext
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500453clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd
454clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200455
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500456clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500457 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
458
459# Support for SCP Message Interface protocol with platform specific drivers
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500460clean_build PLAT=synquacer $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500461 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
462
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500463make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200464
Zelalemc9531f82020-08-04 15:37:08 -0500465# Raspberry Pi Platforms
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500466make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500467 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500468make PLAT=rpi4 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200469
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500470# Cannot use $(common_flags) for LS1043 platform, as then
Fathi Boudra422bf772019-12-02 11:10:16 +0200471# the binaries do not fit in memory.
472clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
473clean_build PLAT=ls1043 SPD=tspd
474
Zelalemc9531f82020-08-04 15:37:08 -0500475# A113D (AXG) platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500476clean_build PLAT=axg $(common_flags) SPD=opteed
477clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1
Zelalemc9531f82020-08-04 15:37:08 -0500478
Fathi Boudra422bf772019-12-02 11:10:16 +0200479cd ..