blob: 26c38a0871f7caae0dce1ef83988727dcb4626d7 [file] [log] [blame]
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -05001#!/usr/bin/env bash
Fathi Boudra422bf772019-12-02 11:10:16 +02002#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050027export CROSS_COMPILE=aarch64-none-elf-
Fathi Boudra422bf772019-12-02 11:10:16 +020028
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050029containing_dir="$(readlink -f "$(dirname "$0")/")"
30. $containing_dir/common-def.sh
31
Fathi Boudra422bf772019-12-02 11:10:16 +020032# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
33# support. The version of mbed TLS to use here must be the same as when
34# building TF in the usual context.
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050035if [ ! -d "$MBED_TLS_DIR" ]; then
36 git clone -q --depth 1 -b "$MBED_TLS_SOURCES_TAG" "$MBED_TLS_URL_REPO" "$MBED_TLS_DIR"
Fathi Boudra422bf772019-12-02 11:10:16 +020037fi
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050038
Fathi Boudra422bf772019-12-02 11:10:16 +020039TBB_OPTIONS="TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$(pwd)/mbedtls"
40ARM_TBB_OPTIONS="$TBB_OPTIONS ARM_ROTPK_LOCATION=devel_rsa"
41
42cd "$TF_SOURCES"
43
44# Clean TF source dir to make sure we don't analyse temporary files.
45make distclean
46
47#
48# Build TF in different configurations to get as much coverage as possible
49#
50
51# We need to clean the platform build between each configuration because Trusted
52# Firmware's build system doesn't track build options dependencies and won't
53# rebuild the files affected by build options changes.
54clean_build()
55{
56 local flags="$*"
57 echo "Building TF with the following build flags:"
58 echo " $flags"
59 make $flags clean
60 make $flags all
61 echo "Build config complete."
62 echo
63}
64
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050065# Defines common flags between platforms
66common_flags() {
67 local release="${1:-}"
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050068 local num_cpus="$(/usr/bin/getconf _NPROCESSORS_ONLN)"
69 local parallel_make="-j $num_cpus"
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050070
71 # default to debug mode, unless a parameter is passed to the function
72 debug="DEBUG=1"
73 [ -n "$release" ] && debug=""
74
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050075 echo " $parallel_make $debug -s "
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050076}
77
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -050078# Check if execution environment is ARM's jenkins (Jenkins running under ARM
79# infraestructure)
80is_arm_jenkins_env() {
81 if [ "$JENKINS_HOME" ]; then
82 if echo "$JENKINS_URL" | grep "arm.com"; then
83 return 0;
84 fi
85 fi
86 return 1
87}
88
Fathi Boudra422bf772019-12-02 11:10:16 +020089#
90# FVP platform
91# We'll use the following flags for all FVP builds.
92#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050093fvp_common_flags="$(common_flags) PLAT=fvp"
Fathi Boudra422bf772019-12-02 11:10:16 +020094
95# Try all possible SPDs.
96clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
97clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
98 TSP_NS_INTR_ASYNC_PREEMPT=1
99clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
100clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
101
Zelalemc9531f82020-08-04 15:37:08 -0500102# Dualroot chain of trust.
103clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
104
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500105clean_build $fvp_common_flags SPD=trusty
106clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200107
108# SDEI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500109clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200110
Zelalemc9531f82020-08-04 15:37:08 -0500111# SDEI with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500112clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Zelalemc9531f82020-08-04 15:37:08 -0500113
114# Secure interrupt descriptors with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500115clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1
Zelalemc9531f82020-08-04 15:37:08 -0500116
Fathi Boudra422bf772019-12-02 11:10:16 +0200117# Without coherent memory
118clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
119
120# Using PSCI extended State ID format rather than the original format
121clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
122 ARM_RECOM_STATE_ID_ENC=1
123
124# Alternative boot flows (This changes some of the platform initialisation code)
125clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
126clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
127
128# Using the SP804 timer instead of the Generic Timer
129clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
130
131# Using the CCN driver and multi cluster topology
132clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
133
134# PMF
135clean_build $fvp_common_flags ENABLE_PMF=1
136
137# stack protector
138clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
139
140# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500141clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200142 ARCH=aarch32 AARCH32_SP=sp_min \
143 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500144clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200145 ARCH=aarch32 AARCH32_SP=sp_min
146
147# Xlat tables lib version 1 (AArch64 and AArch32)
148clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500149clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200150 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
151
Zelalemc9531f82020-08-04 15:37:08 -0500152# SPM support based on Management Mode Interface Specification
153clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200154
Zelalemc9531f82020-08-04 15:37:08 -0500155# SPM support with TOS(optee) as SPM sitting at S-EL1
156clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
157
158# SPM support with Secure hafnium as SPM sitting at S-EL2
159# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
160# if we have NULL value to it, so passing a dummy string.
161clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
162 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200163
164#BL2 at EL3 support
165clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500166clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200167 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
168
Zelalemc9531f82020-08-04 15:37:08 -0500169# RAS Extension Support
170clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
171 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
172 SDEI_SUPPORT=1
173
174# Hardware Assisted Coherency(DynamIQ)
175clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
176 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
177
178# Pointer Authentication Support
179clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
180 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
181
182# Undefined Behaviour Sanitizer
183# Building with UBSAN SANITIZE_UB=on increases the executable size.
184# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
185make $fvp_common_flags clean
186make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
187
188# debugfs feature
189clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
190
191# MPAM feature
192clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
193
194# Using GICv3.1 driver with extended PPI and SPI range
195clean_build $fvp_common_flags GIC_EXT_INTID=1
196
197# Using GICv4 features with extended PPI and SPI range
198clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
199
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100200# Measured Boot
201clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
202
Manish V Badarkhe447e31a2020-09-03 07:57:17 +0100203# CoT descriptors in device tree
204clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} COT_DESC_IN_DTB=1
205
Fathi Boudra422bf772019-12-02 11:10:16 +0200206#
207# Juno platform
208# We'll use the following flags for all Juno builds.
209#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500210juno_common_flags="$(common_flags) PLAT=juno"
Fathi Boudra422bf772019-12-02 11:10:16 +0200211clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
212clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
213clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong
214clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500215
216is_arm_jenkins_env && \
217 clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200218
219#
220# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500221# Enable build config with RAS_EXTENSION to cover more files
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500222make $(common_flags) PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500223 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200224#
Zelalemc9531f82020-08-04 15:37:08 -0500225# System Guidance for Mobile platform SGM775
226#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500227make $(common_flags) PLAT=sgm775 ${ARM_TBB_OPTIONS} SPD=tspd \
Zelalemc9531f82020-08-04 15:37:08 -0500228 CSS_USE_SCMI_SDS_DRIVER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200229
230#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530231# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200232#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500233make $(common_flags) PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200234
235#
236# System Guidance for Infrastructure platform RD-E1Edge
237#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500238make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500239
240#
241# System Guidance for Infrastructure platform RD-Daniel
242#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500243make $(common_flags) PLAT=rddaniel ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500244
245#
246# System Guidance for Infrastructure platform RD-Danielxlr
247#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500248make $(common_flags) PLAT=rddanielxlr ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
Zelalemc9531f82020-08-04 15:37:08 -0500249
250#
251# Neoverse N1 SDP platform
252#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500253make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500254
255#
256# FVP VE platform
257#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500258make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500259 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
260 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
261 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
262
263#
264# A5 DesignStart Platform
265#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500266make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500267 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
268 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
269
270#
271# Corstone700 Platform
272#
273
274corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500275 $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500276 PLAT=corstone700 \
277 ARCH=aarch32 \
278 RESET_TO_SP_MIN=1 \
279 AARCH32_SP=sp_min \
280 ARM_LINUX_KERNEL_AS_BL33=0 \
281 ARM_PRELOADED_DTB_BASE=0x80400000 \
282 ENABLE_PIE=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500283 ENABLE_STACK_PROTECTOR=all \
284 all"
285
286echo "Info: Building Corstone700 FVP ..."
287
288make TARGET_PLATFORM=fvp ${corstone700_common_flags}
289
290echo "Info: Building Corstone700 FPGA ..."
291
292make TARGET_PLATFORM=fpga ${corstone700_common_flags}
293
294#
295# Arm internal FPGA port
296#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500297make PLAT=arm_fpga $(common_flags) CROSS_COMPILE=aarch64-none-elf- \
Zelalemc9531f82020-08-04 15:37:08 -0500298 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
299
300#
301# Total Compute platform
302#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500303make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200304
305# Partners' platforms.
306# Enable as many features as possible.
307# We don't need to clean between each build here because we only do one build
308# per platform so we don't hit the build flags dependency problem.
Fathi Boudra422bf772019-12-02 11:10:16 +0200309
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500310make PLAT=mt8173 $(common_flags) all
311make PLAT=mt8183 $(common_flags) all
Zelalemd86e8762020-08-21 18:24:28 -0500312make PLAT=mt8192 $(common_flags) COREBOOT=1 all
313
314# Platforms from Qualcomm
315make PLAT=sc7180 $(common_flags) COREBOOT=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200316
Zelalemc9531f82020-08-04 15:37:08 -0500317make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500318 $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all
319make PLAT=rk3368 $(common_flags) COREBOOT=1 all
320make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 all
321make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 all
322make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200323
324# Although we do several consecutive builds for the Tegra platform below, we
325# don't need to clean between each one because the Tegra makefiles specify
326# a different build directory per SoC.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500327make PLAT=tegra TARGET_SOC=t210 $(common_flags) all
328make PLAT=tegra TARGET_SOC=t132 $(common_flags) all
329make PLAT=tegra TARGET_SOC=t186 $(common_flags) all
330make PLAT=tegra TARGET_SOC=t194 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200331
332# For the Xilinx platform, artificially increase the extents of BL31 memory
333# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
334# If we keep the default values, BL31 doesn't fit when it is built with all
335# these build flags.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500336make PLAT=zynqmp $(common_flags) \
Fathi Boudra422bf772019-12-02 11:10:16 +0200337 RESET_TO_BL31=1 SPD=tspd \
338 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
339 all
340
Zelalemc9531f82020-08-04 15:37:08 -0500341# Build both for silicon (default) and virtual QEMU platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500342clean_build PLAT=versal $(common_flags)
343clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt
Zelalemc9531f82020-08-04 15:37:08 -0500344
345# Platforms from Allwinner
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500346make PLAT=sun50i_a64 $(common_flags) all
347make PLAT=sun50i_h6 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500348
349# Platforms from i.MX
350make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
351 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500352 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500353make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500354 $(common_flags) all
355make PLAT=imx8mm $(common_flags) all
356make PLAT=imx8mn $(common_flags) all
357make PLAT=imx8mp $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500358
359# Temporarily building in release mode until the following ticket is resolved:
360# https://developer.trustedfirmware.org/T626
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500361# make PLAT=imx8mq $(common_flags) all
362make PLAT=imx8mq $(common_flags release) all
Zelalemc9531f82020-08-04 15:37:08 -0500363
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500364make PLAT=imx8qm $(common_flags) all
365make PLAT=imx8qx $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500366
367# Platforms from Intel
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500368make PLAT=stratix10 $(common_flags) all
369make PLAT=agilex $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500370
371# Platforms from Broadcom
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500372clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1
373clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
Zelalemc9531f82020-08-04 15:37:08 -0500374
375# Platforms from Marvell
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500376make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null all
Zelalemc9531f82020-08-04 15:37:08 -0500377
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500378if is_arm_jenkins_env; then
379 # Source files from mv-ddr-marvell repository are necessary
380 # to build below four platforms
381 wget http://files.oss.arm.com/downloads/tf-a/mv-ddr-marvell/mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
382 tar -xzf mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
383 mv mv-ddr-marvell drivers/marvell/mv_ddr
Zelalemc9531f82020-08-04 15:37:08 -0500384
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500385 # These platforms from Marvell have dependency on GCC-6.2.1 toolchain
386 make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
387 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
388 make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
389 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
390 make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
391 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
392 make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
393 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
394 make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
395 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
Zelalemd86e8762020-08-21 18:24:28 -0500396 make PLAT=t9130 DEBUG=1 SCP_BL2=/dev/null \
397 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500398
399 # Removing the source files
400 rm -rf drivers/marvell/mv_ddr 2> /dev/null
401fi
Zelalemc9531f82020-08-04 15:37:08 -0500402
403# Platforms from Meson
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500404make PLAT=gxbb $(common_flags) all
405make PLAT=gxl $(common_flags) all
406make PLAT=g12a $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500407
408# Platforms from Renesas
409# Renesas R-Car D3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500410clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500411 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
412 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
413 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
414 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
415
416# Renesas R-Car H3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500417clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500418 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
419 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
420 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
421 TRUSTED_BOARD_BOOT=1
422
423# Renesas R-Car H3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500424clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500425 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
426 SPD=opteed TRUSTED_BOARD_BOOT=1
427
428# Renesas R-Car M3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500429clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500430 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
431 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
432 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
433 TRUSTED_BOARD_BOOT=1
434
435# Renesas R-Car M3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500436clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500437 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
438 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
439 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
440
441# Renesas R-Car E3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500442clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500443 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
444 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
445 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
446
447# Renesas R-Car V3M Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500448clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500449 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
450 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
451 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
452
453# Platforms from ST
454make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500455 $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500456 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
457 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
458
459# Platforms from TI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500460make PLAT=k3 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500461
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500462clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500463# Use GICV3 driver
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500464clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
Zelalemc9531f82020-08-04 15:37:08 -0500465 ENABLE_STACK_PROTECTOR=strong
466# Use encrypted FIP feature.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500467clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500468 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
469 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
470
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500471clean_build PLAT=qemu_sbsa $(common_flags)
Fathi Boudra422bf772019-12-02 11:10:16 +0200472
Zelalemd86e8762020-08-21 18:24:28 -0500473# QEMU with SPM support
474clean_build PLAT=qemu_sbsa $(common_flags) BL32=Makefile SPM_MM=1 \
475 EL3_EXCEPTION_HANDLING=1
476
Fathi Boudra422bf772019-12-02 11:10:16 +0200477# For hikey enable PMF to include all files in the platform port
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500478make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
479make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
480make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200481
Zelalemc9531f82020-08-04 15:37:08 -0500482# Platforms from Socionext
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500483clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd
484clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200485
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500486clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500487 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
488
489# Support for SCP Message Interface protocol with platform specific drivers
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500490clean_build PLAT=synquacer $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500491 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
492
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500493make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200494
Zelalemc9531f82020-08-04 15:37:08 -0500495# Raspberry Pi Platforms
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500496make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500497 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500498make PLAT=rpi4 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200499
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500500# Cannot use $(common_flags) for LS1043 platform, as then
Fathi Boudra422bf772019-12-02 11:10:16 +0200501# the binaries do not fit in memory.
502clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
503clean_build PLAT=ls1043 SPD=tspd
504
Zelalemc9531f82020-08-04 15:37:08 -0500505# A113D (AXG) platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500506clean_build PLAT=axg $(common_flags) SPD=opteed
507clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1
Zelalemc9531f82020-08-04 15:37:08 -0500508
Fathi Boudra422bf772019-12-02 11:10:16 +0200509cd ..