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Fathi Boudra422bf772019-12-02 11:10:16 +02001#! /bin/sh
2#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050027export CROSS_COMPILE=aarch64-none-elf-
Fathi Boudra422bf772019-12-02 11:10:16 +020028
29# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
30# support. The version of mbed TLS to use here must be the same as when
31# building TF in the usual context.
32if [ ! -d mbedtls ]; then
33 git clone https://github.com/ARMmbed/mbedtls.git
34fi
35cd mbedtls
36containing_dir="$(readlink -f "$(dirname "$0")/")"
37. $containing_dir/common-def.sh
38git checkout "$MBED_TLS_SOURCES_TAG"
39cd -
40TBB_OPTIONS="TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$(pwd)/mbedtls"
41ARM_TBB_OPTIONS="$TBB_OPTIONS ARM_ROTPK_LOCATION=devel_rsa"
42
43cd "$TF_SOURCES"
44
45# Clean TF source dir to make sure we don't analyse temporary files.
46make distclean
47
48#
49# Build TF in different configurations to get as much coverage as possible
50#
51
52# We need to clean the platform build between each configuration because Trusted
53# Firmware's build system doesn't track build options dependencies and won't
54# rebuild the files affected by build options changes.
55clean_build()
56{
57 local flags="$*"
58 echo "Building TF with the following build flags:"
59 echo " $flags"
60 make $flags clean
61 make $flags all
62 echo "Build config complete."
63 echo
64}
65
66#
67# FVP platform
68# We'll use the following flags for all FVP builds.
69#
70fvp_common_flags="-j PLAT=fvp DEBUG=1"
71
72# Try all possible SPDs.
73clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
74clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
75 TSP_NS_INTR_ASYNC_PREEMPT=1
76clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
77clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
78
Zelalemc9531f82020-08-04 15:37:08 -050079# Dualroot chain of trust.
80clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
81
Fathi Boudra422bf772019-12-02 11:10:16 +020082clean_build -j PLAT=fvp DEBUG=1 SPD=trusty
83clean_build -j PLAT=fvp DEBUG=1 SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
84
85# SDEI
86clean_build PLAT=fvp DEBUG=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
87
Zelalemc9531f82020-08-04 15:37:08 -050088# SDEI with fconf
89clean_build PLAT=fvp DEBUG=1 SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
90
91# Secure interrupt descriptors with fconf
92clean_build PLAT=fvp DEBUG=1 SEC_INT_DESC_IN_FCONF=1
93
Fathi Boudra422bf772019-12-02 11:10:16 +020094# Without coherent memory
95clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
96
97# Using PSCI extended State ID format rather than the original format
98clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
99 ARM_RECOM_STATE_ID_ENC=1
100
101# Alternative boot flows (This changes some of the platform initialisation code)
102clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
103clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
104
105# Using the SP804 timer instead of the Generic Timer
106clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
107
108# Using the CCN driver and multi cluster topology
109clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
110
111# PMF
112clean_build $fvp_common_flags ENABLE_PMF=1
113
114# stack protector
115clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
116
117# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500118clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200119 ARCH=aarch32 AARCH32_SP=sp_min \
120 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500121clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200122 ARCH=aarch32 AARCH32_SP=sp_min
123
124# Xlat tables lib version 1 (AArch64 and AArch32)
125clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500126clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200127 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
128
Zelalemc9531f82020-08-04 15:37:08 -0500129# SPM support based on Management Mode Interface Specification
130clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200131
Zelalemc9531f82020-08-04 15:37:08 -0500132# SPM support with TOS(optee) as SPM sitting at S-EL1
133clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
134
135# SPM support with Secure hafnium as SPM sitting at S-EL2
136# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
137# if we have NULL value to it, so passing a dummy string.
138clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
139 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200140
141#BL2 at EL3 support
142clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500143clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200144 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
145
Zelalemc9531f82020-08-04 15:37:08 -0500146# RAS Extension Support
147clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
148 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
149 SDEI_SUPPORT=1
150
151# Hardware Assisted Coherency(DynamIQ)
152clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
153 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
154
155# Pointer Authentication Support
156clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
157 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
158
159# Undefined Behaviour Sanitizer
160# Building with UBSAN SANITIZE_UB=on increases the executable size.
161# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
162make $fvp_common_flags clean
163make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
164
165# debugfs feature
166clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
167
168# MPAM feature
169clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
170
171# Using GICv3.1 driver with extended PPI and SPI range
172clean_build $fvp_common_flags GIC_EXT_INTID=1
173
174# Using GICv4 features with extended PPI and SPI range
175clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
176
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100177# Measured Boot
178clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
179
Fathi Boudra422bf772019-12-02 11:10:16 +0200180#
181# Juno platform
182# We'll use the following flags for all Juno builds.
183#
184juno_common_flags="-j PLAT=juno DEBUG=1"
185clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
186clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
187clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong
188clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Zelalemc9531f82020-08-04 15:37:08 -0500189clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200190
191#
192# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500193# Enable build config with RAS_EXTENSION to cover more files
194make -j DEBUG=1 PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
195 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200196#
Zelalemc9531f82020-08-04 15:37:08 -0500197# System Guidance for Mobile platform SGM775
198#
199make -j DEBUG=1 PLAT=sgm775 ${ARM_TBB_OPTIONS} SPD=tspd \
200 CSS_USE_SCMI_SDS_DRIVER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200201
202#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530203# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200204#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530205make -j DEBUG=1 PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200206
207#
208# System Guidance for Infrastructure platform RD-E1Edge
209#
Zelalemc9531f82020-08-04 15:37:08 -0500210make -j DEBUG=1 PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
211
212#
213# System Guidance for Infrastructure platform RD-Daniel
214#
215make -j DEBUG=1 PLAT=rddaniel ${ARM_TBB_OPTIONS} all
216
217#
218# System Guidance for Infrastructure platform RD-Danielxlr
219#
220make -j DEBUG=1 PLAT=rddanielxlr ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
221
222#
223# Neoverse N1 SDP platform
224#
225make -j DEBUG=1 PLAT=n1sdp ${ARM_TBB_OPTIONS} all
226
227#
228# FVP VE platform
229#
230make -j DEBUG=1 PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
231 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
232 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
233 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
234
235#
236# A5 DesignStart Platform
237#
238make -j DEBUG=1 PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
239 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
240 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
241
242#
243# Corstone700 Platform
244#
245
246corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
247 PLAT=corstone700 \
248 ARCH=aarch32 \
249 RESET_TO_SP_MIN=1 \
250 AARCH32_SP=sp_min \
251 ARM_LINUX_KERNEL_AS_BL33=0 \
252 ARM_PRELOADED_DTB_BASE=0x80400000 \
253 ENABLE_PIE=1 \
254 DEBUG=1 \
255 ENABLE_STACK_PROTECTOR=all \
256 all"
257
258echo "Info: Building Corstone700 FVP ..."
259
260make TARGET_PLATFORM=fvp ${corstone700_common_flags}
261
262echo "Info: Building Corstone700 FPGA ..."
263
264make TARGET_PLATFORM=fpga ${corstone700_common_flags}
265
266#
267# Arm internal FPGA port
268#
269make PLAT=arm_fpga $external_plat_common_flags CROSS_COMPILE=aarch64-none-elf- \
270 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
271
272#
273# Total Compute platform
274#
275make -j DEBUG=1 PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200276
277# Partners' platforms.
278# Enable as many features as possible.
279# We don't need to clean between each build here because we only do one build
280# per platform so we don't hit the build flags dependency problem.
281external_plat_common_flags="-j DEBUG=1"
282
283make PLAT=mt8173 $external_plat_common_flags all
Zelalemc9531f82020-08-04 15:37:08 -0500284make PLAT=mt8183 $external_plat_common_flags all
Fathi Boudra422bf772019-12-02 11:10:16 +0200285
Zelalemc9531f82020-08-04 15:37:08 -0500286make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
287 $external_plat_common_flags ARCH=aarch32 AARCH32_SP=sp_min all
Fathi Boudra422bf772019-12-02 11:10:16 +0200288make PLAT=rk3368 $external_plat_common_flags COREBOOT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500289make PLAT=rk3399 $external_plat_common_flags COREBOOT=1 PLAT_RK_DP_HDCP=1 all
290make PLAT=rk3328 $external_plat_common_flags COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 all
291make PLAT=px30 $external_plat_common_flags PLAT_RK_SECURE_DDR_MINILOADER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200292
293# Although we do several consecutive builds for the Tegra platform below, we
294# don't need to clean between each one because the Tegra makefiles specify
295# a different build directory per SoC.
296make PLAT=tegra TARGET_SOC=t210 $external_plat_common_flags all
297make PLAT=tegra TARGET_SOC=t132 $external_plat_common_flags all
298make PLAT=tegra TARGET_SOC=t186 $external_plat_common_flags all
Zelalemc9531f82020-08-04 15:37:08 -0500299make PLAT=tegra TARGET_SOC=t194 $external_plat_common_flags all
Fathi Boudra422bf772019-12-02 11:10:16 +0200300
301# For the Xilinx platform, artificially increase the extents of BL31 memory
302# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
303# If we keep the default values, BL31 doesn't fit when it is built with all
304# these build flags.
305make PLAT=zynqmp $external_plat_common_flags \
306 RESET_TO_BL31=1 SPD=tspd \
307 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
308 all
309
Zelalemc9531f82020-08-04 15:37:08 -0500310# Build both for silicon (default) and virtual QEMU platform.
311clean_build PLAT=versal $external_plat_common_flags
312clean_build PLAT=versal $external_plat_common_flags VERSAL_PLATFORM=versal_virt
313
314# Platforms from Allwinner
315make PLAT=sun50i_a64 $external_plat_common_flags all
316make PLAT=sun50i_h6 $external_plat_common_flags all
317
318# Platforms from i.MX
319make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
320 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
321 $external_plat_common_flags all
322make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
323 $external_plat_common_flags all
324make PLAT=imx8mm $external_plat_common_flags all
325make PLAT=imx8mn $external_plat_common_flags all
326make PLAT=imx8mp $external_plat_common_flags all
327
328# Temporarily building in release mode until the following ticket is resolved:
329# https://developer.trustedfirmware.org/T626
330# make PLAT=imx8mq $external_plat_common_flags all
331make PLAT=imx8mq -j all
332
333make PLAT=imx8qm $external_plat_common_flags all
334make PLAT=imx8qx $external_plat_common_flags all
335
336# Platforms from Intel
337make PLAT=stratix10 $external_plat_common_flags all
338make PLAT=agilex $external_plat_common_flags all
339
340# Platforms from Broadcom
341clean_build PLAT=stingray BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1
342clean_build PLAT=stingray BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
343
344# Platforms from Marvell
345make PLAT=a3700 $external_plat_common_flags SCP_BL2=/dev/null all
346# Source files from mv-ddr-marvell repository are necessary
347# to build below four platforms
348wget http://files.oss.arm.com/downloads/tf-a/mv-ddr-marvell/mv-ddr-marvell-a881467ef0f0185e6570dd0483023fde93cbb5f5.tar.gz 2> /dev/null
349tar -xzf mv-ddr-marvell-a881467ef0f0185e6570dd0483023fde93cbb5f5.tar.gz 2> /dev/null
350mv mv-ddr-marvell drivers/marvell/mv_ddr
351
352# These platforms from Marvell have dependency on GCC-6.2.1 toolchain
353make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
354 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
355make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
356 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
357make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
358 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
359make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
360 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
361make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
362 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
363
364# Removing the source files
365rm -rf drivers/marvell/mv_ddr 2> /dev/null
366
367# Platforms from Meson
368make PLAT=gxbb $external_plat_common_flags all
369make PLAT=gxl $external_plat_common_flags all
370make PLAT=g12a $external_plat_common_flags all
371
372# Platforms from Renesas
373# Renesas R-Car D3 Automotive SoC
374clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
375 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
376 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
377 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
378 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
379
380# Renesas R-Car H3 Automotive SoC
381clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
382 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
383 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
384 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
385 TRUSTED_BOARD_BOOT=1
386
387# Renesas R-Car H3N Automotive SoC
388clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
389 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
390 SPD=opteed TRUSTED_BOARD_BOOT=1
391
392# Renesas R-Car M3 Automotive SoC
393clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
394 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
395 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
396 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
397 TRUSTED_BOARD_BOOT=1
398
399# Renesas R-Car M3N Automotive SoC
400clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
401 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
402 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
403 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
404
405# Renesas R-Car E3 Automotive SoC
406clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
407 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
408 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
409 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
410
411# Renesas R-Car V3M Automotive SoC
412clean_build PLAT=rcar $external_plat_common_flags BL32=Makefile \
413 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
414 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
415 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
416
417# Platforms from ST
418make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
419 $external_plat_common_flags ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
420 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
421 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
422
423# Platforms from TI
424make PLAT=k3 $external_plat_common_flags all
425
Fathi Boudra422bf772019-12-02 11:10:16 +0200426clean_build PLAT=qemu $external_plat_common_flags ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500427# Use GICV3 driver
428clean_build PLAT=qemu $external_plat_common_flags QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
429 ENABLE_STACK_PROTECTOR=strong
430# Use encrypted FIP feature.
431clean_build PLAT=qemu $external_plat_common_flags ${TBB_OPTIONS} \
432 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
433 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
434
435clean_build PLAT=qemu_sbsa $external_plat_common_flags
Fathi Boudra422bf772019-12-02 11:10:16 +0200436
437# For hikey enable PMF to include all files in the platform port
Zelalemc9531f82020-08-04 15:37:08 -0500438make PLAT=hikey $external_plat_common_flags ${TBB_OPTIONS} ENABLE_PMF=1 all
439make PLAT=hikey960 $external_plat_common_flags ${TBB_OPTIONS} all
440make PLAT=poplar $external_plat_common_flags all
Fathi Boudra422bf772019-12-02 11:10:16 +0200441
Zelalemc9531f82020-08-04 15:37:08 -0500442# Platforms from Socionext
Fathi Boudra422bf772019-12-02 11:10:16 +0200443clean_build PLAT=uniphier $external_plat_common_flags ${TBB_OPTIONS} SPD=tspd
444clean_build PLAT=uniphier $external_plat_common_flags FIP_GZIP=1
445
Zelalemc9531f82020-08-04 15:37:08 -0500446clean_build PLAT=synquacer $external_plat_common_flags SPM_MM=1 \
447 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
448
449# Support for SCP Message Interface protocol with platform specific drivers
450clean_build PLAT=synquacer $external_plat_common_flags \
451 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
452
Fathi Boudra422bf772019-12-02 11:10:16 +0200453make PLAT=poplar $external_plat_common_flags all
454
Zelalemc9531f82020-08-04 15:37:08 -0500455# Raspberry Pi Platforms
456make PLAT=rpi3 $external_plat_common_flags ${TBB_OPTIONS} \
457 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
458make PLAT=rpi4 $external_plat_common_flags all
Fathi Boudra422bf772019-12-02 11:10:16 +0200459
460# Cannot use $external_plat_common_flags for LS1043 platform, as then
461# the binaries do not fit in memory.
462clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
463clean_build PLAT=ls1043 SPD=tspd
464
Zelalemc9531f82020-08-04 15:37:08 -0500465# A113D (AXG) platform.
466clean_build PLAT=axg $external_plat_common_flags SPD=opteed
467clean_build PLAT=axg $external_plat_common_flags AML_USE_ATOS=1
468
Fathi Boudra422bf772019-12-02 11:10:16 +0200469cd ..