Leonardo Sandoval | c4dfbb0 | 2020-08-17 10:21:44 -0500 | [diff] [blame] | 1 | #!/usr/bin/env bash |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 2 | # |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 3 | # Copyright (c) 2019-2023, Arm Limited. All rights reserved. |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | # |
| 7 | |
| 8 | # |
| 9 | # This script builds the TF in different configs. |
| 10 | # Rather than telling cov-build to build TF using a simple 'make all' command, |
| 11 | # the goal here is to combine several build flags to analyse more of our source |
| 12 | # code in a single 'build'. The Coverity Scan service does not have the notion |
| 13 | # of separate types of build - there is just one linear sequence of builds in |
| 14 | # the project history. |
| 15 | # |
| 16 | |
| 17 | # Bail out as soon as an error is encountered. |
| 18 | set -e |
| 19 | |
| 20 | TF_SOURCES=$1 |
| 21 | if [ ! -d "$TF_SOURCES" ]; then |
| 22 | echo "ERROR: '$TF_SOURCES' does not exist or is not a directory" |
| 23 | echo "Usage: $(basename "$0") <trusted-firmware-directory>" |
| 24 | exit 1 |
| 25 | fi |
| 26 | |
Leonardo Sandoval | c4dfbb0 | 2020-08-17 10:21:44 -0500 | [diff] [blame] | 27 | containing_dir="$(readlink -f "$(dirname "$0")/")" |
| 28 | . $containing_dir/common-def.sh |
| 29 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 30 | # Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot |
| 31 | # support. The version of mbed TLS to use here must be the same as when |
| 32 | # building TF in the usual context. |
Leonardo Sandoval | c4dfbb0 | 2020-08-17 10:21:44 -0500 | [diff] [blame] | 33 | if [ ! -d "$MBED_TLS_DIR" ]; then |
| 34 | git clone -q --depth 1 -b "$MBED_TLS_SOURCES_TAG" "$MBED_TLS_URL_REPO" "$MBED_TLS_DIR" |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 35 | fi |
Leonardo Sandoval | c4dfbb0 | 2020-08-17 10:21:44 -0500 | [diff] [blame] | 36 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 37 | cd "$TF_SOURCES" |
| 38 | |
| 39 | # Clean TF source dir to make sure we don't analyse temporary files. |
| 40 | make distclean |
| 41 | |
| 42 | # |
| 43 | # Build TF in different configurations to get as much coverage as possible |
| 44 | # |
| 45 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 46 | # |
| 47 | # FVP platform |
| 48 | # We'll use the following flags for all FVP builds. |
| 49 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 50 | fvp_common_flags="$(common_flags) PLAT=fvp" |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 51 | |
| 52 | # Try all possible SPDs. |
| 53 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd |
| 54 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \ |
| 55 | TSP_NS_INTR_ASYNC_PREEMPT=1 |
| 56 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed |
| 57 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd |
Florian Lugou | 70a76c0 | 2022-03-25 09:51:42 +0100 | [diff] [blame] | 58 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=pncd SPD_PNCD_NS_IRQ=126 SPD_PNCD_S_IRQ=15 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 59 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 60 | # Dualroot chain of trust. |
| 61 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot |
| 62 | |
laurenw-arm | f48e9d2 | 2022-04-22 11:30:13 -0500 | [diff] [blame] | 63 | # FEAT_RME with CCA chain of trust. |
Sandrine Bailleux | e30bd0c | 2022-08-31 14:49:17 +0200 | [diff] [blame] | 64 | # |
| 65 | # Note that we override PLAT_RSS_NOT_SUPPORTED build flag (which defaults to 1 |
| 66 | # on the Base AEM FVP) just to analyse the RSS communication driver code through |
| 67 | # Coverity. In reality, RSS is not supported on FVP right now (or on any other |
| 68 | # upstream platform, for that matter) so the resulting firmware would not be |
| 69 | # functional. |
| 70 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd USE_ROMLIB=1 \ |
| 71 | ENABLE_RME=1 MEASURED_BOOT=1 PLAT_RSS_NOT_SUPPORTED=0 |
laurenw-arm | f48e9d2 | 2022-04-22 11:30:13 -0500 | [diff] [blame] | 72 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 73 | clean_build $fvp_common_flags SPD=trusty |
| 74 | clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 75 | |
| 76 | # SDEI |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 77 | clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 78 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 79 | # SDEI with fconf |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 80 | clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 81 | |
Zelalem | 4f3633e | 2021-06-18 11:53:47 -0500 | [diff] [blame] | 82 | # PCI Service |
| 83 | clean_build $fvp_common_flags SMC_PCI_SUPPORT=1 |
| 84 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 85 | # Secure interrupt descriptors with fconf |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 86 | clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 87 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 88 | # Without coherent memory |
| 89 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0 |
| 90 | |
| 91 | # Using PSCI extended State ID format rather than the original format |
| 92 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \ |
| 93 | ARM_RECOM_STATE_ID_ENC=1 |
| 94 | |
| 95 | # Alternative boot flows (This changes some of the platform initialisation code) |
| 96 | clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000 |
| 97 | clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000 |
| 98 | |
| 99 | # Using the SP804 timer instead of the Generic Timer |
| 100 | clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1 |
| 101 | |
| 102 | # Using the CCN driver and multi cluster topology |
| 103 | clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4 |
| 104 | |
| 105 | # PMF |
| 106 | clean_build $fvp_common_flags ENABLE_PMF=1 |
| 107 | |
| 108 | # stack protector |
| 109 | clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong |
| 110 | |
| 111 | # AArch32 build |
Leonardo Sandoval | 1c24ae5 | 2020-07-08 11:47:23 -0500 | [diff] [blame] | 112 | clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \ |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 113 | ARCH=aarch32 AARCH32_SP=sp_min \ |
| 114 | RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000 |
Leonardo Sandoval | 1c24ae5 | 2020-07-08 11:47:23 -0500 | [diff] [blame] | 115 | clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \ |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 116 | ARCH=aarch32 AARCH32_SP=sp_min |
| 117 | |
| 118 | # Xlat tables lib version 1 (AArch64 and AArch32) |
| 119 | clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0 |
Leonardo Sandoval | 1c24ae5 | 2020-07-08 11:47:23 -0500 | [diff] [blame] | 120 | clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \ |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 121 | ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0 |
| 122 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 123 | # SPM support based on Management Mode Interface Specification |
Manish Pandey | aa9a03b | 2021-11-17 10:03:17 +0000 | [diff] [blame] | 124 | clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1 ENABLE_SVE_FOR_NS=0 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 125 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 126 | # SPM support with TOS(optee) as SPM sitting at S-EL1 |
| 127 | clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0 |
| 128 | |
Shruti Gupta | 8cc89b9 | 2022-08-09 12:23:46 +0100 | [diff] [blame] | 129 | # SPM support with SPM at EL3 and TSP at S-EL1 |
| 130 | clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 CTX_INCLUDE_EL2_REGS=0 EL3_EXCEPTION_HANDLING=0 \ |
| 131 | SPD=spmd SPMD_SPM_AT_SEL2=0 SPMC_AT_EL3=1 \ |
| 132 | ARM_SPMC_MANIFEST_DTS=plat/arm/board/fvp/fdts/fvp_tsp_sp_manifest.dts |
| 133 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 134 | # SPM support with Secure hafnium as SPM sitting at S-EL2 |
| 135 | # SP_LAYOUT_FILE is used only during FIP creation but build won't progress |
| 136 | # if we have NULL value to it, so passing a dummy string. |
| 137 | clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \ |
Max Shvetsov | 44d2a70 | 2021-02-18 16:41:45 +0000 | [diff] [blame] | 138 | CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 139 | |
Marc Bonnici | 502fdaa | 2022-01-10 12:38:23 +0000 | [diff] [blame] | 140 | # SPM support with SPM sitting at EL3 |
| 141 | clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0 SPMC_AT_EL3=1 |
| 142 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 143 | #BL2 at EL3 support |
Maksims Svecovs | 7a0da52 | 2023-03-06 16:28:27 +0000 | [diff] [blame] | 144 | clean_build $fvp_common_flags RESET_TO_BL2=1 |
Leonardo Sandoval | 1c24ae5 | 2020-07-08 11:47:23 -0500 | [diff] [blame] | 145 | clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \ |
Maksims Svecovs | 7a0da52 | 2023-03-06 16:28:27 +0000 | [diff] [blame] | 146 | ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_BL2=1 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 147 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 148 | # RAS Extension Support |
| 149 | clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \ |
Manish Pandey | 9ef33c5 | 2022-10-25 16:41:49 +0100 | [diff] [blame] | 150 | FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST_NS=1 RAS_EXTENSION=1 \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 151 | SDEI_SUPPORT=1 |
| 152 | |
| 153 | # Hardware Assisted Coherency(DynamIQ) |
| 154 | clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \ |
| 155 | HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 |
| 156 | |
| 157 | # Pointer Authentication Support |
| 158 | clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \ |
| 159 | ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1 |
| 160 | |
| 161 | # Undefined Behaviour Sanitizer |
| 162 | # Building with UBSAN SANITIZE_UB=on increases the executable size. |
| 163 | # Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled |
| 164 | make $fvp_common_flags clean |
| 165 | make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31 |
| 166 | |
| 167 | # debugfs feature |
| 168 | clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1 |
| 169 | |
| 170 | # MPAM feature |
| 171 | clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1 |
| 172 | |
| 173 | # Using GICv3.1 driver with extended PPI and SPI range |
| 174 | clean_build $fvp_common_flags GIC_EXT_INTID=1 |
| 175 | |
| 176 | # Using GICv4 features with extended PPI and SPI range |
| 177 | clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1 |
| 178 | |
Alexei Fedorov | 20fdf50 | 2020-07-27 17:36:38 +0100 | [diff] [blame] | 179 | # Measured Boot |
laurenw-arm | 8531e70 | 2022-06-09 15:32:37 -0500 | [diff] [blame] | 180 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MBOOT_EL_HASH_ALG=sha256 MEASURED_BOOT=1 USE_ROMLIB=1 |
Alexei Fedorov | 20fdf50 | 2020-07-27 17:36:38 +0100 | [diff] [blame] | 181 | |
Manish V Badarkhe | f43e3f5 | 2022-06-21 20:37:25 +0100 | [diff] [blame] | 182 | # DRTM |
| 183 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} TPM_HASH_ALG=sha256 DRTM_SUPPORT=1 USE_ROMLIB=1 |
| 184 | |
Manish V Badarkhe | 447e31a | 2020-09-03 07:57:17 +0100 | [diff] [blame] | 185 | # CoT descriptors in device tree |
Manish V Badarkhe | 81102d1 | 2020-10-05 08:02:30 +0100 | [diff] [blame] | 186 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} COT_DESC_IN_DTB=1 USE_ROMLIB=1 |
Manish V Badarkhe | 447e31a | 2020-09-03 07:57:17 +0100 | [diff] [blame] | 187 | |
Manish V Badarkhe | 107c8e3 | 2021-08-02 19:49:32 +0100 | [diff] [blame] | 188 | # PSA FWU support |
| 189 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_GPT_SUPPORT=1 PSA_FWU_SUPPORT=1 USE_ROMLIB=1 |
| 190 | |
johpow01 | 153c8b2 | 2021-11-03 14:38:36 -0500 | [diff] [blame] | 191 | # SME and HCX features |
| 192 | clean_build $fvp_common_flags ENABLE_SME_FOR_NS=1 ENABLE_FEAT_HCX=1 |
| 193 | |
Jayanth Dodderi Chidanand | 84da196 | 2022-04-11 11:38:44 +0100 | [diff] [blame] | 194 | # Architectural Feature Detection mechanism |
| 195 | clean_build $fvp_common_flags FEATURE_DETECTION=1 |
| 196 | |
Manish Pandey | e3561fd | 2023-01-05 10:46:25 +0000 | [diff] [blame] | 197 | # RNG trap feature |
| 198 | clean_build $fvp_common_flags ENABLE_FEAT_RNG=1 ENABLE_FEAT_RNG_TRAP=1 |
| 199 | |
Jeffrey Kardatzke | 09e18e2 | 2023-01-25 12:24:13 -0800 | [diff] [blame] | 200 | # OPTEE_ALLOW_SMC_LOAD feature |
| 201 | clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed OPTEE_ALLOW_SMC_LOAD=1 PLAT_XLAT_TABLES_DYNAMIC=1 |
| 202 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 203 | # |
| 204 | # Juno platform |
| 205 | # We'll use the following flags for all Juno builds. |
| 206 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 207 | juno_common_flags="$(common_flags) PLAT=juno" |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 208 | clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} |
| 209 | clean_build $juno_common_flags EL3_PAYLOAD=0x80000000 |
Madhukar Pappireddy | dcb31f6 | 2021-05-06 11:36:36 -0500 | [diff] [blame] | 210 | clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong ARM_ETHOSN_NPU_DRIVER=1 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 211 | clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0 |
Leonardo Sandoval | eb1d3ce | 2020-08-06 16:04:29 -0500 | [diff] [blame] | 212 | |
Leonardo Sandoval | 5163b56 | 2020-11-20 17:17:59 -0600 | [diff] [blame] | 213 | clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 214 | |
Jayanth Dodderi Chidanand | 055394a | 2022-10-19 09:20:20 +0100 | [diff] [blame] | 215 | # TRNG Service |
| 216 | clean_build $juno_common_flags TRNG_SUPPORT=1 |
| 217 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 218 | # |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 219 | # System Guidance for Infrastructure platform RD-E1Edge |
| 220 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 221 | make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 222 | |
| 223 | # |
Aditya Angadi | 634d61f | 2021-01-04 09:30:20 +0530 | [diff] [blame] | 224 | # Reference Design platform RD-V1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 225 | # |
Aditya Angadi | 634d61f | 2021-01-04 09:30:20 +0530 | [diff] [blame] | 226 | make $(common_flags) PLAT=rdv1 ${ARM_TBB_OPTIONS} all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 227 | |
| 228 | # |
Aditya Angadi | 61c5476 | 2021-01-04 09:30:52 +0530 | [diff] [blame] | 229 | # Reference Design platform RD-V1-MC |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 230 | # |
Aditya Angadi | 61c5476 | 2021-01-04 09:30:52 +0530 | [diff] [blame] | 231 | make $(common_flags) PLAT=rdv1mc ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 232 | |
| 233 | # |
Vijayenthiran Subramaniam | a66de33 | 2020-11-23 14:20:14 +0530 | [diff] [blame] | 234 | # Reference Design Platform RD-N2 |
| 235 | # |
| 236 | make $(common_flags) PLAT=rdn2 ${ARM_TBB_OPTIONS} all |
| 237 | |
| 238 | # |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 239 | # Neoverse N1 SDP platform |
| 240 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 241 | make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 242 | |
| 243 | # |
| 244 | # FVP VE platform |
| 245 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 246 | make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 247 | CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \ |
| 248 | ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \ |
| 249 | FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all |
| 250 | |
| 251 | # |
| 252 | # A5 DesignStart Platform |
| 253 | # |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 254 | make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 255 | ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \ |
| 256 | CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts |
| 257 | |
| 258 | # |
| 259 | # Corstone700 Platform |
| 260 | # |
| 261 | |
| 262 | corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \ |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 263 | $(common_flags) \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 264 | PLAT=corstone700 \ |
| 265 | ARCH=aarch32 \ |
| 266 | RESET_TO_SP_MIN=1 \ |
| 267 | AARCH32_SP=sp_min \ |
| 268 | ARM_LINUX_KERNEL_AS_BL33=0 \ |
| 269 | ARM_PRELOADED_DTB_BASE=0x80400000 \ |
| 270 | ENABLE_PIE=1 \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 271 | ENABLE_STACK_PROTECTOR=all \ |
| 272 | all" |
| 273 | |
| 274 | echo "Info: Building Corstone700 FVP ..." |
| 275 | |
| 276 | make TARGET_PLATFORM=fvp ${corstone700_common_flags} |
| 277 | |
| 278 | echo "Info: Building Corstone700 FPGA ..." |
| 279 | |
| 280 | make TARGET_PLATFORM=fpga ${corstone700_common_flags} |
| 281 | |
| 282 | # |
| 283 | # Arm internal FPGA port |
| 284 | # |
Andre Przywara | 13361b6 | 2022-04-26 11:16:55 +0100 | [diff] [blame] | 285 | make PLAT=arm_fpga $(common_flags release) \ |
| 286 | FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 287 | |
| 288 | # |
Usama Arif | cba711d | 2021-08-04 15:53:42 +0100 | [diff] [blame] | 289 | # Total Compute platforms |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 290 | # |
Usama Arif | cba711d | 2021-08-04 15:53:42 +0100 | [diff] [blame] | 291 | make $(common_flags) PLAT=tc TARGET_PLATFORM=0 ${ARM_TBB_OPTIONS} all |
| 292 | make $(common_flags) PLAT=tc TARGET_PLATFORM=1 ${ARM_TBB_OPTIONS} all |
Tamas Ban | af5a663 | 2022-09-21 16:02:39 +0200 | [diff] [blame] | 293 | make $(common_flags) PLAT=tc TARGET_PLATFORM=2 ${ARM_TBB_OPTIONS} MEASURED_BOOT=1 all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 294 | |
Chandni Cherukuri | fb803e1 | 2020-10-01 17:49:08 +0530 | [diff] [blame] | 295 | # |
| 296 | # Morello platform |
| 297 | # |
Chandni Cherukuri | cbd4596 | 2021-12-12 13:37:33 +0530 | [diff] [blame] | 298 | clean_build $(common_flags) PLAT=morello TARGET_PLATFORM=fvp ${ARM_TBB_OPTIONS} |
| 299 | clean_build $(common_flags) PLAT=morello TARGET_PLATFORM=soc ${ARM_TBB_OPTIONS} |
Chandni Cherukuri | fb803e1 | 2020-10-01 17:49:08 +0530 | [diff] [blame] | 300 | |
Abdellatif El Khlifi | c16fe91 | 2021-08-03 12:35:16 +0100 | [diff] [blame] | 301 | # |
Vishnu Banavath | 2cb72b3 | 2022-01-20 14:27:55 +0000 | [diff] [blame] | 302 | # corstone1000 Platform |
Abdellatif El Khlifi | c16fe91 | 2021-08-03 12:35:16 +0100 | [diff] [blame] | 303 | # |
| 304 | |
| 305 | make $(common_flags) \ |
Vishnu Banavath | 2cb72b3 | 2022-01-20 14:27:55 +0000 | [diff] [blame] | 306 | PLAT=corstone1000 \ |
Abdellatif El Khlifi | c16fe91 | 2021-08-03 12:35:16 +0100 | [diff] [blame] | 307 | SPD=spmd \ |
| 308 | TARGET_PLATFORM=fpga \ |
| 309 | ENABLE_STACK_PROTECTOR=strong \ |
| 310 | ENABLE_PIE=1 \ |
Maksims Svecovs | 7a0da52 | 2023-03-06 16:28:27 +0000 | [diff] [blame] | 311 | RESET_TO_BL2=1 \ |
Abdellatif El Khlifi | c16fe91 | 2021-08-03 12:35:16 +0100 | [diff] [blame] | 312 | SPMD_SPM_AT_SEL2=0 \ |
| 313 | ${ARM_TBB_OPTIONS} \ |
| 314 | CREATE_KEYS=1 \ |
| 315 | COT=tbbr \ |
| 316 | ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \ |
| 317 | bl2 \ |
| 318 | bl31 |
| 319 | |
johpow01 | aac5858 | 2021-10-05 16:51:34 -0500 | [diff] [blame] | 320 | # |
| 321 | # FVP-R platform |
| 322 | # |
| 323 | clean_build $(common_flags) PLAT=fvp_r ${ARM_TBB_OPTIONS} ENABLE_STACK_PROTECTOR=all |
| 324 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 325 | # Partners' platforms. |
| 326 | # Enable as many features as possible. |
| 327 | # We don't need to clean between each build here because we only do one build |
| 328 | # per platform so we don't hit the build flags dependency problem. |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 329 | |
Manish Pandey | 9c0ee74 | 2021-07-08 09:55:59 +0100 | [diff] [blame] | 330 | # Platforms from Mediatek |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 331 | make PLAT=mt8173 $(common_flags) all |
| 332 | make PLAT=mt8183 $(common_flags) all |
Rex-BC Chen | 946cace | 2021-11-17 10:15:42 +0800 | [diff] [blame] | 333 | make PLAT=mt8186 $(common_flags) COREBOOT=1 all |
Bo-Chen Chen | 4d63afd | 2022-08-30 16:34:57 +0800 | [diff] [blame] | 334 | make PLAT=mt8188 $(common_flags) COREBOOT=1 all |
Zelalem | d86e876 | 2020-08-21 18:24:28 -0500 | [diff] [blame] | 335 | make PLAT=mt8192 $(common_flags) COREBOOT=1 all |
Manish Pandey | 9c0ee74 | 2021-07-08 09:55:59 +0100 | [diff] [blame] | 336 | make PLAT=mt8195 $(common_flags) COREBOOT=1 all |
Zelalem | d86e876 | 2020-08-21 18:24:28 -0500 | [diff] [blame] | 337 | |
| 338 | # Platforms from Qualcomm |
| 339 | make PLAT=sc7180 $(common_flags) COREBOOT=1 all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 340 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 341 | make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \ |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 342 | $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all |
Madhukar Pappireddy | d491ad0 | 2020-12-03 10:37:05 -0600 | [diff] [blame] | 343 | make PLAT=rk3368 $(common_flags) COREBOOT=1 \ |
| 344 | ENABLE_STACK_PROTECTOR=strong all |
| 345 | make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 \ |
| 346 | ENABLE_STACK_PROTECTOR=strong all |
| 347 | make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 \ |
| 348 | ENABLE_STACK_PROTECTOR=strong all |
| 349 | make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 \ |
| 350 | ENABLE_STACK_PROTECTOR=strong all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 351 | |
| 352 | # Although we do several consecutive builds for the Tegra platform below, we |
| 353 | # don't need to clean between each one because the Tegra makefiles specify |
| 354 | # a different build directory per SoC. |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 355 | make PLAT=tegra TARGET_SOC=t210 $(common_flags) all |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 356 | make PLAT=tegra TARGET_SOC=t186 $(common_flags) all |
| 357 | make PLAT=tegra TARGET_SOC=t194 $(common_flags) all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 358 | |
| 359 | # For the Xilinx platform, artificially increase the extents of BL31 memory |
| 360 | # (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}). |
| 361 | # If we keep the default values, BL31 doesn't fit when it is built with all |
| 362 | # these build flags. |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 363 | make PLAT=zynqmp $(common_flags) \ |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 364 | RESET_TO_BL31=1 SPD=tspd \ |
Zelalem | 4f3633e | 2021-06-18 11:53:47 -0500 | [diff] [blame] | 365 | SDEI_SUPPORT=1 \ |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 366 | ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \ |
| 367 | all |
| 368 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 369 | # Build both for silicon (default) and virtual QEMU platform. |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 370 | clean_build PLAT=versal $(common_flags) |
| 371 | clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 372 | |
Michal Simek | 0f13524 | 2022-09-20 15:24:56 +0200 | [diff] [blame] | 373 | # Build Xilinx Versal NET platform |
| 374 | clean_build PLAT=versal_net $(common_flags) |
| 375 | |
Jayanth Dodderi Chidanand | 0a2dd1e | 2022-10-27 11:17:37 +0100 | [diff] [blame] | 376 | # Build Xilinx Versal NET without Platform Management support |
| 377 | clean_build PLAT=versal_net $(common_flags) TFA_NO_PM=1 |
| 378 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 379 | # Platforms from Allwinner |
Andre Przywara | 3a78c10 | 2022-04-26 11:08:54 +0100 | [diff] [blame] | 380 | clean_build PLAT=sun50i_a64 $(common_flags release) all |
| 381 | clean_build PLAT=sun50i_a64 $(common_flags release) SUNXI_PSCI_USE_NATIVE=0 all |
| 382 | clean_build PLAT=sun50i_a64 $(common_flags release) SUNXI_PSCI_USE_SCPI=0 all |
| 383 | clean_build PLAT=sun50i_a64 $(common_flags release) SUNXI_AMEND_DTB=1 all |
Andre Przywara | cf78a51 | 2021-09-03 14:59:38 +0100 | [diff] [blame] | 384 | clean_build PLAT=sun50i_h6 $(common_flags) all |
| 385 | clean_build PLAT=sun50i_h6 $(common_flags) SUNXI_PSCI_USE_NATIVE=0 all |
| 386 | clean_build PLAT=sun50i_h6 $(common_flags) SUNXI_PSCI_USE_SCPI=0 all |
| 387 | clean_build PLAT=sun50i_h616 $(common_flags) all |
| 388 | clean_build PLAT=sun50i_r329 $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 389 | |
| 390 | # Platforms from i.MX |
| 391 | make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \ |
| 392 | CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \ |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 393 | $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 394 | make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \ |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 395 | $(common_flags) all |
Ying-Chun Liu (PaulLiu) | f652898 | 2021-11-17 17:20:00 +0800 | [diff] [blame] | 396 | make PLAT=imx8mm $(common_flags) NEED_BL2=yes MEASURED_BOOT=1 \ |
laurenw-arm | 8531e70 | 2022-06-09 15:32:37 -0500 | [diff] [blame] | 397 | MBOOT_EL_HASH_ALG=sha256 ${TBB_OPTIONS} all |
Madhukar Pappireddy | c3ec06b | 2022-05-18 11:15:16 -0500 | [diff] [blame] | 398 | make PLAT=imx8mn $(common_flags) SDEI_SUPPORT=1 all |
Ying-Chun Liu (PaulLiu) | 413e610 | 2021-09-14 00:22:08 +0800 | [diff] [blame] | 399 | make PLAT=imx8mp $(common_flags) NEED_BL2=yes ${TBB_OPTIONS} all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 400 | |
Jacky Bai | b6cecc8 | 2021-06-07 09:49:46 +0800 | [diff] [blame] | 401 | # Due to the limited OCRAM space that can be used for TF-A, build test |
| 402 | # will report failure caused by too small RAM size, so comment out the |
| 403 | # build test for imx8mq in CI. It can also resolve the following ticket: |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 404 | # https://developer.trustedfirmware.org/T626 |
Jacky Bai | b6cecc8 | 2021-06-07 09:49:46 +0800 | [diff] [blame] | 405 | #make PLAT=imx8mq $(common_flags release) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 406 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 407 | make PLAT=imx8qm $(common_flags) all |
| 408 | make PLAT=imx8qx $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 409 | |
Olivier Deprez | bac7019 | 2021-04-02 08:55:36 +0200 | [diff] [blame] | 410 | # Platforms for NXP Layerscape |
Jiafei Pan | e48e56c | 2021-09-30 10:32:54 +0800 | [diff] [blame] | 411 | nxp_sb_flags="TRUSTED_BOARD_BOOT=1 CST_DIR=$(pwd) SPD=opteed" |
| 412 | nxp_sb_fuse_flags="${nxp_sb_flags} FUSE_PROG=1" |
| 413 | |
| 414 | # Platform lx2 |
Olivier Deprez | bac7019 | 2021-04-02 08:55:36 +0200 | [diff] [blame] | 415 | make PLAT=lx2160aqds $(common_flags) all |
| 416 | make PLAT=lx2160ardb $(common_flags) all |
Madhukar Pappireddy | f93a4d4 | 2021-06-01 17:44:51 -0500 | [diff] [blame] | 417 | |
| 418 | #CSF Based CoT: |
Jiafei Pan | e48e56c | 2021-09-30 10:32:54 +0800 | [diff] [blame] | 419 | clean_build PLAT=lx2162aqds $(common_flags) BOOT_MODE=flexspi_nor \ |
| 420 | $nxp_sb_fuse_flags DDR_PHY_BIN_PATH=$(pwd) |
Madhukar Pappireddy | f93a4d4 | 2021-06-01 17:44:51 -0500 | [diff] [blame] | 421 | |
| 422 | #X509 Based CoT |
Jiafei Pan | e48e56c | 2021-09-30 10:32:54 +0800 | [diff] [blame] | 423 | clean_build PLAT=lx2162aqds $(common_flags) BOOT_MODE=flexspi_nor \ |
| 424 | $nxp_sb_flags GENERATE_COT=1 \ |
Madhukar Pappireddy | f93a4d4 | 2021-06-01 17:44:51 -0500 | [diff] [blame] | 425 | MBEDTLS_DIR=$(pwd)/mbedtls |
| 426 | |
| 427 | #BOOT_MODE=emmc and Stack protector |
Jiafei Pan | e48e56c | 2021-09-30 10:32:54 +0800 | [diff] [blame] | 428 | clean_build PLAT=lx2162aqds $(common_flags) BOOT_MODE=emmc \ |
| 429 | $nxp_sb_fuse_flags ENABLE_STACK_PROTECTOR=strong |
| 430 | |
| 431 | # Platform ls1028ardb |
| 432 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=flexspi_nor |
| 433 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=emmc |
| 434 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=sd |
| 435 | |
Jiafei Pan | 5aa8fc7 | 2021-11-17 22:12:12 +0800 | [diff] [blame] | 436 | # ls1028a Secure Boot |
Jiafei Pan | e48e56c | 2021-09-30 10:32:54 +0800 | [diff] [blame] | 437 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=flexspi_nor $nxp_sb_fuse_flags |
| 438 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=emmc $nxp_sb_fuse_flags |
| 439 | clean_build PLAT=ls1028ardb $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
Olivier Deprez | bac7019 | 2021-04-02 08:55:36 +0200 | [diff] [blame] | 440 | |
Jiafei Pan | 5aa8fc7 | 2021-11-17 22:12:12 +0800 | [diff] [blame] | 441 | # Platform ls1043ardb |
| 442 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=nor |
| 443 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=nand |
| 444 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=sd |
| 445 | |
| 446 | # ls1043ardb Secure Boot |
| 447 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=nor $nxp_sb_fuse_flags |
| 448 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=nand $nxp_sb_fuse_flags |
| 449 | clean_build PLAT=ls1043ardb $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 450 | |
Jiafei Pan | bd0c22a | 2022-01-29 00:04:44 +0800 | [diff] [blame] | 451 | # ls1046ardb Secure Boot |
| 452 | clean_build PLAT=ls1046ardb $(common_flags) all BOOT_MODE=qspi $nxp_sb_fuse_flags |
| 453 | clean_build PLAT=ls1046ardb $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 454 | clean_build PLAT=ls1046ardb $(common_flags) all BOOT_MODE=emmc $nxp_sb_fuse_flags |
| 455 | |
| 456 | # ls1046afrwy Secure Boot |
| 457 | clean_build PLAT=ls1046afrwy $(common_flags) all BOOT_MODE=qspi $nxp_sb_fuse_flags |
| 458 | clean_build PLAT=ls1046afrwy $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 459 | |
| 460 | # ls1046aqds Secure Boot |
| 461 | clean_build PLAT=ls1046aqds $(common_flags) all BOOT_MODE=qspi $nxp_sb_fuse_flags |
| 462 | clean_build PLAT=ls1046aqds $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 463 | clean_build PLAT=ls1046aqds $(common_flags) all BOOT_MODE=nor $nxp_sb_fuse_flags |
| 464 | clean_build PLAT=ls1046aqds $(common_flags) all BOOT_MODE=nand $nxp_sb_fuse_flags |
| 465 | |
Jiafei Pan | 332cd79 | 2022-02-24 16:44:48 +0800 | [diff] [blame] | 466 | # ls1088ardb Secure Boot |
| 467 | clean_build PLAT=ls1088ardb $(common_flags) all BOOT_MODE=qspi $nxp_sb_fuse_flags |
| 468 | clean_build PLAT=ls1088ardb $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 469 | |
| 470 | # ls1088aqds Secure Boot |
| 471 | clean_build PLAT=ls1088aqds $(common_flags) all BOOT_MODE=qspi $nxp_sb_fuse_flags |
| 472 | clean_build PLAT=ls1088aqds $(common_flags) all BOOT_MODE=sd $nxp_sb_fuse_flags |
| 473 | clean_build PLAT=ls1088aqds $(common_flags) all BOOT_MODE=nor $nxp_sb_fuse_flags |
| 474 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 475 | # Platforms from Intel |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 476 | make PLAT=stratix10 $(common_flags) all |
| 477 | make PLAT=agilex $(common_flags) all |
Sieu Mun Tang | 03b5736 | 2022-03-05 01:54:59 +0800 | [diff] [blame] | 478 | make PLAT=n5x $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 479 | |
| 480 | # Platforms from Broadcom |
Madhukar Pappireddy | 97ad258 | 2021-11-15 10:29:23 -0600 | [diff] [blame] | 481 | clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t \ |
| 482 | INCLUDE_EMMC_DRIVER_ERASE_CODE=1 DRIVER_I2C_ENABLE=1 |
| 483 | clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 \ |
| 484 | INCLUDE_EMMC_DRIVER_ERASE_CODE=1 USE_USB=yes |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 485 | |
| 486 | # Platforms from Marvell |
Madhukar Pappireddy | 4fce99e | 2021-09-15 14:33:35 -0500 | [diff] [blame] | 487 | make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null CM3_SYSTEM_RESET=1 \ |
Manish Pandey | 9ef33c5 | 2022-10-25 16:41:49 +0100 | [diff] [blame] | 488 | A3720_DB_PM_WAKEUP_SRC=1 HANDLE_EA_EL3_FIRST_NS=1 all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 489 | |
Leonardo Sandoval | c044377 | 2020-11-12 11:22:48 -0600 | [diff] [blame] | 490 | # Source files from mv-ddr-marvell repository are necessary |
| 491 | # to build below four platforms |
Manish Pandey | 7c1e745 | 2021-11-05 12:54:15 +0000 | [diff] [blame] | 492 | wget https://downloads.trustedfirmware.org/tf-a/mv-ddr-marvell/mv-ddr-marvell-5d41a995637de1dbc93f193db6ef0c8954cab316.tar.gz 2> /dev/null |
| 493 | tar -xzf mv-ddr-marvell-5d41a995637de1dbc93f193db6ef0c8954cab316.tar.gz 2> /dev/null |
Leonardo Sandoval | c044377 | 2020-11-12 11:22:48 -0600 | [diff] [blame] | 494 | mv mv-ddr-marvell drivers/marvell/mv_ddr |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 495 | |
Leonardo Sandoval | c044377 | 2020-11-12 11:22:48 -0600 | [diff] [blame] | 496 | # These platforms from Marvell have dependency on GCC-6.2.1 toolchain |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 497 | make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 498 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 499 | make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 500 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 501 | make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 502 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 503 | make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 504 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Robert Marko | df3319e | 2021-10-20 11:01:12 +0200 | [diff] [blame] | 505 | make PLAT=a70x0_mochabin DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
| 506 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 507 | make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 508 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Pali Rohár | 8f89040 | 2021-07-19 13:48:05 +0200 | [diff] [blame] | 509 | make PLAT=t9130 DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
Pali Rohár | c344a62 | 2021-07-15 22:01:04 +0200 | [diff] [blame] | 510 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Madhukar Pappireddy | 4fce99e | 2021-09-15 14:33:35 -0500 | [diff] [blame] | 511 | make PLAT=t9130_cex7_eval DEBUG=1 SCP_BL2=/dev/null BL33=/dev/null MV_DDR_PATH=$PWD/drivers/marvell/mv_ddr \ |
| 512 | CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all mrvl_flash |
Leonardo Sandoval | eb1d3ce | 2020-08-06 16:04:29 -0500 | [diff] [blame] | 513 | |
Leonardo Sandoval | c044377 | 2020-11-12 11:22:48 -0600 | [diff] [blame] | 514 | # Removing the source files |
| 515 | rm -rf drivers/marvell/mv_ddr 2> /dev/null |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 516 | |
| 517 | # Platforms from Meson |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 518 | make PLAT=gxbb $(common_flags) all |
| 519 | make PLAT=gxl $(common_flags) all |
| 520 | make PLAT=g12a $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 521 | |
| 522 | # Platforms from Renesas |
| 523 | # Renesas R-Car D3 Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 524 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 525 | BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \ |
| 526 | MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \ |
| 527 | RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \ |
| 528 | RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1 |
| 529 | |
| 530 | # Renesas R-Car H3 Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 531 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 532 | BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \ |
| 533 | MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \ |
| 534 | RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \ |
| 535 | TRUSTED_BOARD_BOOT=1 |
| 536 | |
| 537 | # Renesas R-Car H3N Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 538 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 539 | BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \ |
| 540 | SPD=opteed TRUSTED_BOARD_BOOT=1 |
| 541 | |
| 542 | # Renesas R-Car M3 Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 543 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 544 | BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \ |
| 545 | MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \ |
| 546 | RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \ |
| 547 | TRUSTED_BOARD_BOOT=1 |
| 548 | |
| 549 | # Renesas R-Car M3N Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 550 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 551 | BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \ |
| 552 | MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \ |
| 553 | RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1 |
| 554 | |
| 555 | # Renesas R-Car E3 Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 556 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 557 | BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \ |
| 558 | RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \ |
| 559 | RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1 |
| 560 | |
| 561 | # Renesas R-Car V3M Automotive SoC |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 562 | clean_build PLAT=rcar $(common_flags) BL32=Makefile \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 563 | MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \ |
| 564 | PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \ |
| 565 | AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1 |
| 566 | |
Zelalem | f429967 | 2021-01-29 12:52:59 -0600 | [diff] [blame] | 567 | # Renesas HiHope RZ/G2M development kit |
| 568 | clean_build PLAT=rzg $(common_flags) \ |
| 569 | MBEDTLS_DIR=$(pwd)/mbedtls LSI=G2M \ |
| 570 | RCAR_DRAM_SPLIT=2 RCAR_LOSSY_ENABLE=1 SPD=none |
| 571 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 572 | # Platforms from ST |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 573 | stm32mp1_common_flags="$(common_flags) \ |
| 574 | ARCH=aarch32 \ |
| 575 | ARM_ARCH_MAJOR=7 \ |
| 576 | CROSS_COMPILE=arm-none-eabi- \ |
| 577 | ENABLE_STACK_PROTECTOR=strong \ |
| 578 | PLAT=stm32mp1" |
| 579 | |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 580 | # STM32MP1 SDMMC boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 581 | make ${stm32mp1_common_flags} STM32MP_SDMMC=1 \ |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 582 | BUILD_PLAT=build/stm32mp1-sdmmc/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 583 | AARCH32_SP=sp_min bl2 bl32 |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 584 | |
| 585 | # STM32MP1 eMMC boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 586 | make ${stm32mp1_common_flags} STM32MP_EMMC=1 \ |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 587 | BUILD_PLAT=build/stm32mp1-emmc/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 588 | AARCH32_SP=sp_min bl2 bl32 |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 589 | |
| 590 | # STM32MP1 Raw NAND boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 591 | make ${stm32mp1_common_flags} STM32MP_RAW_NAND=1 \ |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 592 | BUILD_PLAT=build/stm32mp1-nand/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 593 | AARCH32_SP=sp_min bl2 bl32 |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 594 | |
| 595 | # STM32MP1 SPI NAND boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 596 | make ${stm32mp1_common_flags} STM32MP_SPI_NAND=1 \ |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 597 | BUILD_PLAT=build/stm32mp1-snand/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 598 | AARCH32_SP=sp_min bl2 bl32 |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 599 | |
| 600 | # STM32MP1 SPI NOR boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 601 | make ${stm32mp1_common_flags} STM32MP_SPI_NOR=1 \ |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 602 | BUILD_PLAT=build/stm32mp1-snor/debug \ |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 603 | AARCH32_SP=sp_min bl2 bl32 |
Yann Gautier | a69cf79 | 2021-09-01 11:19:01 +0200 | [diff] [blame] | 604 | |
Patrick Delaunay | d2017a4 | 2021-11-02 14:57:50 +0100 | [diff] [blame] | 605 | # STM32MP1 UART boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 606 | make ${stm32mp1_common_flags} STM32MP_UART_PROGRAMMER=1 \ |
Patrick Delaunay | d2017a4 | 2021-11-02 14:57:50 +0100 | [diff] [blame] | 607 | BUILD_PLAT=build/stm32mp1-uart/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 608 | AARCH32_SP=sp_min bl2 bl32 |
Patrick Delaunay | d2017a4 | 2021-11-02 14:57:50 +0100 | [diff] [blame] | 609 | |
Patrick Delaunay | 7d65acf | 2021-09-10 15:58:26 +0200 | [diff] [blame] | 610 | # STM32MP1 USB boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 611 | make ${stm32mp1_common_flags} STM32MP_USB_PROGRAMMER=1 \ |
Patrick Delaunay | 7d65acf | 2021-09-10 15:58:26 +0200 | [diff] [blame] | 612 | BUILD_PLAT=build/stm32mp1-usb/debug \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 613 | AARCH32_SP=sp_min bl2 bl32 |
Patrick Delaunay | 7d65acf | 2021-09-10 15:58:26 +0200 | [diff] [blame] | 614 | |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 615 | # STM32MP1 TBBR |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 616 | make ${stm32mp1_common_flags} STM32MP_SDMMC=1 \ |
Yann Gautier | 741e849 | 2022-11-14 19:04:27 +0100 | [diff] [blame] | 617 | BUILD_PLAT=build/stm32mp1-sdmmc-tbbr/debug \ |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 618 | MBEDTLS_DIR=$(pwd)/mbedtls TRUSTED_BOARD_BOOT=1 \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 619 | AARCH32_SP=sp_min bl2 bl32 |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 620 | |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 621 | stm32mp13_common_flags="${stm32mp1_common_flags} \ |
| 622 | AARCH32_SP=optee \ |
| 623 | STM32MP13=1" |
| 624 | |
Yann Gautier | 773c550 | 2022-03-10 17:24:47 +0100 | [diff] [blame] | 625 | # STM32MP13 SDMMC boot |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 626 | make ${stm32mp13_common_flags} STM32MP_SDMMC=1 \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 627 | BUILD_PLAT=build/stm32mp1-mp13-sdmmc/debug bl2 |
Yann Gautier | 773c550 | 2022-03-10 17:24:47 +0100 | [diff] [blame] | 628 | |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 629 | # STM32MP13 TBBR |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 630 | make ${stm32mp13_common_flags} STM32MP_SDMMC=1 \ |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 631 | MBEDTLS_DIR=$(pwd)/mbedtls TRUSTED_BOARD_BOOT=1 \ |
Yann Gautier | dfd8aa8 | 2022-11-02 14:34:26 +0100 | [diff] [blame] | 632 | BUILD_PLAT=build/stm32mp1-mp13-sdmmc-tbbr/debug bl2 |
Lionel Debieve | 8f464c0 | 2022-10-13 09:25:45 +0200 | [diff] [blame] | 633 | |
Yann Gautier | a66e501 | 2022-12-13 13:52:35 +0100 | [diff] [blame] | 634 | # STM32MP13 TBBR DECRYPTION AES GCM |
Govindraj Raja | 95f855c | 2023-03-01 13:11:42 +0000 | [diff] [blame] | 635 | make ${stm32mp13_common_flags} STM32MP_SDMMC=1 \ |
Yann Gautier | a66e501 | 2022-12-13 13:52:35 +0100 | [diff] [blame] | 636 | MBEDTLS_DIR=$(pwd)/mbedtls TRUSTED_BOARD_BOOT=1 \ |
| 637 | DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL32=1 \ |
| 638 | BUILD_PLAT=build/stm32mp1-mp13-sdmmc-tbbr-dec/debug bl2 |
| 639 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 640 | # Platforms from TI |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 641 | make PLAT=k3 $(common_flags) all |
Hari Nagalla | dadd89f | 2022-08-30 12:10:00 -0500 | [diff] [blame] | 642 | make PLAT=k3 TARGET_BOARD=j784s4 $(common_flags) all |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 643 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 644 | clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 645 | # Use GICV3 driver |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 646 | clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 647 | ENABLE_STACK_PROTECTOR=strong |
| 648 | # Use encrypted FIP feature. |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 649 | clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 650 | BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \ |
| 651 | ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed |
Jens Wiklander | 1a9c2be | 2021-11-26 09:56:55 +0100 | [diff] [blame] | 652 | # QEMU with SPMD support |
| 653 | clean_build PLAT=qemu $(common_flags) BL32=Makefile \ |
| 654 | BL32_RAM_LOCATION=tdram ARM_BL31_IN_DRAM=1 \ |
| 655 | SPD=spmd CTX_INCLUDE_EL2_REGS=0 SPMD_SPM_AT_SEL2=0 SPMC_OPTEE=1 |
Ruchika Gupta | 86e7f68 | 2022-04-12 10:25:46 +0530 | [diff] [blame] | 656 | # Measured Boot |
laurenw-arm | 8531e70 | 2022-06-09 15:32:37 -0500 | [diff] [blame] | 657 | clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} MBOOT_EL_HASH_ALG=sha256 MEASURED_BOOT=1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 658 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 659 | clean_build PLAT=qemu_sbsa $(common_flags) |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 660 | |
Zelalem | d86e876 | 2020-08-21 18:24:28 -0500 | [diff] [blame] | 661 | # QEMU with SPM support |
| 662 | clean_build PLAT=qemu_sbsa $(common_flags) BL32=Makefile SPM_MM=1 \ |
Paul Sokolovsky | cf9fe86 | 2023-01-02 16:22:21 +0300 | [diff] [blame] | 663 | EL3_EXCEPTION_HANDLING=1 ENABLE_SME_FOR_NS=0 ENABLE_SVE_FOR_NS=0 |
Zelalem | d86e876 | 2020-08-21 18:24:28 -0500 | [diff] [blame] | 664 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 665 | # For hikey enable PMF to include all files in the platform port |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 666 | make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all |
| 667 | make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all |
Lukas Hanel | d075239 | 2022-10-13 11:13:19 +0200 | [diff] [blame] | 668 | make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} SPD=spmd SPMC_AT_EL3=1 \ |
| 669 | SPMD_SPM_AT_SEL2=0 BL32=optee PLAT_SP_MANIFEST_DTS=foo NEED_FDT=no all |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 670 | make PLAT=poplar $(common_flags) all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 671 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 672 | # Platforms from Socionext |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 673 | clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd |
| 674 | clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1 |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 675 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 676 | clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \ |
Jassi Brar | 8608092 | 2022-06-27 14:16:34 -0500 | [diff] [blame] | 677 | RESET_TO_BL31=1 EL3_EXCEPTION_HANDLING=1 ENABLE_SVE_FOR_NS=0 \ |
| 678 | PRELOADED_BL33_BASE=0x0 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 679 | |
| 680 | # Support for SCP Message Interface protocol with platform specific drivers |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 681 | clean_build PLAT=synquacer $(common_flags) \ |
Jassi Brar | 8608092 | 2022-06-27 14:16:34 -0500 | [diff] [blame] | 682 | RESET_TO_BL31=1 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 683 | |
Jassi Brar | b8c7ca0 | 2022-06-27 14:22:10 -0500 | [diff] [blame] | 684 | # Support for BL2 and TBBR |
| 685 | clean_build PLAT=synquacer $(common_flags) \ |
| 686 | MBEDTLS_DIR=$(pwd)/mbedtls TRUSTED_BOARD_BOOT=1 \ |
| 687 | SQ_USE_SCMI_DRIVER=1 SPD=opteed all |
| 688 | |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 689 | make PLAT=poplar $(common_flags) all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 690 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 691 | # Raspberry Pi Platforms |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 692 | make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \ |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 693 | ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all |
Andre Przywara | e917ec8 | 2021-09-03 15:01:30 +0100 | [diff] [blame] | 694 | clean_build PLAT=rpi4 $(common_flags) SMC_PCI_SUPPORT=1 all |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 695 | |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 696 | # A113D (AXG) platform. |
Leonardo Sandoval | 97e2ef0 | 2020-08-06 13:29:08 -0500 | [diff] [blame] | 697 | clean_build PLAT=axg $(common_flags) SPD=opteed |
| 698 | clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1 |
Zelalem | c9531f8 | 2020-08-04 15:37:08 -0500 | [diff] [blame] | 699 | |
Stephan Gerhold | 141a766 | 2021-12-07 20:42:14 +0100 | [diff] [blame] | 700 | # QTI MSM8916 platform |
| 701 | clean_build PLAT=msm8916 $(common_flags) |
| 702 | |
Fathi Boudra | 422bf77 | 2019-12-02 11:10:16 +0200 | [diff] [blame] | 703 | cd .. |