blob: 287cf6f43025846e5e6277c22560955e1aefbf78 [file] [log] [blame]
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -05001#!/usr/bin/env bash
Fathi Boudra422bf772019-12-02 11:10:16 +02002#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050027containing_dir="$(readlink -f "$(dirname "$0")/")"
28. $containing_dir/common-def.sh
29
Fathi Boudra422bf772019-12-02 11:10:16 +020030# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
31# support. The version of mbed TLS to use here must be the same as when
32# building TF in the usual context.
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050033if [ ! -d "$MBED_TLS_DIR" ]; then
34 git clone -q --depth 1 -b "$MBED_TLS_SOURCES_TAG" "$MBED_TLS_URL_REPO" "$MBED_TLS_DIR"
Fathi Boudra422bf772019-12-02 11:10:16 +020035fi
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050036
Fathi Boudra422bf772019-12-02 11:10:16 +020037cd "$TF_SOURCES"
38
39# Clean TF source dir to make sure we don't analyse temporary files.
40make distclean
41
42#
43# Build TF in different configurations to get as much coverage as possible
44#
45
Fathi Boudra422bf772019-12-02 11:10:16 +020046#
47# FVP platform
48# We'll use the following flags for all FVP builds.
49#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050050fvp_common_flags="$(common_flags) PLAT=fvp"
Fathi Boudra422bf772019-12-02 11:10:16 +020051
52# Try all possible SPDs.
53clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
54clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
55 TSP_NS_INTR_ASYNC_PREEMPT=1
56clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
57clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
58
Zelalemc9531f82020-08-04 15:37:08 -050059# Dualroot chain of trust.
60clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
61
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050062clean_build $fvp_common_flags SPD=trusty
63clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
Fathi Boudra422bf772019-12-02 11:10:16 +020064
65# SDEI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050066clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +020067
Zelalemc9531f82020-08-04 15:37:08 -050068# SDEI with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050069clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Zelalemc9531f82020-08-04 15:37:08 -050070
71# Secure interrupt descriptors with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050072clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1
Zelalemc9531f82020-08-04 15:37:08 -050073
Fathi Boudra422bf772019-12-02 11:10:16 +020074# Without coherent memory
75clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
76
77# Using PSCI extended State ID format rather than the original format
78clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
79 ARM_RECOM_STATE_ID_ENC=1
80
81# Alternative boot flows (This changes some of the platform initialisation code)
82clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
83clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
84
85# Using the SP804 timer instead of the Generic Timer
86clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
87
88# Using the CCN driver and multi cluster topology
89clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
90
91# PMF
92clean_build $fvp_common_flags ENABLE_PMF=1
93
94# stack protector
95clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
96
97# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050098clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +020099 ARCH=aarch32 AARCH32_SP=sp_min \
100 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500101clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200102 ARCH=aarch32 AARCH32_SP=sp_min
103
104# Xlat tables lib version 1 (AArch64 and AArch32)
105clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500106clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200107 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
108
Zelalemc9531f82020-08-04 15:37:08 -0500109# SPM support based on Management Mode Interface Specification
110clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200111
Zelalemc9531f82020-08-04 15:37:08 -0500112# SPM support with TOS(optee) as SPM sitting at S-EL1
113clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
114
115# SPM support with Secure hafnium as SPM sitting at S-EL2
116# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
117# if we have NULL value to it, so passing a dummy string.
118clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
Max Shvetsov44d2a702021-02-18 16:41:45 +0000119 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200120
121#BL2 at EL3 support
122clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500123clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200124 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
125
Zelalemc9531f82020-08-04 15:37:08 -0500126# RAS Extension Support
127clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
128 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
129 SDEI_SUPPORT=1
130
131# Hardware Assisted Coherency(DynamIQ)
132clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
133 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
134
135# Pointer Authentication Support
136clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
137 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
138
139# Undefined Behaviour Sanitizer
140# Building with UBSAN SANITIZE_UB=on increases the executable size.
141# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
142make $fvp_common_flags clean
143make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
144
145# debugfs feature
146clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
147
148# MPAM feature
149clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
150
151# Using GICv3.1 driver with extended PPI and SPI range
152clean_build $fvp_common_flags GIC_EXT_INTID=1
153
154# Using GICv4 features with extended PPI and SPI range
155clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
156
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100157# Measured Boot
158clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
159
Manish V Badarkhe447e31a2020-09-03 07:57:17 +0100160# CoT descriptors in device tree
Manish V Badarkhe81102d12020-10-05 08:02:30 +0100161clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} COT_DESC_IN_DTB=1 USE_ROMLIB=1
Manish V Badarkhe447e31a2020-09-03 07:57:17 +0100162
Fathi Boudra422bf772019-12-02 11:10:16 +0200163#
164# Juno platform
165# We'll use the following flags for all Juno builds.
166#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500167juno_common_flags="$(common_flags) PLAT=juno"
Fathi Boudra422bf772019-12-02 11:10:16 +0200168clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
169clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
Madhukar Pappireddydcb31f62021-05-06 11:36:36 -0500170clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong ARM_ETHOSN_NPU_DRIVER=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200171clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500172
Leonardo Sandoval5163b562020-11-20 17:17:59 -0600173clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200174
175#
176# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500177# Enable build config with RAS_EXTENSION to cover more files
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500178make $(common_flags) PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500179 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200180
181#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530182# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200183#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500184make $(common_flags) PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200185
186#
187# System Guidance for Infrastructure platform RD-E1Edge
188#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500189make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500190
191#
Aditya Angadi634d61f2021-01-04 09:30:20 +0530192# Reference Design platform RD-V1
Zelalemc9531f82020-08-04 15:37:08 -0500193#
Aditya Angadi634d61f2021-01-04 09:30:20 +0530194make $(common_flags) PLAT=rdv1 ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500195
196#
Aditya Angadi61c54762021-01-04 09:30:52 +0530197# Reference Design platform RD-V1-MC
Zelalemc9531f82020-08-04 15:37:08 -0500198#
Aditya Angadi61c54762021-01-04 09:30:52 +0530199make $(common_flags) PLAT=rdv1mc ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
Zelalemc9531f82020-08-04 15:37:08 -0500200
201#
Vijayenthiran Subramaniama66de332020-11-23 14:20:14 +0530202# Reference Design Platform RD-N2
203#
204make $(common_flags) PLAT=rdn2 ${ARM_TBB_OPTIONS} all
205
206#
Zelalemc9531f82020-08-04 15:37:08 -0500207# Neoverse N1 SDP platform
208#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500209make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500210
211#
212# FVP VE platform
213#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500214make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500215 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
216 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
217 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
218
219#
220# A5 DesignStart Platform
221#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500222make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500223 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
224 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
225
226#
227# Corstone700 Platform
228#
229
230corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500231 $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500232 PLAT=corstone700 \
233 ARCH=aarch32 \
234 RESET_TO_SP_MIN=1 \
235 AARCH32_SP=sp_min \
236 ARM_LINUX_KERNEL_AS_BL33=0 \
237 ARM_PRELOADED_DTB_BASE=0x80400000 \
238 ENABLE_PIE=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500239 ENABLE_STACK_PROTECTOR=all \
240 all"
241
242echo "Info: Building Corstone700 FVP ..."
243
244make TARGET_PLATFORM=fvp ${corstone700_common_flags}
245
246echo "Info: Building Corstone700 FPGA ..."
247
248make TARGET_PLATFORM=fpga ${corstone700_common_flags}
249
250#
251# Arm internal FPGA port
252#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500253make PLAT=arm_fpga $(common_flags) CROSS_COMPILE=aarch64-none-elf- \
Zelalemc9531f82020-08-04 15:37:08 -0500254 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
255
256#
257# Total Compute platform
258#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500259make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200260
Chandni Cherukurifb803e12020-10-01 17:49:08 +0530261#
262# Morello platform
263#
264make $(common_flags) PLAT=morello all
265
Fathi Boudra422bf772019-12-02 11:10:16 +0200266# Partners' platforms.
267# Enable as many features as possible.
268# We don't need to clean between each build here because we only do one build
269# per platform so we don't hit the build flags dependency problem.
Fathi Boudra422bf772019-12-02 11:10:16 +0200270
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500271make PLAT=mt8173 $(common_flags) all
272make PLAT=mt8183 $(common_flags) all
Zelalemd86e8762020-08-21 18:24:28 -0500273make PLAT=mt8192 $(common_flags) COREBOOT=1 all
274
275# Platforms from Qualcomm
276make PLAT=sc7180 $(common_flags) COREBOOT=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200277
Zelalemc9531f82020-08-04 15:37:08 -0500278make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500279 $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all
Madhukar Pappireddyd491ad02020-12-03 10:37:05 -0600280make PLAT=rk3368 $(common_flags) COREBOOT=1 \
281 ENABLE_STACK_PROTECTOR=strong all
282make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 \
283 ENABLE_STACK_PROTECTOR=strong all
284make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 \
285 ENABLE_STACK_PROTECTOR=strong all
286make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 \
287 ENABLE_STACK_PROTECTOR=strong all
Fathi Boudra422bf772019-12-02 11:10:16 +0200288
289# Although we do several consecutive builds for the Tegra platform below, we
290# don't need to clean between each one because the Tegra makefiles specify
291# a different build directory per SoC.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500292make PLAT=tegra TARGET_SOC=t210 $(common_flags) all
293make PLAT=tegra TARGET_SOC=t132 $(common_flags) all
294make PLAT=tegra TARGET_SOC=t186 $(common_flags) all
295make PLAT=tegra TARGET_SOC=t194 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200296
297# For the Xilinx platform, artificially increase the extents of BL31 memory
298# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
299# If we keep the default values, BL31 doesn't fit when it is built with all
300# these build flags.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500301make PLAT=zynqmp $(common_flags) \
Fathi Boudra422bf772019-12-02 11:10:16 +0200302 RESET_TO_BL31=1 SPD=tspd \
303 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
304 all
305
Zelalemc9531f82020-08-04 15:37:08 -0500306# Build both for silicon (default) and virtual QEMU platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500307clean_build PLAT=versal $(common_flags)
308clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt
Zelalemc9531f82020-08-04 15:37:08 -0500309
310# Platforms from Allwinner
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500311make PLAT=sun50i_a64 $(common_flags) all
312make PLAT=sun50i_h6 $(common_flags) all
Olivier Deprez7285a3f2021-04-02 09:41:40 +0200313make PLAT=sun50i_h616 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500314
315# Platforms from i.MX
316make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
317 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500318 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500319make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500320 $(common_flags) all
321make PLAT=imx8mm $(common_flags) all
322make PLAT=imx8mn $(common_flags) all
323make PLAT=imx8mp $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500324
325# Temporarily building in release mode until the following ticket is resolved:
326# https://developer.trustedfirmware.org/T626
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500327# make PLAT=imx8mq $(common_flags) all
328make PLAT=imx8mq $(common_flags release) all
Zelalemc9531f82020-08-04 15:37:08 -0500329
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500330make PLAT=imx8qm $(common_flags) all
331make PLAT=imx8qx $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500332
Olivier Deprezbac70192021-04-02 08:55:36 +0200333# Platforms for NXP Layerscape
334make PLAT=lx2160aqds $(common_flags) all
335make PLAT=lx2160ardb $(common_flags) all
336make PLAT=lx2162aqds $(common_flags) all
337
Zelalemc9531f82020-08-04 15:37:08 -0500338# Platforms from Intel
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500339make PLAT=stratix10 $(common_flags) all
340make PLAT=agilex $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500341
342# Platforms from Broadcom
Olivier Deprez07cc98b2021-04-02 09:56:55 +0200343clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1 DRIVER_I2C_ENABLE=1
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500344clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
Zelalemc9531f82020-08-04 15:37:08 -0500345
346# Platforms from Marvell
Madhukar Pappireddy778684b2021-01-12 11:53:02 -0600347make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null CM3_SYSTEM_RESET=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500348
Leonardo Sandovalc0443772020-11-12 11:22:48 -0600349# Source files from mv-ddr-marvell repository are necessary
350# to build below four platforms
351wget https://downloads.trustedfirmware.org/tf-a/mv-ddr-marvell/mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
352tar -xzf mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
353mv mv-ddr-marvell drivers/marvell/mv_ddr
Zelalemc9531f82020-08-04 15:37:08 -0500354
Leonardo Sandovalc0443772020-11-12 11:22:48 -0600355# These platforms from Marvell have dependency on GCC-6.2.1 toolchain
356make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
357 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
358make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
359 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
360make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
361 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
362make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
363 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
364make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
365 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
366make PLAT=t9130 DEBUG=1 SCP_BL2=/dev/null \
367 CROSS_COMPILE="$(set_cross_compile_gcc_linaro_toolchain)" all
Leonardo Sandovaleb1d3ce2020-08-06 16:04:29 -0500368
Leonardo Sandovalc0443772020-11-12 11:22:48 -0600369# Removing the source files
370rm -rf drivers/marvell/mv_ddr 2> /dev/null
Zelalemc9531f82020-08-04 15:37:08 -0500371
372# Platforms from Meson
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500373make PLAT=gxbb $(common_flags) all
374make PLAT=gxl $(common_flags) all
375make PLAT=g12a $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500376
377# Platforms from Renesas
378# Renesas R-Car D3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500379clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500380 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
381 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
382 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
383 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
384
385# Renesas R-Car H3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500386clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500387 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
388 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
389 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
390 TRUSTED_BOARD_BOOT=1
391
392# Renesas R-Car H3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500393clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500394 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
395 SPD=opteed TRUSTED_BOARD_BOOT=1
396
397# Renesas R-Car M3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500398clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500399 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
400 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
401 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
402 TRUSTED_BOARD_BOOT=1
403
404# Renesas R-Car M3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500405clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500406 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
407 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
408 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
409
410# Renesas R-Car E3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500411clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500412 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
413 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
414 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
415
416# Renesas R-Car V3M Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500417clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500418 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
419 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
420 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
421
Zelalemf4299672021-01-29 12:52:59 -0600422# Renesas HiHope RZ/G2M development kit
423clean_build PLAT=rzg $(common_flags) \
424 MBEDTLS_DIR=$(pwd)/mbedtls LSI=G2M \
425 RCAR_DRAM_SPLIT=2 RCAR_LOSSY_ENABLE=1 SPD=none
426
Zelalemc9531f82020-08-04 15:37:08 -0500427# Platforms from ST
428make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500429 $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500430 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
431 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
432
433# Platforms from TI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500434make PLAT=k3 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500435
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500436clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500437# Use GICV3 driver
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500438clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
Zelalemc9531f82020-08-04 15:37:08 -0500439 ENABLE_STACK_PROTECTOR=strong
440# Use encrypted FIP feature.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500441clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500442 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
443 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
444
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500445clean_build PLAT=qemu_sbsa $(common_flags)
Fathi Boudra422bf772019-12-02 11:10:16 +0200446
Zelalemd86e8762020-08-21 18:24:28 -0500447# QEMU with SPM support
448clean_build PLAT=qemu_sbsa $(common_flags) BL32=Makefile SPM_MM=1 \
449 EL3_EXCEPTION_HANDLING=1
450
Fathi Boudra422bf772019-12-02 11:10:16 +0200451# For hikey enable PMF to include all files in the platform port
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500452make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
453make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
454make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200455
Zelalemc9531f82020-08-04 15:37:08 -0500456# Platforms from Socionext
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500457clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd
458clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200459
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500460clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500461 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
462
463# Support for SCP Message Interface protocol with platform specific drivers
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500464clean_build PLAT=synquacer $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500465 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
466
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500467make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200468
Zelalemc9531f82020-08-04 15:37:08 -0500469# Raspberry Pi Platforms
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500470make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500471 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500472make PLAT=rpi4 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200473
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500474# Cannot use $(common_flags) for LS1043 platform, as then
Fathi Boudra422bf772019-12-02 11:10:16 +0200475# the binaries do not fit in memory.
476clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
477clean_build PLAT=ls1043 SPD=tspd
478
Zelalemc9531f82020-08-04 15:37:08 -0500479# A113D (AXG) platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500480clean_build PLAT=axg $(common_flags) SPD=opteed
481clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1
Zelalemc9531f82020-08-04 15:37:08 -0500482
Fathi Boudra422bf772019-12-02 11:10:16 +0200483cd ..