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Jose Marinho4e4e4d52019-02-22 16:23:51 +00001/*
2 * Copyright 2019 The Hafnium Authors.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Jose Marinho4e4e4d52019-02-22 16:23:51 +000017#pragma once
18
Jose Marinho75509b42019-04-09 09:34:59 +010019#include "hf/types.h"
20
Jose Marinho4e4e4d52019-02-22 16:23:51 +000021/* clang-format off */
22
23#define SPCI_LOW_32_ID 0x84000060
24#define SPCI_HIGH_32_ID 0x8400007F
25#define SPCI_LOW_64_ID 0xC4000060
26#define SPCI_HIGH_32_ID 0x8400007F
27
28/* SPCI function identifiers. */
Andrew Walbran0de4f162019-09-03 16:44:20 +010029#define SPCI_ERROR_32 0x84000060
30#define SPCI_SUCCESS_32 0x84000061
31#define SPCI_INTERRUPT_32 0x84000062
32#define SPCI_VERSION_32 0x84000063
Jose Marinho021528f2019-10-08 17:21:20 +010033#define SPCI_FEATURES_32 0x84000064
34#define SPCI_RX_RELEASE_32 0x84000065
35#define SPCI_RXTX_MAP_32 0x84000066
36#define SPCI_RXTX_UNMAP_32 0x84000067
37#define SPCI_PARTITION_INFO_GET_32 0x84000068
38#define SPCI_ID_GET_32 0x84000069
Andrew Walbran0de4f162019-09-03 16:44:20 +010039#define SPCI_MSG_POLL_32 0x8400006A
Jose Marinho021528f2019-10-08 17:21:20 +010040#define SPCI_MSG_WAIT_32 0x8400006B
41#define SPCI_YIELD_32 0x8400006C
Andrew Walbran0de4f162019-09-03 16:44:20 +010042#define SPCI_RUN_32 0x8400006D
Jose Marinho021528f2019-10-08 17:21:20 +010043#define SPCI_MSG_SEND_32 0x8400006E
44#define SPCI_MSG_SEND_DIRECT_REQ_32 0x8400006F
45#define SPCI_MSG_SEND_DIRECT_RESP_32 0x84000070
Andrew Walbrane908c4a2019-12-02 17:13:47 +000046#define SPCI_MEM_DONATE_32 0x84000071
47#define SPCI_MEM_LEND_32 0x84000072
48#define SPCI_MEM_SHARE_32 0x84000073
Jose Marinho4e4e4d52019-02-22 16:23:51 +000049
Andrew Walbran0de4f162019-09-03 16:44:20 +010050/* SPCI error codes. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +000051#define SPCI_NOT_SUPPORTED INT32_C(-1)
52#define SPCI_INVALID_PARAMETERS INT32_C(-2)
53#define SPCI_NO_MEMORY INT32_C(-3)
54#define SPCI_BUSY INT32_C(-4)
55#define SPCI_INTERRUPTED INT32_C(-5)
56#define SPCI_DENIED INT32_C(-6)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000057#define SPCI_RETRY INT32_C(-7)
Andrew Walbranf0c314d2019-10-02 14:24:26 +010058#define SPCI_ABORTED INT32_C(-8)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000059
60/* SPCI function specific constants. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010061#define SPCI_MSG_RECV_BLOCK 0x1
Andrew Scull1262ac22019-04-05 12:44:26 +010062#define SPCI_MSG_RECV_BLOCK_MASK 0x1
Jose Marinho4e4e4d52019-02-22 16:23:51 +000063
64#define SPCI_MSG_SEND_NOTIFY 0x1
Andrew Walbran70bc8622019-10-07 14:15:58 +010065#define SPCI_MSG_SEND_NOTIFY_MASK 0x1
Andrew Scull1262ac22019-04-05 12:44:26 +010066
Andrew Walbranf0c314d2019-10-02 14:24:26 +010067#define SPCI_SLEEP_INDEFINITE 0
68
Andrew Walbranbfffb0f2019-11-05 14:02:34 +000069/**
70 * For use where the SPCI specification refers explicitly to '4K pages'. Not to
71 * be confused with PAGE_SIZE, which is the translation granule Hafnium is
72 * configured to use.
73 */
74#define SPCI_PAGE_SIZE 4096
75
Andrew Scull1262ac22019-04-05 12:44:26 +010076/* The maximum length possible for a single message. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010077#define SPCI_MSG_PAYLOAD_MAX HF_MAILBOX_SIZE
Jose Marinho713f13a2019-05-21 11:54:16 +010078
Andrew Walbranf5972182019-10-15 15:41:26 +010079enum spci_memory_access {
80 SPCI_MEMORY_RO_NX,
81 SPCI_MEMORY_RO_X,
82 SPCI_MEMORY_RW_NX,
83 SPCI_MEMORY_RW_X,
Jose Marinho713f13a2019-05-21 11:54:16 +010084};
85
Andrew Walbranf5972182019-10-15 15:41:26 +010086enum spci_memory_type {
87 SPCI_MEMORY_DEVICE_MEM,
88 SPCI_MEMORY_NORMAL_MEM,
Jose Marinho713f13a2019-05-21 11:54:16 +010089};
90
Andrew Walbranf5972182019-10-15 15:41:26 +010091enum spci_memory_cacheability {
92 SPCI_MEMORY_CACHE_RESERVED = 0x0,
93 SPCI_MEMORY_CACHE_NON_CACHEABLE = 0x1,
94 SPCI_MEMORY_CACHE_WRITE_THROUGH = 0x2,
95 SPCI_MEMORY_CACHE_WRITE_BACK = 0x4,
96 SPCI_MEMORY_DEV_NGNRNE = 0x0,
97 SPCI_MEMORY_DEV_NGNRE = 0x1,
98 SPCI_MEMORY_DEV_NGRE = 0x2,
99 SPCI_MEMORY_DEV_GRE = 0x3,
Jose Marinho713f13a2019-05-21 11:54:16 +0100100};
101
Andrew Walbranf5972182019-10-15 15:41:26 +0100102enum spci_memory_shareability {
103 SPCI_MEMORY_SHARE_NON_SHAREABLE,
104 SPCI_MEMORY_RESERVED,
105 SPCI_MEMORY_OUTER_SHAREABLE,
106 SPCI_MEMORY_INNER_SHAREABLE,
Jose Marinho713f13a2019-05-21 11:54:16 +0100107};
108
Andrew Walbranf5972182019-10-15 15:41:26 +0100109#define SPCI_MEMORY_ACCESS_OFFSET (0x5U)
110#define SPCI_MEMORY_ACCESS_MASK ((0x3U) << SPCI_MEMORY_ACCESS_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100111
Andrew Walbranf5972182019-10-15 15:41:26 +0100112#define SPCI_MEMORY_TYPE_OFFSET (0x4U)
113#define SPCI_MEMORY_TYPE_MASK ((0x1U) << SPCI_MEMORY_TYPE_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100114
Andrew Walbranf5972182019-10-15 15:41:26 +0100115#define SPCI_MEMORY_CACHEABILITY_OFFSET (0x2U)
116#define SPCI_MEMORY_CACHEABILITY_MASK ((0x3U) <<\
117 SPCI_MEMORY_CACHEABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100118
Andrew Walbranf5972182019-10-15 15:41:26 +0100119#define SPCI_MEMORY_SHAREABILITY_OFFSET (0x0U)
120#define SPCI_MEMORY_SHAREABILITY_MASK ((0x3U) <<\
121 SPCI_MEMORY_SHAREABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100122
123#define LEND_ATTR_FUNCTION_SET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100124static inline void spci_set_memory_##name##_attr(uint16_t *attr,\
125 const enum spci_memory_##name perm)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100126{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100127 *attr = (*attr & ~(mask)) | ((perm << offset) & mask);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100128}
129
130#define LEND_ATTR_FUNCTION_GET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100131static inline enum spci_memory_##name spci_get_memory_##name##_attr(\
132 uint16_t attr)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100133{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100134 return (enum spci_memory_##name)((attr & mask) >> offset);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100135}
136
Andrew Walbranf5972182019-10-15 15:41:26 +0100137LEND_ATTR_FUNCTION_SET(access, SPCI_MEMORY_ACCESS_OFFSET,
138 SPCI_MEMORY_ACCESS_MASK)
139LEND_ATTR_FUNCTION_GET(access, SPCI_MEMORY_ACCESS_OFFSET,
140 SPCI_MEMORY_ACCESS_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100141
Andrew Walbranf5972182019-10-15 15:41:26 +0100142LEND_ATTR_FUNCTION_SET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
143LEND_ATTR_FUNCTION_GET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100144
Andrew Walbranf5972182019-10-15 15:41:26 +0100145LEND_ATTR_FUNCTION_SET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
146 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100147
Andrew Walbranf5972182019-10-15 15:41:26 +0100148LEND_ATTR_FUNCTION_GET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
149 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100150
Andrew Walbranf5972182019-10-15 15:41:26 +0100151LEND_ATTR_FUNCTION_SET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
152 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100153
Andrew Walbranf5972182019-10-15 15:41:26 +0100154LEND_ATTR_FUNCTION_GET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
155 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100156
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000157/* clang-format on */
158
Fuad Tabba494376e2019-08-05 12:35:10 +0100159/** The ID of a VM. These are assigned sequentially starting with an offset. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000160typedef uint16_t spci_vm_id_t;
Jose Marinho75509b42019-04-09 09:34:59 +0100161typedef uint32_t spci_memory_handle_t;
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000162
Andrew Walbran52d99672019-06-25 15:51:11 +0100163/**
164 * A count of VMs. This has the same range as the VM IDs but we give it a
165 * different name to make the different semantics clear.
166 */
167typedef spci_vm_id_t spci_vm_count_t;
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100168
169/** The index of a vCPU within a particular VM. */
Andrew Walbranb037d5b2019-06-25 17:19:41 +0100170typedef uint16_t spci_vcpu_index_t;
Andrew Walbran52d99672019-06-25 15:51:11 +0100171
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100172/**
173 * A count of vCPUs. This has the same range as the vCPU indices but we give it
174 * a different name to make the different semantics clear.
175 */
176typedef spci_vcpu_index_t spci_vcpu_count_t;
177
Andrew Walbranf18e63c2019-10-07 15:13:59 +0100178/** Parameter and return type of SPCI functions. */
Andrew Walbran7f920af2019-09-03 17:09:30 +0100179struct spci_value {
180 uint64_t func;
181 uint64_t arg1;
182 uint64_t arg2;
183 uint64_t arg3;
184 uint64_t arg4;
185 uint64_t arg5;
186 uint64_t arg6;
187 uint64_t arg7;
188};
Jose Marinho75509b42019-04-09 09:34:59 +0100189
Andrew Walbrand4d2fa12019-10-01 16:47:25 +0100190static inline spci_vm_id_t spci_msg_send_sender(struct spci_value args)
191{
192 return (args.arg1 >> 16) & 0xffff;
193}
194
195static inline spci_vm_id_t spci_msg_send_receiver(struct spci_value args)
196{
197 return args.arg1 & 0xffff;
198}
199
200static inline uint32_t spci_msg_send_size(struct spci_value args)
201{
202 return args.arg3;
203}
204
Andrew Walbran70bc8622019-10-07 14:15:58 +0100205static inline uint32_t spci_msg_send_attributes(struct spci_value args)
206{
207 return args.arg4;
208}
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000209
Andrew Walbran4db5f3a2019-11-04 11:42:42 +0000210static inline spci_vm_id_t spci_vm_id(struct spci_value args)
211{
212 return (args.arg1 >> 16) & 0xffff;
213}
214
215static inline spci_vcpu_index_t spci_vcpu_index(struct spci_value args)
216{
217 return args.arg1 & 0xffff;
218}
219
220static inline uint64_t spci_vm_vcpu(spci_vm_id_t vm_id,
221 spci_vcpu_index_t vcpu_index)
222{
223 return ((uint32_t)vm_id << 16) | vcpu_index;
224}
225
Jose Marinho75509b42019-04-09 09:34:59 +0100226struct spci_memory_region_constituent {
Andrew Walbranf5972182019-10-15 15:41:26 +0100227 /**
228 * The base IPA of the constituent memory region, aligned to 4 kiB page
229 * size granularity.
230 */
Jose Marinho75509b42019-04-09 09:34:59 +0100231 uint64_t address;
Andrew Walbranf5972182019-10-15 15:41:26 +0100232 /** The number of 4 kiB pages in the constituent memory region. */
Jose Marinho75509b42019-04-09 09:34:59 +0100233 uint32_t page_count;
234
235 uint32_t reserved;
236};
237
Andrew Walbranf5972182019-10-15 15:41:26 +0100238struct spci_memory_region_attributes {
239 /** The ID of the VM to which the memory is being given or shared. */
240 spci_vm_id_t receiver;
241 /**
242 * The attributes with which the memory region should be mapped in the
243 * receiver's page table.
244 */
245 uint16_t memory_attributes;
Jose Marinho75509b42019-04-09 09:34:59 +0100246};
247
Andrew Walbran28b02102019-11-20 18:03:10 +0000248/** Flags to control the behaviour of a memory sharing transaction. */
249typedef uint32_t spci_memory_region_flags_t;
250
251/**
252 * Clear memory region contents after unmapping it from the sender and before
253 * mapping it for any receiver.
254 */
255#define SPCI_MEMORY_REGION_FLAG_CLEAR 0x1
256
Andrew Walbranf5972182019-10-15 15:41:26 +0100257struct spci_memory_region {
258 /**
259 * An implementation defined value associated with the receiver and the
260 * memory region.
261 */
262 uint32_t tag;
263 /** Flags to control behaviour of the transaction. */
Andrew Walbran28b02102019-11-20 18:03:10 +0000264 spci_memory_region_flags_t flags;
Andrew Walbrane28f4a22019-12-24 15:45:36 +0000265 /** Sender VM ID. */
266 spci_vm_id_t sender;
267 /** Reserved field, must be 0. */
268 uint16_t reserved;
Andrew Walbranf5972182019-10-15 15:41:26 +0100269 /**
270 * The total number of 4 kiB pages included in this memory region. This
271 * must be equal to the sum of page counts specified in each
272 * `spci_memory_region_constituent`.
273 */
274 uint32_t page_count;
275 /**
276 * The number of constituents (`spci_memory_region_constituent`)
277 * included in this memory region.
278 */
279 uint32_t constituent_count;
280 /**
281 * The offset in bytes from the base address of this
282 * `spci_memory_region` to the start of the first
283 * `spci_memory_region_constituent`.
284 */
285 uint32_t constituent_offset;
286 /**
287 * The number of `spci_memory_region_attributes` entries included in
288 * this memory region.
289 */
290 uint32_t attribute_count;
291 /**
292 * An array of `attribute_count` memory region attribute descriptors.
293 * Each one specifies an endpoint and the attributes with which this
294 * memory region should be mapped in that endpoint's page table.
295 */
296 struct spci_memory_region_attributes attributes[];
Jose Marinho713f13a2019-05-21 11:54:16 +0100297};
298
Andrew Walbranf5972182019-10-15 15:41:26 +0100299/**
300 * Gets the constituent array for an `spci_memory_region`.
301 */
302static inline struct spci_memory_region_constituent *
303spci_memory_region_get_constituents(struct spci_memory_region *memory_region)
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000304{
Andrew Walbranf5972182019-10-15 15:41:26 +0100305 return (struct spci_memory_region_constituent
306 *)((uint8_t *)memory_region +
307 memory_region->constituent_offset);
Jose Marinho75509b42019-04-09 09:34:59 +0100308}
309
Andrew Walbran66839252019-11-07 16:01:48 +0000310uint32_t spci_memory_region_init(
Andrew Walbrane28f4a22019-12-24 15:45:36 +0000311 struct spci_memory_region *memory_region, spci_vm_id_t sender,
312 spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100313 const struct spci_memory_region_constituent constituents[],
Andrew Walbranf5972182019-10-15 15:41:26 +0100314 uint32_t constituent_count, uint32_t tag,
Andrew Walbran28b02102019-11-20 18:03:10 +0000315 spci_memory_region_flags_t flags, enum spci_memory_access access,
316 enum spci_memory_type type, enum spci_memory_cacheability cacheability,
Andrew Walbran66839252019-11-07 16:01:48 +0000317 enum spci_memory_shareability shareability);