Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2019 The Hafnium Authors. |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * https://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 17 | #pragma once |
| 18 | |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 19 | #include "hf/types.h" |
| 20 | |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 21 | /* clang-format off */ |
| 22 | |
| 23 | #define SPCI_LOW_32_ID 0x84000060 |
| 24 | #define SPCI_HIGH_32_ID 0x8400007F |
| 25 | #define SPCI_LOW_64_ID 0xC4000060 |
| 26 | #define SPCI_HIGH_32_ID 0x8400007F |
| 27 | |
| 28 | /* SPCI function identifiers. */ |
Andrew Walbran | 0de4f16 | 2019-09-03 16:44:20 +0100 | [diff] [blame] | 29 | #define SPCI_ERROR_32 0x84000060 |
| 30 | #define SPCI_SUCCESS_32 0x84000061 |
| 31 | #define SPCI_INTERRUPT_32 0x84000062 |
| 32 | #define SPCI_VERSION_32 0x84000063 |
Jose Marinho | 021528f | 2019-10-08 17:21:20 +0100 | [diff] [blame] | 33 | #define SPCI_FEATURES_32 0x84000064 |
| 34 | #define SPCI_RX_RELEASE_32 0x84000065 |
| 35 | #define SPCI_RXTX_MAP_32 0x84000066 |
| 36 | #define SPCI_RXTX_UNMAP_32 0x84000067 |
| 37 | #define SPCI_PARTITION_INFO_GET_32 0x84000068 |
| 38 | #define SPCI_ID_GET_32 0x84000069 |
Andrew Walbran | 0de4f16 | 2019-09-03 16:44:20 +0100 | [diff] [blame] | 39 | #define SPCI_MSG_POLL_32 0x8400006A |
Jose Marinho | 021528f | 2019-10-08 17:21:20 +0100 | [diff] [blame] | 40 | #define SPCI_MSG_WAIT_32 0x8400006B |
| 41 | #define SPCI_YIELD_32 0x8400006C |
Andrew Walbran | 0de4f16 | 2019-09-03 16:44:20 +0100 | [diff] [blame] | 42 | #define SPCI_RUN_32 0x8400006D |
Jose Marinho | 021528f | 2019-10-08 17:21:20 +0100 | [diff] [blame] | 43 | #define SPCI_MSG_SEND_32 0x8400006E |
| 44 | #define SPCI_MSG_SEND_DIRECT_REQ_32 0x8400006F |
| 45 | #define SPCI_MSG_SEND_DIRECT_RESP_32 0x84000070 |
Andrew Walbran | e908c4a | 2019-12-02 17:13:47 +0000 | [diff] [blame^] | 46 | #define SPCI_MEM_DONATE_32 0x84000071 |
| 47 | #define SPCI_MEM_LEND_32 0x84000072 |
| 48 | #define SPCI_MEM_SHARE_32 0x84000073 |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 49 | |
Andrew Walbran | 0de4f16 | 2019-09-03 16:44:20 +0100 | [diff] [blame] | 50 | /* SPCI error codes. */ |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 51 | #define SPCI_NOT_SUPPORTED INT32_C(-1) |
| 52 | #define SPCI_INVALID_PARAMETERS INT32_C(-2) |
| 53 | #define SPCI_NO_MEMORY INT32_C(-3) |
| 54 | #define SPCI_BUSY INT32_C(-4) |
| 55 | #define SPCI_INTERRUPTED INT32_C(-5) |
| 56 | #define SPCI_DENIED INT32_C(-6) |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 57 | #define SPCI_RETRY INT32_C(-7) |
Andrew Walbran | f0c314d | 2019-10-02 14:24:26 +0100 | [diff] [blame] | 58 | #define SPCI_ABORTED INT32_C(-8) |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 59 | |
| 60 | /* SPCI function specific constants. */ |
Andrew Walbran | 70bc862 | 2019-10-07 14:15:58 +0100 | [diff] [blame] | 61 | #define SPCI_MSG_RECV_BLOCK 0x1 |
Andrew Scull | 1262ac2 | 2019-04-05 12:44:26 +0100 | [diff] [blame] | 62 | #define SPCI_MSG_RECV_BLOCK_MASK 0x1 |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 63 | |
| 64 | #define SPCI_MSG_SEND_NOTIFY 0x1 |
Andrew Walbran | 70bc862 | 2019-10-07 14:15:58 +0100 | [diff] [blame] | 65 | #define SPCI_MSG_SEND_NOTIFY_MASK 0x1 |
Andrew Walbran | 85aabe9 | 2019-12-03 12:03:03 +0000 | [diff] [blame] | 66 | #define SPCI_MSG_SEND_LEGACY_MEMORY_DONATE 0x10 |
| 67 | #define SPCI_MSG_SEND_LEGACY_MEMORY_LEND 0x20 |
| 68 | #define SPCI_MSG_SEND_LEGACY_MEMORY_SHARE 0x30 |
| 69 | #define SPCI_MSG_SEND_LEGACY_MEMORY_RELINQUISH 0x40 |
| 70 | #define SPCI_MSG_SEND_LEGACY_MEMORY_MASK 0x70 |
Andrew Scull | 1262ac2 | 2019-04-05 12:44:26 +0100 | [diff] [blame] | 71 | |
Andrew Walbran | f0c314d | 2019-10-02 14:24:26 +0100 | [diff] [blame] | 72 | #define SPCI_SLEEP_INDEFINITE 0 |
| 73 | |
Andrew Walbran | bfffb0f | 2019-11-05 14:02:34 +0000 | [diff] [blame] | 74 | /** |
| 75 | * For use where the SPCI specification refers explicitly to '4K pages'. Not to |
| 76 | * be confused with PAGE_SIZE, which is the translation granule Hafnium is |
| 77 | * configured to use. |
| 78 | */ |
| 79 | #define SPCI_PAGE_SIZE 4096 |
| 80 | |
Andrew Scull | 1262ac2 | 2019-04-05 12:44:26 +0100 | [diff] [blame] | 81 | /* The maximum length possible for a single message. */ |
Andrew Walbran | 70bc862 | 2019-10-07 14:15:58 +0100 | [diff] [blame] | 82 | #define SPCI_MSG_PAYLOAD_MAX HF_MAILBOX_SIZE |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 83 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 84 | enum spci_memory_access { |
| 85 | SPCI_MEMORY_RO_NX, |
| 86 | SPCI_MEMORY_RO_X, |
| 87 | SPCI_MEMORY_RW_NX, |
| 88 | SPCI_MEMORY_RW_X, |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 89 | }; |
| 90 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 91 | enum spci_memory_type { |
| 92 | SPCI_MEMORY_DEVICE_MEM, |
| 93 | SPCI_MEMORY_NORMAL_MEM, |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 94 | }; |
| 95 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 96 | enum spci_memory_cacheability { |
| 97 | SPCI_MEMORY_CACHE_RESERVED = 0x0, |
| 98 | SPCI_MEMORY_CACHE_NON_CACHEABLE = 0x1, |
| 99 | SPCI_MEMORY_CACHE_WRITE_THROUGH = 0x2, |
| 100 | SPCI_MEMORY_CACHE_WRITE_BACK = 0x4, |
| 101 | SPCI_MEMORY_DEV_NGNRNE = 0x0, |
| 102 | SPCI_MEMORY_DEV_NGNRE = 0x1, |
| 103 | SPCI_MEMORY_DEV_NGRE = 0x2, |
| 104 | SPCI_MEMORY_DEV_GRE = 0x3, |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 105 | }; |
| 106 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 107 | enum spci_memory_shareability { |
| 108 | SPCI_MEMORY_SHARE_NON_SHAREABLE, |
| 109 | SPCI_MEMORY_RESERVED, |
| 110 | SPCI_MEMORY_OUTER_SHAREABLE, |
| 111 | SPCI_MEMORY_INNER_SHAREABLE, |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 112 | }; |
| 113 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 114 | #define SPCI_MEMORY_ACCESS_OFFSET (0x5U) |
| 115 | #define SPCI_MEMORY_ACCESS_MASK ((0x3U) << SPCI_MEMORY_ACCESS_OFFSET) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 116 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 117 | #define SPCI_MEMORY_TYPE_OFFSET (0x4U) |
| 118 | #define SPCI_MEMORY_TYPE_MASK ((0x1U) << SPCI_MEMORY_TYPE_OFFSET) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 119 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 120 | #define SPCI_MEMORY_CACHEABILITY_OFFSET (0x2U) |
| 121 | #define SPCI_MEMORY_CACHEABILITY_MASK ((0x3U) <<\ |
| 122 | SPCI_MEMORY_CACHEABILITY_OFFSET) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 123 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 124 | #define SPCI_MEMORY_SHAREABILITY_OFFSET (0x0U) |
| 125 | #define SPCI_MEMORY_SHAREABILITY_MASK ((0x3U) <<\ |
| 126 | SPCI_MEMORY_SHAREABILITY_OFFSET) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 127 | |
| 128 | #define LEND_ATTR_FUNCTION_SET(name, offset, mask) \ |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 129 | static inline void spci_set_memory_##name##_attr(uint16_t *attr,\ |
| 130 | const enum spci_memory_##name perm)\ |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 131 | {\ |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 132 | *attr = (*attr & ~(mask)) | ((perm << offset) & mask);\ |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | #define LEND_ATTR_FUNCTION_GET(name, offset, mask) \ |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 136 | static inline enum spci_memory_##name spci_get_memory_##name##_attr(\ |
| 137 | uint16_t attr)\ |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 138 | {\ |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 139 | return (enum spci_memory_##name)((attr & mask) >> offset);\ |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 140 | } |
| 141 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 142 | LEND_ATTR_FUNCTION_SET(access, SPCI_MEMORY_ACCESS_OFFSET, |
| 143 | SPCI_MEMORY_ACCESS_MASK) |
| 144 | LEND_ATTR_FUNCTION_GET(access, SPCI_MEMORY_ACCESS_OFFSET, |
| 145 | SPCI_MEMORY_ACCESS_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 146 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 147 | LEND_ATTR_FUNCTION_SET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK) |
| 148 | LEND_ATTR_FUNCTION_GET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 149 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 150 | LEND_ATTR_FUNCTION_SET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET, |
| 151 | SPCI_MEMORY_CACHEABILITY_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 152 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 153 | LEND_ATTR_FUNCTION_GET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET, |
| 154 | SPCI_MEMORY_CACHEABILITY_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 155 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 156 | LEND_ATTR_FUNCTION_SET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET, |
| 157 | SPCI_MEMORY_SHAREABILITY_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 158 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 159 | LEND_ATTR_FUNCTION_GET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET, |
| 160 | SPCI_MEMORY_SHAREABILITY_MASK) |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 161 | |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 162 | /* clang-format on */ |
| 163 | |
Fuad Tabba | 494376e | 2019-08-05 12:35:10 +0100 | [diff] [blame] | 164 | /** The ID of a VM. These are assigned sequentially starting with an offset. */ |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 165 | typedef uint16_t spci_vm_id_t; |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 166 | typedef uint32_t spci_memory_handle_t; |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 167 | |
Andrew Walbran | 52d9967 | 2019-06-25 15:51:11 +0100 | [diff] [blame] | 168 | /** |
| 169 | * A count of VMs. This has the same range as the VM IDs but we give it a |
| 170 | * different name to make the different semantics clear. |
| 171 | */ |
| 172 | typedef spci_vm_id_t spci_vm_count_t; |
Andrew Walbran | c6d23c4 | 2019-06-26 13:30:42 +0100 | [diff] [blame] | 173 | |
| 174 | /** The index of a vCPU within a particular VM. */ |
Andrew Walbran | b037d5b | 2019-06-25 17:19:41 +0100 | [diff] [blame] | 175 | typedef uint16_t spci_vcpu_index_t; |
Andrew Walbran | 52d9967 | 2019-06-25 15:51:11 +0100 | [diff] [blame] | 176 | |
Andrew Walbran | c6d23c4 | 2019-06-26 13:30:42 +0100 | [diff] [blame] | 177 | /** |
| 178 | * A count of vCPUs. This has the same range as the vCPU indices but we give it |
| 179 | * a different name to make the different semantics clear. |
| 180 | */ |
| 181 | typedef spci_vcpu_index_t spci_vcpu_count_t; |
| 182 | |
Andrew Walbran | f18e63c | 2019-10-07 15:13:59 +0100 | [diff] [blame] | 183 | /** Parameter and return type of SPCI functions. */ |
Andrew Walbran | 7f920af | 2019-09-03 17:09:30 +0100 | [diff] [blame] | 184 | struct spci_value { |
| 185 | uint64_t func; |
| 186 | uint64_t arg1; |
| 187 | uint64_t arg2; |
| 188 | uint64_t arg3; |
| 189 | uint64_t arg4; |
| 190 | uint64_t arg5; |
| 191 | uint64_t arg6; |
| 192 | uint64_t arg7; |
| 193 | }; |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 194 | |
Andrew Walbran | d4d2fa1 | 2019-10-01 16:47:25 +0100 | [diff] [blame] | 195 | static inline spci_vm_id_t spci_msg_send_sender(struct spci_value args) |
| 196 | { |
| 197 | return (args.arg1 >> 16) & 0xffff; |
| 198 | } |
| 199 | |
| 200 | static inline spci_vm_id_t spci_msg_send_receiver(struct spci_value args) |
| 201 | { |
| 202 | return args.arg1 & 0xffff; |
| 203 | } |
| 204 | |
| 205 | static inline uint32_t spci_msg_send_size(struct spci_value args) |
| 206 | { |
| 207 | return args.arg3; |
| 208 | } |
| 209 | |
Andrew Walbran | 70bc862 | 2019-10-07 14:15:58 +0100 | [diff] [blame] | 210 | static inline uint32_t spci_msg_send_attributes(struct spci_value args) |
| 211 | { |
| 212 | return args.arg4; |
| 213 | } |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 214 | |
Andrew Walbran | 4db5f3a | 2019-11-04 11:42:42 +0000 | [diff] [blame] | 215 | static inline spci_vm_id_t spci_vm_id(struct spci_value args) |
| 216 | { |
| 217 | return (args.arg1 >> 16) & 0xffff; |
| 218 | } |
| 219 | |
| 220 | static inline spci_vcpu_index_t spci_vcpu_index(struct spci_value args) |
| 221 | { |
| 222 | return args.arg1 & 0xffff; |
| 223 | } |
| 224 | |
| 225 | static inline uint64_t spci_vm_vcpu(spci_vm_id_t vm_id, |
| 226 | spci_vcpu_index_t vcpu_index) |
| 227 | { |
| 228 | return ((uint32_t)vm_id << 16) | vcpu_index; |
| 229 | } |
| 230 | |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 231 | struct spci_memory_region_constituent { |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 232 | /** |
| 233 | * The base IPA of the constituent memory region, aligned to 4 kiB page |
| 234 | * size granularity. |
| 235 | */ |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 236 | uint64_t address; |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 237 | /** The number of 4 kiB pages in the constituent memory region. */ |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 238 | uint32_t page_count; |
| 239 | |
| 240 | uint32_t reserved; |
| 241 | }; |
| 242 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 243 | struct spci_memory_region_attributes { |
| 244 | /** The ID of the VM to which the memory is being given or shared. */ |
| 245 | spci_vm_id_t receiver; |
| 246 | /** |
| 247 | * The attributes with which the memory region should be mapped in the |
| 248 | * receiver's page table. |
| 249 | */ |
| 250 | uint16_t memory_attributes; |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 251 | }; |
| 252 | |
Andrew Walbran | 28b0210 | 2019-11-20 18:03:10 +0000 | [diff] [blame] | 253 | /** Flags to control the behaviour of a memory sharing transaction. */ |
| 254 | typedef uint32_t spci_memory_region_flags_t; |
| 255 | |
| 256 | /** |
| 257 | * Clear memory region contents after unmapping it from the sender and before |
| 258 | * mapping it for any receiver. |
| 259 | */ |
| 260 | #define SPCI_MEMORY_REGION_FLAG_CLEAR 0x1 |
| 261 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 262 | struct spci_memory_region { |
| 263 | /** |
| 264 | * An implementation defined value associated with the receiver and the |
| 265 | * memory region. |
| 266 | */ |
| 267 | uint32_t tag; |
| 268 | /** Flags to control behaviour of the transaction. */ |
Andrew Walbran | 28b0210 | 2019-11-20 18:03:10 +0000 | [diff] [blame] | 269 | spci_memory_region_flags_t flags; |
Andrew Walbran | e28f4a2 | 2019-12-24 15:45:36 +0000 | [diff] [blame] | 270 | /** Sender VM ID. */ |
| 271 | spci_vm_id_t sender; |
| 272 | /** Reserved field, must be 0. */ |
| 273 | uint16_t reserved; |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 274 | /** |
| 275 | * The total number of 4 kiB pages included in this memory region. This |
| 276 | * must be equal to the sum of page counts specified in each |
| 277 | * `spci_memory_region_constituent`. |
| 278 | */ |
| 279 | uint32_t page_count; |
| 280 | /** |
| 281 | * The number of constituents (`spci_memory_region_constituent`) |
| 282 | * included in this memory region. |
| 283 | */ |
| 284 | uint32_t constituent_count; |
| 285 | /** |
| 286 | * The offset in bytes from the base address of this |
| 287 | * `spci_memory_region` to the start of the first |
| 288 | * `spci_memory_region_constituent`. |
| 289 | */ |
| 290 | uint32_t constituent_offset; |
| 291 | /** |
| 292 | * The number of `spci_memory_region_attributes` entries included in |
| 293 | * this memory region. |
| 294 | */ |
| 295 | uint32_t attribute_count; |
| 296 | /** |
| 297 | * An array of `attribute_count` memory region attribute descriptors. |
| 298 | * Each one specifies an endpoint and the attributes with which this |
| 299 | * memory region should be mapped in that endpoint's page table. |
| 300 | */ |
| 301 | struct spci_memory_region_attributes attributes[]; |
Jose Marinho | 713f13a | 2019-05-21 11:54:16 +0100 | [diff] [blame] | 302 | }; |
| 303 | |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 304 | /** |
| 305 | * Gets the constituent array for an `spci_memory_region`. |
| 306 | */ |
| 307 | static inline struct spci_memory_region_constituent * |
| 308 | spci_memory_region_get_constituents(struct spci_memory_region *memory_region) |
Jose Marinho | 4e4e4d5 | 2019-02-22 16:23:51 +0000 | [diff] [blame] | 309 | { |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 310 | return (struct spci_memory_region_constituent |
| 311 | *)((uint8_t *)memory_region + |
| 312 | memory_region->constituent_offset); |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 313 | } |
| 314 | |
Andrew Walbran | 6683925 | 2019-11-07 16:01:48 +0000 | [diff] [blame] | 315 | uint32_t spci_memory_region_init( |
Andrew Walbran | e28f4a2 | 2019-12-24 15:45:36 +0000 | [diff] [blame] | 316 | struct spci_memory_region *memory_region, spci_vm_id_t sender, |
| 317 | spci_vm_id_t receiver, |
Jose Marinho | 75509b4 | 2019-04-09 09:34:59 +0100 | [diff] [blame] | 318 | const struct spci_memory_region_constituent constituents[], |
Andrew Walbran | f597218 | 2019-10-15 15:41:26 +0100 | [diff] [blame] | 319 | uint32_t constituent_count, uint32_t tag, |
Andrew Walbran | 28b0210 | 2019-11-20 18:03:10 +0000 | [diff] [blame] | 320 | spci_memory_region_flags_t flags, enum spci_memory_access access, |
| 321 | enum spci_memory_type type, enum spci_memory_cacheability cacheability, |
Andrew Walbran | 6683925 | 2019-11-07 16:01:48 +0000 | [diff] [blame] | 322 | enum spci_memory_shareability shareability); |