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Jose Marinho4e4e4d52019-02-22 16:23:51 +00001/*
2 * Copyright 2019 The Hafnium Authors.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Jose Marinho4e4e4d52019-02-22 16:23:51 +000017#pragma once
18
Jose Marinho75509b42019-04-09 09:34:59 +010019#include "hf/types.h"
20
Jose Marinho4e4e4d52019-02-22 16:23:51 +000021/* clang-format off */
22
23#define SPCI_LOW_32_ID 0x84000060
24#define SPCI_HIGH_32_ID 0x8400007F
25#define SPCI_LOW_64_ID 0xC4000060
26#define SPCI_HIGH_32_ID 0x8400007F
27
28/* SPCI function identifiers. */
Andrew Walbran0de4f162019-09-03 16:44:20 +010029#define SPCI_ERROR_32 0x84000060
30#define SPCI_SUCCESS_32 0x84000061
31#define SPCI_INTERRUPT_32 0x84000062
32#define SPCI_VERSION_32 0x84000063
Jose Marinho021528f2019-10-08 17:21:20 +010033#define SPCI_FEATURES_32 0x84000064
34#define SPCI_RX_RELEASE_32 0x84000065
35#define SPCI_RXTX_MAP_32 0x84000066
36#define SPCI_RXTX_UNMAP_32 0x84000067
37#define SPCI_PARTITION_INFO_GET_32 0x84000068
38#define SPCI_ID_GET_32 0x84000069
Andrew Walbran0de4f162019-09-03 16:44:20 +010039#define SPCI_MSG_POLL_32 0x8400006A
Jose Marinho021528f2019-10-08 17:21:20 +010040#define SPCI_MSG_WAIT_32 0x8400006B
41#define SPCI_YIELD_32 0x8400006C
Andrew Walbran0de4f162019-09-03 16:44:20 +010042#define SPCI_RUN_32 0x8400006D
Jose Marinho021528f2019-10-08 17:21:20 +010043#define SPCI_MSG_SEND_32 0x8400006E
44#define SPCI_MSG_SEND_DIRECT_REQ_32 0x8400006F
45#define SPCI_MSG_SEND_DIRECT_RESP_32 0x84000070
Jose Marinho4e4e4d52019-02-22 16:23:51 +000046
Andrew Walbran0de4f162019-09-03 16:44:20 +010047/* SPCI error codes. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +000048#define SPCI_NOT_SUPPORTED INT32_C(-1)
49#define SPCI_INVALID_PARAMETERS INT32_C(-2)
50#define SPCI_NO_MEMORY INT32_C(-3)
51#define SPCI_BUSY INT32_C(-4)
52#define SPCI_INTERRUPTED INT32_C(-5)
53#define SPCI_DENIED INT32_C(-6)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000054#define SPCI_RETRY INT32_C(-7)
Andrew Walbranf0c314d2019-10-02 14:24:26 +010055#define SPCI_ABORTED INT32_C(-8)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000056
Jose Marinho75509b42019-04-09 09:34:59 +010057/* Architected memory sharing message IDs. */
58enum spci_memory_share {
Andrew Walbran648fc3e2019-10-22 16:23:05 +010059 SPCI_MEMORY_DONATE = 0x0,
60 SPCI_MEMORY_LEND = 0x1,
61 SPCI_MEMORY_SHARE = 0x2,
62 SPCI_MEMORY_RELINQUISH = 0x3,
Jose Marinho75509b42019-04-09 09:34:59 +010063};
64
Jose Marinho4e4e4d52019-02-22 16:23:51 +000065/* SPCI function specific constants. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010066#define SPCI_MSG_RECV_BLOCK 0x1
Andrew Scull1262ac22019-04-05 12:44:26 +010067#define SPCI_MSG_RECV_BLOCK_MASK 0x1
Jose Marinho4e4e4d52019-02-22 16:23:51 +000068
69#define SPCI_MSG_SEND_NOTIFY 0x1
Andrew Walbran70bc8622019-10-07 14:15:58 +010070#define SPCI_MSG_SEND_NOTIFY_MASK 0x1
71#define SPCI_MSG_SEND_LEGACY_MEMORY 0x2
72#define SPCI_MSG_SEND_LEGACY_MEMORY_MASK 0x2
Andrew Scull1262ac22019-04-05 12:44:26 +010073
Andrew Walbranf0c314d2019-10-02 14:24:26 +010074#define SPCI_SLEEP_INDEFINITE 0
75
Andrew Walbranbfffb0f2019-11-05 14:02:34 +000076/**
77 * For use where the SPCI specification refers explicitly to '4K pages'. Not to
78 * be confused with PAGE_SIZE, which is the translation granule Hafnium is
79 * configured to use.
80 */
81#define SPCI_PAGE_SIZE 4096
82
Andrew Scull1262ac22019-04-05 12:44:26 +010083/* The maximum length possible for a single message. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010084#define SPCI_MSG_PAYLOAD_MAX HF_MAILBOX_SIZE
Jose Marinho713f13a2019-05-21 11:54:16 +010085
Andrew Walbranf5972182019-10-15 15:41:26 +010086enum spci_memory_access {
87 SPCI_MEMORY_RO_NX,
88 SPCI_MEMORY_RO_X,
89 SPCI_MEMORY_RW_NX,
90 SPCI_MEMORY_RW_X,
Jose Marinho713f13a2019-05-21 11:54:16 +010091};
92
Andrew Walbranf5972182019-10-15 15:41:26 +010093enum spci_memory_type {
94 SPCI_MEMORY_DEVICE_MEM,
95 SPCI_MEMORY_NORMAL_MEM,
Jose Marinho713f13a2019-05-21 11:54:16 +010096};
97
Andrew Walbranf5972182019-10-15 15:41:26 +010098enum spci_memory_cacheability {
99 SPCI_MEMORY_CACHE_RESERVED = 0x0,
100 SPCI_MEMORY_CACHE_NON_CACHEABLE = 0x1,
101 SPCI_MEMORY_CACHE_WRITE_THROUGH = 0x2,
102 SPCI_MEMORY_CACHE_WRITE_BACK = 0x4,
103 SPCI_MEMORY_DEV_NGNRNE = 0x0,
104 SPCI_MEMORY_DEV_NGNRE = 0x1,
105 SPCI_MEMORY_DEV_NGRE = 0x2,
106 SPCI_MEMORY_DEV_GRE = 0x3,
Jose Marinho713f13a2019-05-21 11:54:16 +0100107};
108
Andrew Walbranf5972182019-10-15 15:41:26 +0100109enum spci_memory_shareability {
110 SPCI_MEMORY_SHARE_NON_SHAREABLE,
111 SPCI_MEMORY_RESERVED,
112 SPCI_MEMORY_OUTER_SHAREABLE,
113 SPCI_MEMORY_INNER_SHAREABLE,
Jose Marinho713f13a2019-05-21 11:54:16 +0100114};
115
Andrew Walbranf5972182019-10-15 15:41:26 +0100116#define SPCI_MEMORY_ACCESS_OFFSET (0x5U)
117#define SPCI_MEMORY_ACCESS_MASK ((0x3U) << SPCI_MEMORY_ACCESS_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100118
Andrew Walbranf5972182019-10-15 15:41:26 +0100119#define SPCI_MEMORY_TYPE_OFFSET (0x4U)
120#define SPCI_MEMORY_TYPE_MASK ((0x1U) << SPCI_MEMORY_TYPE_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100121
Andrew Walbranf5972182019-10-15 15:41:26 +0100122#define SPCI_MEMORY_CACHEABILITY_OFFSET (0x2U)
123#define SPCI_MEMORY_CACHEABILITY_MASK ((0x3U) <<\
124 SPCI_MEMORY_CACHEABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100125
Andrew Walbranf5972182019-10-15 15:41:26 +0100126#define SPCI_MEMORY_SHAREABILITY_OFFSET (0x0U)
127#define SPCI_MEMORY_SHAREABILITY_MASK ((0x3U) <<\
128 SPCI_MEMORY_SHAREABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100129
130#define LEND_ATTR_FUNCTION_SET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100131static inline void spci_set_memory_##name##_attr(uint16_t *attr,\
132 const enum spci_memory_##name perm)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100133{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100134 *attr = (*attr & ~(mask)) | ((perm << offset) & mask);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100135}
136
137#define LEND_ATTR_FUNCTION_GET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100138static inline enum spci_memory_##name spci_get_memory_##name##_attr(\
139 uint16_t attr)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100140{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100141 return (enum spci_memory_##name)((attr & mask) >> offset);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100142}
143
Andrew Walbranf5972182019-10-15 15:41:26 +0100144LEND_ATTR_FUNCTION_SET(access, SPCI_MEMORY_ACCESS_OFFSET,
145 SPCI_MEMORY_ACCESS_MASK)
146LEND_ATTR_FUNCTION_GET(access, SPCI_MEMORY_ACCESS_OFFSET,
147 SPCI_MEMORY_ACCESS_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100148
Andrew Walbranf5972182019-10-15 15:41:26 +0100149LEND_ATTR_FUNCTION_SET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
150LEND_ATTR_FUNCTION_GET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100151
Andrew Walbranf5972182019-10-15 15:41:26 +0100152LEND_ATTR_FUNCTION_SET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
153 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100154
Andrew Walbranf5972182019-10-15 15:41:26 +0100155LEND_ATTR_FUNCTION_GET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
156 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100157
Andrew Walbranf5972182019-10-15 15:41:26 +0100158LEND_ATTR_FUNCTION_SET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
159 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100160
Andrew Walbranf5972182019-10-15 15:41:26 +0100161LEND_ATTR_FUNCTION_GET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
162 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100163
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000164/* clang-format on */
165
Fuad Tabba494376e2019-08-05 12:35:10 +0100166/** The ID of a VM. These are assigned sequentially starting with an offset. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000167typedef uint16_t spci_vm_id_t;
Jose Marinho75509b42019-04-09 09:34:59 +0100168typedef uint32_t spci_memory_handle_t;
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000169
Andrew Walbran52d99672019-06-25 15:51:11 +0100170/**
171 * A count of VMs. This has the same range as the VM IDs but we give it a
172 * different name to make the different semantics clear.
173 */
174typedef spci_vm_id_t spci_vm_count_t;
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100175
176/** The index of a vCPU within a particular VM. */
Andrew Walbranb037d5b2019-06-25 17:19:41 +0100177typedef uint16_t spci_vcpu_index_t;
Andrew Walbran52d99672019-06-25 15:51:11 +0100178
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100179/**
180 * A count of vCPUs. This has the same range as the vCPU indices but we give it
181 * a different name to make the different semantics clear.
182 */
183typedef spci_vcpu_index_t spci_vcpu_count_t;
184
Andrew Walbranf18e63c2019-10-07 15:13:59 +0100185/** Parameter and return type of SPCI functions. */
Andrew Walbran7f920af2019-09-03 17:09:30 +0100186struct spci_value {
187 uint64_t func;
188 uint64_t arg1;
189 uint64_t arg2;
190 uint64_t arg3;
191 uint64_t arg4;
192 uint64_t arg5;
193 uint64_t arg6;
194 uint64_t arg7;
195};
Jose Marinho75509b42019-04-09 09:34:59 +0100196
Andrew Walbrand4d2fa12019-10-01 16:47:25 +0100197static inline spci_vm_id_t spci_msg_send_sender(struct spci_value args)
198{
199 return (args.arg1 >> 16) & 0xffff;
200}
201
202static inline spci_vm_id_t spci_msg_send_receiver(struct spci_value args)
203{
204 return args.arg1 & 0xffff;
205}
206
207static inline uint32_t spci_msg_send_size(struct spci_value args)
208{
209 return args.arg3;
210}
211
Andrew Walbran70bc8622019-10-07 14:15:58 +0100212static inline uint32_t spci_msg_send_attributes(struct spci_value args)
213{
214 return args.arg4;
215}
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000216
Andrew Walbran4db5f3a2019-11-04 11:42:42 +0000217static inline spci_vm_id_t spci_vm_id(struct spci_value args)
218{
219 return (args.arg1 >> 16) & 0xffff;
220}
221
222static inline spci_vcpu_index_t spci_vcpu_index(struct spci_value args)
223{
224 return args.arg1 & 0xffff;
225}
226
227static inline uint64_t spci_vm_vcpu(spci_vm_id_t vm_id,
228 spci_vcpu_index_t vcpu_index)
229{
230 return ((uint32_t)vm_id << 16) | vcpu_index;
231}
232
Jose Marinho75509b42019-04-09 09:34:59 +0100233struct spci_architected_message_header {
234 uint16_t type;
235
236 /*
237 * TODO: Padding is present to ensure that the field
238 * payload is aligned on a 64B boundary. SPCI
239 * spec must be updated to reflect this.
240 */
241 uint16_t reserved[3];
242 uint8_t payload[];
243};
244
245struct spci_memory_region_constituent {
Andrew Walbranf5972182019-10-15 15:41:26 +0100246 /**
247 * The base IPA of the constituent memory region, aligned to 4 kiB page
248 * size granularity.
249 */
Jose Marinho75509b42019-04-09 09:34:59 +0100250 uint64_t address;
Andrew Walbranf5972182019-10-15 15:41:26 +0100251 /** The number of 4 kiB pages in the constituent memory region. */
Jose Marinho75509b42019-04-09 09:34:59 +0100252 uint32_t page_count;
253
254 uint32_t reserved;
255};
256
Andrew Walbranf5972182019-10-15 15:41:26 +0100257struct spci_memory_region_attributes {
258 /** The ID of the VM to which the memory is being given or shared. */
259 spci_vm_id_t receiver;
260 /**
261 * The attributes with which the memory region should be mapped in the
262 * receiver's page table.
263 */
264 uint16_t memory_attributes;
Jose Marinho75509b42019-04-09 09:34:59 +0100265};
266
Andrew Walbran28b02102019-11-20 18:03:10 +0000267/** Flags to control the behaviour of a memory sharing transaction. */
268typedef uint32_t spci_memory_region_flags_t;
269
270/**
271 * Clear memory region contents after unmapping it from the sender and before
272 * mapping it for any receiver.
273 */
274#define SPCI_MEMORY_REGION_FLAG_CLEAR 0x1
275
Andrew Walbranf5972182019-10-15 15:41:26 +0100276struct spci_memory_region {
277 /**
278 * An implementation defined value associated with the receiver and the
279 * memory region.
280 */
281 uint32_t tag;
282 /** Flags to control behaviour of the transaction. */
Andrew Walbran28b02102019-11-20 18:03:10 +0000283 spci_memory_region_flags_t flags;
Andrew Walbranf5972182019-10-15 15:41:26 +0100284 /**
285 * The total number of 4 kiB pages included in this memory region. This
286 * must be equal to the sum of page counts specified in each
287 * `spci_memory_region_constituent`.
288 */
289 uint32_t page_count;
290 /**
291 * The number of constituents (`spci_memory_region_constituent`)
292 * included in this memory region.
293 */
294 uint32_t constituent_count;
295 /**
296 * The offset in bytes from the base address of this
297 * `spci_memory_region` to the start of the first
298 * `spci_memory_region_constituent`.
299 */
300 uint32_t constituent_offset;
301 /**
302 * The number of `spci_memory_region_attributes` entries included in
303 * this memory region.
304 */
305 uint32_t attribute_count;
306 /**
307 * An array of `attribute_count` memory region attribute descriptors.
308 * Each one specifies an endpoint and the attributes with which this
309 * memory region should be mapped in that endpoint's page table.
310 */
311 struct spci_memory_region_attributes attributes[];
Jose Marinho713f13a2019-05-21 11:54:16 +0100312};
313
Andrew Walbranf5972182019-10-15 15:41:26 +0100314/**
315 * Gets the constituent array for an `spci_memory_region`.
316 */
317static inline struct spci_memory_region_constituent *
318spci_memory_region_get_constituents(struct spci_memory_region *memory_region)
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000319{
Andrew Walbranf5972182019-10-15 15:41:26 +0100320 return (struct spci_memory_region_constituent
321 *)((uint8_t *)memory_region +
322 memory_region->constituent_offset);
Jose Marinho75509b42019-04-09 09:34:59 +0100323}
324
Andrew Walbran66839252019-11-07 16:01:48 +0000325void spci_architected_message_init(void *message, enum spci_memory_share type);
Jose Marinho75509b42019-04-09 09:34:59 +0100326
Andrew Walbranf5972182019-10-15 15:41:26 +0100327/** Gets the spci_memory_region within an architected message. */
328static inline struct spci_memory_region *spci_get_memory_region(void *message)
Jose Marinho75509b42019-04-09 09:34:59 +0100329{
330 struct spci_architected_message_header *architected_header =
Andrew Walbran70bc8622019-10-07 14:15:58 +0100331 (struct spci_architected_message_header *)message;
Jose Marinho75509b42019-04-09 09:34:59 +0100332 return (struct spci_memory_region *)architected_header->payload;
333}
334
Andrew Walbran66839252019-11-07 16:01:48 +0000335uint32_t spci_memory_region_init(
Andrew Walbranf5972182019-10-15 15:41:26 +0100336 struct spci_memory_region *memory_region, spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100337 const struct spci_memory_region_constituent constituents[],
Andrew Walbranf5972182019-10-15 15:41:26 +0100338 uint32_t constituent_count, uint32_t tag,
Andrew Walbran28b02102019-11-20 18:03:10 +0000339 spci_memory_region_flags_t flags, enum spci_memory_access access,
340 enum spci_memory_type type, enum spci_memory_cacheability cacheability,
Andrew Walbran66839252019-11-07 16:01:48 +0000341 enum spci_memory_shareability shareability);
Jose Marinho75509b42019-04-09 09:34:59 +0100342
Andrew Walbran66839252019-11-07 16:01:48 +0000343uint32_t spci_memory_init(
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100344 void *message, enum spci_memory_share share_type, spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100345 struct spci_memory_region_constituent *region_constituents,
Andrew Walbranf5972182019-10-15 15:41:26 +0100346 uint32_t constituent_count, uint32_t tag,
Andrew Walbran28b02102019-11-20 18:03:10 +0000347 spci_memory_region_flags_t flags, enum spci_memory_access access,
348 enum spci_memory_type type, enum spci_memory_cacheability cacheability,
Andrew Walbran66839252019-11-07 16:01:48 +0000349 enum spci_memory_shareability shareability);
Jose Marinho56c25732019-05-20 09:48:53 +0100350
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100351/** Constructs an SPCI donate memory region message. */
352static inline uint32_t spci_memory_donate_init(
Andrew Walbranf5972182019-10-15 15:41:26 +0100353 void *message, spci_vm_id_t receiver,
Jose Marinho56c25732019-05-20 09:48:53 +0100354 struct spci_memory_region_constituent *region_constituents,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100355 uint32_t constituent_count, uint32_t tag,
356 enum spci_memory_access access, enum spci_memory_type type,
357 enum spci_memory_cacheability cacheability,
358 enum spci_memory_shareability shareability)
Jose Marinho56c25732019-05-20 09:48:53 +0100359{
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100360 return spci_memory_init(message, SPCI_MEMORY_DONATE, receiver,
Andrew Walbran28b02102019-11-20 18:03:10 +0000361 region_constituents, constituent_count, tag, 0,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100362 access, type, cacheability, shareability);
Jose Marinho713f13a2019-05-21 11:54:16 +0100363}
364
365/**
Andrew Walbranf5972182019-10-15 15:41:26 +0100366 * Constructs an SPCI memory region lend message.
Jose Marinho713f13a2019-05-21 11:54:16 +0100367 */
Andrew Walbran70bc8622019-10-07 14:15:58 +0100368static inline uint32_t spci_memory_lend_init(
Andrew Walbranf5972182019-10-15 15:41:26 +0100369 void *message, spci_vm_id_t receiver,
Jose Marinho713f13a2019-05-21 11:54:16 +0100370 struct spci_memory_region_constituent *region_constituents,
Andrew Walbranf5972182019-10-15 15:41:26 +0100371 uint32_t constituent_count, uint32_t tag,
372 enum spci_memory_access access, enum spci_memory_type type,
373 enum spci_memory_cacheability cacheability,
374 enum spci_memory_shareability shareability)
Jose Marinho713f13a2019-05-21 11:54:16 +0100375{
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100376 return spci_memory_init(message, SPCI_MEMORY_LEND, receiver,
Andrew Walbran28b02102019-11-20 18:03:10 +0000377 region_constituents, constituent_count, tag, 0,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100378 access, type, cacheability, shareability);
379}
Jose Marinho713f13a2019-05-21 11:54:16 +0100380
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100381/**
382 * Constructs an SPCI memory region share message.
383 */
384static inline uint32_t spci_memory_share_init(
385 void *message, spci_vm_id_t receiver,
386 struct spci_memory_region_constituent *region_constituents,
387 uint32_t constituent_count, uint32_t tag,
388 enum spci_memory_access access, enum spci_memory_type type,
389 enum spci_memory_cacheability cacheability,
390 enum spci_memory_shareability shareability)
391{
392 return spci_memory_init(message, SPCI_MEMORY_SHARE, receiver,
Andrew Walbran28b02102019-11-20 18:03:10 +0000393 region_constituents, constituent_count, tag, 0,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100394 access, type, cacheability, shareability);
395}
Jose Marinho713f13a2019-05-21 11:54:16 +0100396
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100397/**
398 * Constructs an SPCI memory region relinquish message.
399 * A set of memory regions can be given back to the owner.
400 */
401static inline uint32_t spci_memory_relinquish_init(
402 void *message, spci_vm_id_t receiver,
403 struct spci_memory_region_constituent *region_constituents,
404 uint32_t constituent_count, uint32_t tag)
405{
406 return spci_memory_init(message, SPCI_MEMORY_RELINQUISH, receiver,
Andrew Walbran28b02102019-11-20 18:03:10 +0000407 region_constituents, constituent_count, tag, 0,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100408 SPCI_MEMORY_RW_X, SPCI_MEMORY_DEVICE_MEM,
409 SPCI_MEMORY_DEV_NGNRNE,
410 SPCI_MEMORY_SHARE_NON_SHAREABLE);
Jose Marinho56c25732019-05-20 09:48:53 +0100411}