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Jose Marinho4e4e4d52019-02-22 16:23:51 +00001/*
2 * Copyright 2019 The Hafnium Authors.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Jose Marinho4e4e4d52019-02-22 16:23:51 +000017#pragma once
18
Jose Marinho75509b42019-04-09 09:34:59 +010019#include "hf/types.h"
20
Jose Marinho4e4e4d52019-02-22 16:23:51 +000021/* clang-format off */
22
23#define SPCI_LOW_32_ID 0x84000060
24#define SPCI_HIGH_32_ID 0x8400007F
25#define SPCI_LOW_64_ID 0xC4000060
26#define SPCI_HIGH_32_ID 0x8400007F
27
28/* SPCI function identifiers. */
Andrew Walbran0de4f162019-09-03 16:44:20 +010029#define SPCI_ERROR_32 0x84000060
30#define SPCI_SUCCESS_32 0x84000061
31#define SPCI_INTERRUPT_32 0x84000062
32#define SPCI_VERSION_32 0x84000063
Jose Marinho021528f2019-10-08 17:21:20 +010033#define SPCI_FEATURES_32 0x84000064
34#define SPCI_RX_RELEASE_32 0x84000065
35#define SPCI_RXTX_MAP_32 0x84000066
36#define SPCI_RXTX_UNMAP_32 0x84000067
37#define SPCI_PARTITION_INFO_GET_32 0x84000068
38#define SPCI_ID_GET_32 0x84000069
Andrew Walbran0de4f162019-09-03 16:44:20 +010039#define SPCI_MSG_POLL_32 0x8400006A
Jose Marinho021528f2019-10-08 17:21:20 +010040#define SPCI_MSG_WAIT_32 0x8400006B
41#define SPCI_YIELD_32 0x8400006C
Andrew Walbran0de4f162019-09-03 16:44:20 +010042#define SPCI_RUN_32 0x8400006D
Jose Marinho021528f2019-10-08 17:21:20 +010043#define SPCI_MSG_SEND_32 0x8400006E
44#define SPCI_MSG_SEND_DIRECT_REQ_32 0x8400006F
45#define SPCI_MSG_SEND_DIRECT_RESP_32 0x84000070
Jose Marinho4e4e4d52019-02-22 16:23:51 +000046
Andrew Walbran0de4f162019-09-03 16:44:20 +010047/* SPCI error codes. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +000048#define SPCI_NOT_SUPPORTED INT32_C(-1)
49#define SPCI_INVALID_PARAMETERS INT32_C(-2)
50#define SPCI_NO_MEMORY INT32_C(-3)
51#define SPCI_BUSY INT32_C(-4)
52#define SPCI_INTERRUPTED INT32_C(-5)
53#define SPCI_DENIED INT32_C(-6)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000054#define SPCI_RETRY INT32_C(-7)
Andrew Walbranf0c314d2019-10-02 14:24:26 +010055#define SPCI_ABORTED INT32_C(-8)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000056
Jose Marinho75509b42019-04-09 09:34:59 +010057/* Architected memory sharing message IDs. */
58enum spci_memory_share {
Andrew Walbran648fc3e2019-10-22 16:23:05 +010059 SPCI_MEMORY_DONATE = 0x0,
60 SPCI_MEMORY_LEND = 0x1,
61 SPCI_MEMORY_SHARE = 0x2,
62 SPCI_MEMORY_RELINQUISH = 0x3,
Jose Marinho75509b42019-04-09 09:34:59 +010063};
64
Jose Marinho4e4e4d52019-02-22 16:23:51 +000065/* SPCI function specific constants. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010066#define SPCI_MSG_RECV_BLOCK 0x1
Andrew Scull1262ac22019-04-05 12:44:26 +010067#define SPCI_MSG_RECV_BLOCK_MASK 0x1
Jose Marinho4e4e4d52019-02-22 16:23:51 +000068
69#define SPCI_MSG_SEND_NOTIFY 0x1
Andrew Walbran70bc8622019-10-07 14:15:58 +010070#define SPCI_MSG_SEND_NOTIFY_MASK 0x1
71#define SPCI_MSG_SEND_LEGACY_MEMORY 0x2
72#define SPCI_MSG_SEND_LEGACY_MEMORY_MASK 0x2
Andrew Scull1262ac22019-04-05 12:44:26 +010073
Andrew Walbranf0c314d2019-10-02 14:24:26 +010074#define SPCI_SLEEP_INDEFINITE 0
75
Andrew Scull1262ac22019-04-05 12:44:26 +010076/* The maximum length possible for a single message. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010077#define SPCI_MSG_PAYLOAD_MAX HF_MAILBOX_SIZE
Jose Marinho713f13a2019-05-21 11:54:16 +010078
Andrew Walbranf5972182019-10-15 15:41:26 +010079enum spci_memory_access {
80 SPCI_MEMORY_RO_NX,
81 SPCI_MEMORY_RO_X,
82 SPCI_MEMORY_RW_NX,
83 SPCI_MEMORY_RW_X,
Jose Marinho713f13a2019-05-21 11:54:16 +010084};
85
Andrew Walbranf5972182019-10-15 15:41:26 +010086enum spci_memory_type {
87 SPCI_MEMORY_DEVICE_MEM,
88 SPCI_MEMORY_NORMAL_MEM,
Jose Marinho713f13a2019-05-21 11:54:16 +010089};
90
Andrew Walbranf5972182019-10-15 15:41:26 +010091enum spci_memory_cacheability {
92 SPCI_MEMORY_CACHE_RESERVED = 0x0,
93 SPCI_MEMORY_CACHE_NON_CACHEABLE = 0x1,
94 SPCI_MEMORY_CACHE_WRITE_THROUGH = 0x2,
95 SPCI_MEMORY_CACHE_WRITE_BACK = 0x4,
96 SPCI_MEMORY_DEV_NGNRNE = 0x0,
97 SPCI_MEMORY_DEV_NGNRE = 0x1,
98 SPCI_MEMORY_DEV_NGRE = 0x2,
99 SPCI_MEMORY_DEV_GRE = 0x3,
Jose Marinho713f13a2019-05-21 11:54:16 +0100100};
101
Andrew Walbranf5972182019-10-15 15:41:26 +0100102enum spci_memory_shareability {
103 SPCI_MEMORY_SHARE_NON_SHAREABLE,
104 SPCI_MEMORY_RESERVED,
105 SPCI_MEMORY_OUTER_SHAREABLE,
106 SPCI_MEMORY_INNER_SHAREABLE,
Jose Marinho713f13a2019-05-21 11:54:16 +0100107};
108
Andrew Walbranf5972182019-10-15 15:41:26 +0100109#define SPCI_MEMORY_ACCESS_OFFSET (0x5U)
110#define SPCI_MEMORY_ACCESS_MASK ((0x3U) << SPCI_MEMORY_ACCESS_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100111
Andrew Walbranf5972182019-10-15 15:41:26 +0100112#define SPCI_MEMORY_TYPE_OFFSET (0x4U)
113#define SPCI_MEMORY_TYPE_MASK ((0x1U) << SPCI_MEMORY_TYPE_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100114
Andrew Walbranf5972182019-10-15 15:41:26 +0100115#define SPCI_MEMORY_CACHEABILITY_OFFSET (0x2U)
116#define SPCI_MEMORY_CACHEABILITY_MASK ((0x3U) <<\
117 SPCI_MEMORY_CACHEABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100118
Andrew Walbranf5972182019-10-15 15:41:26 +0100119#define SPCI_MEMORY_SHAREABILITY_OFFSET (0x0U)
120#define SPCI_MEMORY_SHAREABILITY_MASK ((0x3U) <<\
121 SPCI_MEMORY_SHAREABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100122
123#define LEND_ATTR_FUNCTION_SET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100124static inline void spci_set_memory_##name##_attr(uint16_t *attr,\
125 const enum spci_memory_##name perm)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100126{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100127 *attr = (*attr & ~(mask)) | ((perm << offset) & mask);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100128}
129
130#define LEND_ATTR_FUNCTION_GET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100131static inline enum spci_memory_##name spci_get_memory_##name##_attr(\
132 uint16_t attr)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100133{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100134 return (enum spci_memory_##name)((attr & mask) >> offset);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100135}
136
Andrew Walbranf5972182019-10-15 15:41:26 +0100137LEND_ATTR_FUNCTION_SET(access, SPCI_MEMORY_ACCESS_OFFSET,
138 SPCI_MEMORY_ACCESS_MASK)
139LEND_ATTR_FUNCTION_GET(access, SPCI_MEMORY_ACCESS_OFFSET,
140 SPCI_MEMORY_ACCESS_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100141
Andrew Walbranf5972182019-10-15 15:41:26 +0100142LEND_ATTR_FUNCTION_SET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
143LEND_ATTR_FUNCTION_GET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100144
Andrew Walbranf5972182019-10-15 15:41:26 +0100145LEND_ATTR_FUNCTION_SET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
146 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100147
Andrew Walbranf5972182019-10-15 15:41:26 +0100148LEND_ATTR_FUNCTION_GET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
149 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100150
Andrew Walbranf5972182019-10-15 15:41:26 +0100151LEND_ATTR_FUNCTION_SET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
152 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100153
Andrew Walbranf5972182019-10-15 15:41:26 +0100154LEND_ATTR_FUNCTION_GET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
155 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100156
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000157/* clang-format on */
158
Fuad Tabba494376e2019-08-05 12:35:10 +0100159/** The ID of a VM. These are assigned sequentially starting with an offset. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000160typedef uint16_t spci_vm_id_t;
Jose Marinho75509b42019-04-09 09:34:59 +0100161typedef uint32_t spci_memory_handle_t;
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000162
Andrew Walbran52d99672019-06-25 15:51:11 +0100163/**
164 * A count of VMs. This has the same range as the VM IDs but we give it a
165 * different name to make the different semantics clear.
166 */
167typedef spci_vm_id_t spci_vm_count_t;
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100168
169/** The index of a vCPU within a particular VM. */
Andrew Walbranb037d5b2019-06-25 17:19:41 +0100170typedef uint16_t spci_vcpu_index_t;
Andrew Walbran52d99672019-06-25 15:51:11 +0100171
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100172/**
173 * A count of vCPUs. This has the same range as the vCPU indices but we give it
174 * a different name to make the different semantics clear.
175 */
176typedef spci_vcpu_index_t spci_vcpu_count_t;
177
Andrew Walbranf18e63c2019-10-07 15:13:59 +0100178/** Parameter and return type of SPCI functions. */
Andrew Walbran7f920af2019-09-03 17:09:30 +0100179struct spci_value {
180 uint64_t func;
181 uint64_t arg1;
182 uint64_t arg2;
183 uint64_t arg3;
184 uint64_t arg4;
185 uint64_t arg5;
186 uint64_t arg6;
187 uint64_t arg7;
188};
Jose Marinho75509b42019-04-09 09:34:59 +0100189
Andrew Walbrand4d2fa12019-10-01 16:47:25 +0100190static inline spci_vm_id_t spci_msg_send_sender(struct spci_value args)
191{
192 return (args.arg1 >> 16) & 0xffff;
193}
194
195static inline spci_vm_id_t spci_msg_send_receiver(struct spci_value args)
196{
197 return args.arg1 & 0xffff;
198}
199
200static inline uint32_t spci_msg_send_size(struct spci_value args)
201{
202 return args.arg3;
203}
204
Andrew Walbran70bc8622019-10-07 14:15:58 +0100205static inline uint32_t spci_msg_send_attributes(struct spci_value args)
206{
207 return args.arg4;
208}
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000209
Jose Marinho75509b42019-04-09 09:34:59 +0100210struct spci_architected_message_header {
211 uint16_t type;
212
213 /*
214 * TODO: Padding is present to ensure that the field
215 * payload is aligned on a 64B boundary. SPCI
216 * spec must be updated to reflect this.
217 */
218 uint16_t reserved[3];
219 uint8_t payload[];
220};
221
222struct spci_memory_region_constituent {
Andrew Walbranf5972182019-10-15 15:41:26 +0100223 /**
224 * The base IPA of the constituent memory region, aligned to 4 kiB page
225 * size granularity.
226 */
Jose Marinho75509b42019-04-09 09:34:59 +0100227 uint64_t address;
Andrew Walbranf5972182019-10-15 15:41:26 +0100228 /** The number of 4 kiB pages in the constituent memory region. */
Jose Marinho75509b42019-04-09 09:34:59 +0100229 uint32_t page_count;
230
231 uint32_t reserved;
232};
233
Andrew Walbranf5972182019-10-15 15:41:26 +0100234struct spci_memory_region_attributes {
235 /** The ID of the VM to which the memory is being given or shared. */
236 spci_vm_id_t receiver;
237 /**
238 * The attributes with which the memory region should be mapped in the
239 * receiver's page table.
240 */
241 uint16_t memory_attributes;
Jose Marinho75509b42019-04-09 09:34:59 +0100242};
243
Andrew Walbranf5972182019-10-15 15:41:26 +0100244struct spci_memory_region {
245 /**
246 * An implementation defined value associated with the receiver and the
247 * memory region.
248 */
249 uint32_t tag;
250 /** Flags to control behaviour of the transaction. */
251 uint32_t flags;
252 /**
253 * The total number of 4 kiB pages included in this memory region. This
254 * must be equal to the sum of page counts specified in each
255 * `spci_memory_region_constituent`.
256 */
257 uint32_t page_count;
258 /**
259 * The number of constituents (`spci_memory_region_constituent`)
260 * included in this memory region.
261 */
262 uint32_t constituent_count;
263 /**
264 * The offset in bytes from the base address of this
265 * `spci_memory_region` to the start of the first
266 * `spci_memory_region_constituent`.
267 */
268 uint32_t constituent_offset;
269 /**
270 * The number of `spci_memory_region_attributes` entries included in
271 * this memory region.
272 */
273 uint32_t attribute_count;
274 /**
275 * An array of `attribute_count` memory region attribute descriptors.
276 * Each one specifies an endpoint and the attributes with which this
277 * memory region should be mapped in that endpoint's page table.
278 */
279 struct spci_memory_region_attributes attributes[];
Jose Marinho713f13a2019-05-21 11:54:16 +0100280};
281
Jose Marinho75509b42019-04-09 09:34:59 +0100282/* TODO: Move all the functions below this line to a support library. */
Andrew Walbran70bc8622019-10-07 14:15:58 +0100283
Andrew Walbranf5972182019-10-15 15:41:26 +0100284/**
285 * Gets the constituent array for an `spci_memory_region`.
286 */
287static inline struct spci_memory_region_constituent *
288spci_memory_region_get_constituents(struct spci_memory_region *memory_region)
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000289{
Andrew Walbranf5972182019-10-15 15:41:26 +0100290 return (struct spci_memory_region_constituent
291 *)((uint8_t *)memory_region +
292 memory_region->constituent_offset);
Jose Marinho75509b42019-04-09 09:34:59 +0100293}
294
295/**
296 * Helper method to fill in the information about the architected message.
297 */
Andrew Walbran70bc8622019-10-07 14:15:58 +0100298static inline void spci_architected_message_init(void *message,
Jose Marinho75509b42019-04-09 09:34:59 +0100299 enum spci_memory_share type)
300{
Jose Marinho75509b42019-04-09 09:34:59 +0100301 /* Fill the architected header. */
Andrew Walbran70bc8622019-10-07 14:15:58 +0100302 struct spci_architected_message_header *architected_header =
303 (struct spci_architected_message_header *)message;
Jose Marinho75509b42019-04-09 09:34:59 +0100304 architected_header->type = type;
305 architected_header->reserved[0] = 0;
306 architected_header->reserved[1] = 0;
307 architected_header->reserved[2] = 0;
308}
309
Andrew Walbranf5972182019-10-15 15:41:26 +0100310/** Gets the spci_memory_region within an architected message. */
311static inline struct spci_memory_region *spci_get_memory_region(void *message)
Jose Marinho75509b42019-04-09 09:34:59 +0100312{
313 struct spci_architected_message_header *architected_header =
Andrew Walbran70bc8622019-10-07 14:15:58 +0100314 (struct spci_architected_message_header *)message;
Jose Marinho75509b42019-04-09 09:34:59 +0100315 return (struct spci_memory_region *)architected_header->payload;
316}
317
318/**
Andrew Walbranf5972182019-10-15 15:41:26 +0100319 * Initialises the given `spci_memory_region` and copies the constituent
320 * information to it. Returns the length in bytes occupied by the data copied to
321 * `memory_region` (attributes, constituents and memory region header size).
Jose Marinho75509b42019-04-09 09:34:59 +0100322 */
Andrew Walbranf5972182019-10-15 15:41:26 +0100323static inline uint32_t spci_memory_region_init(
324 struct spci_memory_region *memory_region, spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100325 const struct spci_memory_region_constituent constituents[],
Andrew Walbranf5972182019-10-15 15:41:26 +0100326 uint32_t constituent_count, uint32_t tag,
327 enum spci_memory_access access, enum spci_memory_type type,
328 enum spci_memory_cacheability cacheability,
329 enum spci_memory_shareability shareability)
Jose Marinho75509b42019-04-09 09:34:59 +0100330{
Jose Marinho75509b42019-04-09 09:34:59 +0100331 uint32_t constituents_length =
Andrew Walbranf5972182019-10-15 15:41:26 +0100332 constituent_count *
Jose Marinho75509b42019-04-09 09:34:59 +0100333 sizeof(struct spci_memory_region_constituent);
334 uint32_t index;
Andrew Walbranf5972182019-10-15 15:41:26 +0100335 struct spci_memory_region_constituent *region_constituents;
336 uint16_t attributes = 0;
Jose Marinho75509b42019-04-09 09:34:59 +0100337
Andrew Walbranf5972182019-10-15 15:41:26 +0100338 /* Set memory region's page attributes. */
339 spci_set_memory_access_attr(&attributes, access);
340 spci_set_memory_type_attr(&attributes, type);
341 spci_set_memory_cacheability_attr(&attributes, cacheability);
342 spci_set_memory_shareability_attr(&attributes, shareability);
Jose Marinho75509b42019-04-09 09:34:59 +0100343
Andrew Walbranf5972182019-10-15 15:41:26 +0100344 memory_region->tag = tag;
345 memory_region->flags = 0;
346 memory_region->page_count = 0;
347 memory_region->constituent_count = constituent_count;
348 memory_region->attribute_count = 1;
349 memory_region->attributes[0].receiver = receiver;
350 memory_region->attributes[0].memory_attributes = attributes;
351
352 memory_region->constituent_offset =
353 sizeof(struct spci_memory_region) +
354 memory_region->attribute_count *
355 sizeof(struct spci_memory_region_attributes);
356 region_constituents =
357 spci_memory_region_get_constituents(memory_region);
358
359 for (index = 0; index < constituent_count; index++) {
360 region_constituents[index] = constituents[index];
361 region_constituents[index].reserved = 0;
362 memory_region->page_count += constituents[index].page_count;
Jose Marinho75509b42019-04-09 09:34:59 +0100363 }
364
365 /*
366 * TODO: Add assert ensuring that the specified message
367 * length is not greater than SPCI_MSG_PAYLOAD_MAX.
368 */
Jose Marinho713f13a2019-05-21 11:54:16 +0100369
Andrew Walbranf5972182019-10-15 15:41:26 +0100370 return memory_region->constituent_offset + constituents_length;
Jose Marinho75509b42019-04-09 09:34:59 +0100371}
372
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100373/**
374 * Constructs an 'architected message' for SPCI memory sharing of the given
375 * type.
376 */
377static inline uint32_t spci_memory_init(
378 void *message, enum spci_memory_share share_type, spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100379 struct spci_memory_region_constituent *region_constituents,
Andrew Walbranf5972182019-10-15 15:41:26 +0100380 uint32_t constituent_count, uint32_t tag,
381 enum spci_memory_access access, enum spci_memory_type type,
382 enum spci_memory_cacheability cacheability,
383 enum spci_memory_shareability shareability)
Jose Marinho75509b42019-04-09 09:34:59 +0100384{
Andrew Walbranf5972182019-10-15 15:41:26 +0100385 uint32_t message_length =
386 sizeof(struct spci_architected_message_header);
Jose Marinho713f13a2019-05-21 11:54:16 +0100387 struct spci_memory_region *memory_region =
Andrew Walbranf5972182019-10-15 15:41:26 +0100388 spci_get_memory_region(message);
Jose Marinho75509b42019-04-09 09:34:59 +0100389
390 /* Fill in the details on the common message header. */
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100391 spci_architected_message_init(message, share_type);
Jose Marinho75509b42019-04-09 09:34:59 +0100392
Andrew Walbranf5972182019-10-15 15:41:26 +0100393 /* Fill in memory region. */
394 message_length += spci_memory_region_init(
395 memory_region, receiver, region_constituents, constituent_count,
396 tag, access, type, cacheability, shareability);
Andrew Walbran70bc8622019-10-07 14:15:58 +0100397 return message_length;
Jose Marinho75509b42019-04-09 09:34:59 +0100398}
Jose Marinho56c25732019-05-20 09:48:53 +0100399
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100400/** Constructs an SPCI donate memory region message. */
401static inline uint32_t spci_memory_donate_init(
Andrew Walbranf5972182019-10-15 15:41:26 +0100402 void *message, spci_vm_id_t receiver,
Jose Marinho56c25732019-05-20 09:48:53 +0100403 struct spci_memory_region_constituent *region_constituents,
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100404 uint32_t constituent_count, uint32_t tag,
405 enum spci_memory_access access, enum spci_memory_type type,
406 enum spci_memory_cacheability cacheability,
407 enum spci_memory_shareability shareability)
Jose Marinho56c25732019-05-20 09:48:53 +0100408{
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100409 return spci_memory_init(message, SPCI_MEMORY_DONATE, receiver,
410 region_constituents, constituent_count, tag,
411 access, type, cacheability, shareability);
Jose Marinho713f13a2019-05-21 11:54:16 +0100412}
413
414/**
Andrew Walbranf5972182019-10-15 15:41:26 +0100415 * Constructs an SPCI memory region lend message.
Jose Marinho713f13a2019-05-21 11:54:16 +0100416 */
Andrew Walbran70bc8622019-10-07 14:15:58 +0100417static inline uint32_t spci_memory_lend_init(
Andrew Walbranf5972182019-10-15 15:41:26 +0100418 void *message, spci_vm_id_t receiver,
Jose Marinho713f13a2019-05-21 11:54:16 +0100419 struct spci_memory_region_constituent *region_constituents,
Andrew Walbranf5972182019-10-15 15:41:26 +0100420 uint32_t constituent_count, uint32_t tag,
421 enum spci_memory_access access, enum spci_memory_type type,
422 enum spci_memory_cacheability cacheability,
423 enum spci_memory_shareability shareability)
Jose Marinho713f13a2019-05-21 11:54:16 +0100424{
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100425 return spci_memory_init(message, SPCI_MEMORY_LEND, receiver,
426 region_constituents, constituent_count, tag,
427 access, type, cacheability, shareability);
428}
Jose Marinho713f13a2019-05-21 11:54:16 +0100429
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100430/**
431 * Constructs an SPCI memory region share message.
432 */
433static inline uint32_t spci_memory_share_init(
434 void *message, spci_vm_id_t receiver,
435 struct spci_memory_region_constituent *region_constituents,
436 uint32_t constituent_count, uint32_t tag,
437 enum spci_memory_access access, enum spci_memory_type type,
438 enum spci_memory_cacheability cacheability,
439 enum spci_memory_shareability shareability)
440{
441 return spci_memory_init(message, SPCI_MEMORY_SHARE, receiver,
442 region_constituents, constituent_count, tag,
443 access, type, cacheability, shareability);
444}
Jose Marinho713f13a2019-05-21 11:54:16 +0100445
Andrew Walbran648fc3e2019-10-22 16:23:05 +0100446/**
447 * Constructs an SPCI memory region relinquish message.
448 * A set of memory regions can be given back to the owner.
449 */
450static inline uint32_t spci_memory_relinquish_init(
451 void *message, spci_vm_id_t receiver,
452 struct spci_memory_region_constituent *region_constituents,
453 uint32_t constituent_count, uint32_t tag)
454{
455 return spci_memory_init(message, SPCI_MEMORY_RELINQUISH, receiver,
456 region_constituents, constituent_count, tag,
457 SPCI_MEMORY_RW_X, SPCI_MEMORY_DEVICE_MEM,
458 SPCI_MEMORY_DEV_NGNRNE,
459 SPCI_MEMORY_SHARE_NON_SHAREABLE);
Jose Marinho56c25732019-05-20 09:48:53 +0100460}