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Jose Marinho4e4e4d52019-02-22 16:23:51 +00001/*
2 * Copyright 2019 The Hafnium Authors.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Jose Marinho4e4e4d52019-02-22 16:23:51 +000017#pragma once
18
Jose Marinho75509b42019-04-09 09:34:59 +010019#include "hf/types.h"
20
Jose Marinho4e4e4d52019-02-22 16:23:51 +000021/* clang-format off */
22
23#define SPCI_LOW_32_ID 0x84000060
24#define SPCI_HIGH_32_ID 0x8400007F
25#define SPCI_LOW_64_ID 0xC4000060
26#define SPCI_HIGH_32_ID 0x8400007F
27
28/* SPCI function identifiers. */
Andrew Walbran0de4f162019-09-03 16:44:20 +010029#define SPCI_ERROR_32 0x84000060
30#define SPCI_SUCCESS_32 0x84000061
31#define SPCI_INTERRUPT_32 0x84000062
32#define SPCI_VERSION_32 0x84000063
Jose Marinho021528f2019-10-08 17:21:20 +010033#define SPCI_FEATURES_32 0x84000064
34#define SPCI_RX_RELEASE_32 0x84000065
35#define SPCI_RXTX_MAP_32 0x84000066
36#define SPCI_RXTX_UNMAP_32 0x84000067
37#define SPCI_PARTITION_INFO_GET_32 0x84000068
38#define SPCI_ID_GET_32 0x84000069
Andrew Walbran0de4f162019-09-03 16:44:20 +010039#define SPCI_MSG_POLL_32 0x8400006A
Jose Marinho021528f2019-10-08 17:21:20 +010040#define SPCI_MSG_WAIT_32 0x8400006B
41#define SPCI_YIELD_32 0x8400006C
Andrew Walbran0de4f162019-09-03 16:44:20 +010042#define SPCI_RUN_32 0x8400006D
Jose Marinho021528f2019-10-08 17:21:20 +010043#define SPCI_MSG_SEND_32 0x8400006E
44#define SPCI_MSG_SEND_DIRECT_REQ_32 0x8400006F
45#define SPCI_MSG_SEND_DIRECT_RESP_32 0x84000070
Jose Marinho4e4e4d52019-02-22 16:23:51 +000046
Andrew Walbran0de4f162019-09-03 16:44:20 +010047/* SPCI error codes. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +000048#define SPCI_NOT_SUPPORTED INT32_C(-1)
49#define SPCI_INVALID_PARAMETERS INT32_C(-2)
50#define SPCI_NO_MEMORY INT32_C(-3)
51#define SPCI_BUSY INT32_C(-4)
52#define SPCI_INTERRUPTED INT32_C(-5)
53#define SPCI_DENIED INT32_C(-6)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000054#define SPCI_RETRY INT32_C(-7)
Andrew Walbranf0c314d2019-10-02 14:24:26 +010055#define SPCI_ABORTED INT32_C(-8)
Jose Marinho4e4e4d52019-02-22 16:23:51 +000056
57/* SPCI function specific constants. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010058#define SPCI_MSG_RECV_BLOCK 0x1
Andrew Scull1262ac22019-04-05 12:44:26 +010059#define SPCI_MSG_RECV_BLOCK_MASK 0x1
Jose Marinho4e4e4d52019-02-22 16:23:51 +000060
61#define SPCI_MSG_SEND_NOTIFY 0x1
Andrew Walbran70bc8622019-10-07 14:15:58 +010062#define SPCI_MSG_SEND_NOTIFY_MASK 0x1
Andrew Walbran85aabe92019-12-03 12:03:03 +000063#define SPCI_MSG_SEND_LEGACY_MEMORY_DONATE 0x10
64#define SPCI_MSG_SEND_LEGACY_MEMORY_LEND 0x20
65#define SPCI_MSG_SEND_LEGACY_MEMORY_SHARE 0x30
66#define SPCI_MSG_SEND_LEGACY_MEMORY_RELINQUISH 0x40
67#define SPCI_MSG_SEND_LEGACY_MEMORY_MASK 0x70
Andrew Scull1262ac22019-04-05 12:44:26 +010068
Andrew Walbranf0c314d2019-10-02 14:24:26 +010069#define SPCI_SLEEP_INDEFINITE 0
70
Andrew Walbranbfffb0f2019-11-05 14:02:34 +000071/**
72 * For use where the SPCI specification refers explicitly to '4K pages'. Not to
73 * be confused with PAGE_SIZE, which is the translation granule Hafnium is
74 * configured to use.
75 */
76#define SPCI_PAGE_SIZE 4096
77
Andrew Scull1262ac22019-04-05 12:44:26 +010078/* The maximum length possible for a single message. */
Andrew Walbran70bc8622019-10-07 14:15:58 +010079#define SPCI_MSG_PAYLOAD_MAX HF_MAILBOX_SIZE
Jose Marinho713f13a2019-05-21 11:54:16 +010080
Andrew Walbranf5972182019-10-15 15:41:26 +010081enum spci_memory_access {
82 SPCI_MEMORY_RO_NX,
83 SPCI_MEMORY_RO_X,
84 SPCI_MEMORY_RW_NX,
85 SPCI_MEMORY_RW_X,
Jose Marinho713f13a2019-05-21 11:54:16 +010086};
87
Andrew Walbranf5972182019-10-15 15:41:26 +010088enum spci_memory_type {
89 SPCI_MEMORY_DEVICE_MEM,
90 SPCI_MEMORY_NORMAL_MEM,
Jose Marinho713f13a2019-05-21 11:54:16 +010091};
92
Andrew Walbranf5972182019-10-15 15:41:26 +010093enum spci_memory_cacheability {
94 SPCI_MEMORY_CACHE_RESERVED = 0x0,
95 SPCI_MEMORY_CACHE_NON_CACHEABLE = 0x1,
96 SPCI_MEMORY_CACHE_WRITE_THROUGH = 0x2,
97 SPCI_MEMORY_CACHE_WRITE_BACK = 0x4,
98 SPCI_MEMORY_DEV_NGNRNE = 0x0,
99 SPCI_MEMORY_DEV_NGNRE = 0x1,
100 SPCI_MEMORY_DEV_NGRE = 0x2,
101 SPCI_MEMORY_DEV_GRE = 0x3,
Jose Marinho713f13a2019-05-21 11:54:16 +0100102};
103
Andrew Walbranf5972182019-10-15 15:41:26 +0100104enum spci_memory_shareability {
105 SPCI_MEMORY_SHARE_NON_SHAREABLE,
106 SPCI_MEMORY_RESERVED,
107 SPCI_MEMORY_OUTER_SHAREABLE,
108 SPCI_MEMORY_INNER_SHAREABLE,
Jose Marinho713f13a2019-05-21 11:54:16 +0100109};
110
Andrew Walbranf5972182019-10-15 15:41:26 +0100111#define SPCI_MEMORY_ACCESS_OFFSET (0x5U)
112#define SPCI_MEMORY_ACCESS_MASK ((0x3U) << SPCI_MEMORY_ACCESS_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100113
Andrew Walbranf5972182019-10-15 15:41:26 +0100114#define SPCI_MEMORY_TYPE_OFFSET (0x4U)
115#define SPCI_MEMORY_TYPE_MASK ((0x1U) << SPCI_MEMORY_TYPE_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100116
Andrew Walbranf5972182019-10-15 15:41:26 +0100117#define SPCI_MEMORY_CACHEABILITY_OFFSET (0x2U)
118#define SPCI_MEMORY_CACHEABILITY_MASK ((0x3U) <<\
119 SPCI_MEMORY_CACHEABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100120
Andrew Walbranf5972182019-10-15 15:41:26 +0100121#define SPCI_MEMORY_SHAREABILITY_OFFSET (0x0U)
122#define SPCI_MEMORY_SHAREABILITY_MASK ((0x3U) <<\
123 SPCI_MEMORY_SHAREABILITY_OFFSET)
Jose Marinho713f13a2019-05-21 11:54:16 +0100124
125#define LEND_ATTR_FUNCTION_SET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100126static inline void spci_set_memory_##name##_attr(uint16_t *attr,\
127 const enum spci_memory_##name perm)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100128{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100129 *attr = (*attr & ~(mask)) | ((perm << offset) & mask);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100130}
131
132#define LEND_ATTR_FUNCTION_GET(name, offset, mask) \
Andrew Walbranf5972182019-10-15 15:41:26 +0100133static inline enum spci_memory_##name spci_get_memory_##name##_attr(\
134 uint16_t attr)\
Jose Marinho713f13a2019-05-21 11:54:16 +0100135{\
Andrew Walbranf5972182019-10-15 15:41:26 +0100136 return (enum spci_memory_##name)((attr & mask) >> offset);\
Jose Marinho713f13a2019-05-21 11:54:16 +0100137}
138
Andrew Walbranf5972182019-10-15 15:41:26 +0100139LEND_ATTR_FUNCTION_SET(access, SPCI_MEMORY_ACCESS_OFFSET,
140 SPCI_MEMORY_ACCESS_MASK)
141LEND_ATTR_FUNCTION_GET(access, SPCI_MEMORY_ACCESS_OFFSET,
142 SPCI_MEMORY_ACCESS_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100143
Andrew Walbranf5972182019-10-15 15:41:26 +0100144LEND_ATTR_FUNCTION_SET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
145LEND_ATTR_FUNCTION_GET(type, SPCI_MEMORY_TYPE_OFFSET, SPCI_MEMORY_TYPE_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100146
Andrew Walbranf5972182019-10-15 15:41:26 +0100147LEND_ATTR_FUNCTION_SET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
148 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100149
Andrew Walbranf5972182019-10-15 15:41:26 +0100150LEND_ATTR_FUNCTION_GET(cacheability, SPCI_MEMORY_CACHEABILITY_OFFSET,
151 SPCI_MEMORY_CACHEABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100152
Andrew Walbranf5972182019-10-15 15:41:26 +0100153LEND_ATTR_FUNCTION_SET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
154 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100155
Andrew Walbranf5972182019-10-15 15:41:26 +0100156LEND_ATTR_FUNCTION_GET(shareability, SPCI_MEMORY_SHAREABILITY_OFFSET,
157 SPCI_MEMORY_SHAREABILITY_MASK)
Jose Marinho713f13a2019-05-21 11:54:16 +0100158
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000159/* clang-format on */
160
Fuad Tabba494376e2019-08-05 12:35:10 +0100161/** The ID of a VM. These are assigned sequentially starting with an offset. */
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000162typedef uint16_t spci_vm_id_t;
Jose Marinho75509b42019-04-09 09:34:59 +0100163typedef uint32_t spci_memory_handle_t;
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000164
Andrew Walbran52d99672019-06-25 15:51:11 +0100165/**
166 * A count of VMs. This has the same range as the VM IDs but we give it a
167 * different name to make the different semantics clear.
168 */
169typedef spci_vm_id_t spci_vm_count_t;
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100170
171/** The index of a vCPU within a particular VM. */
Andrew Walbranb037d5b2019-06-25 17:19:41 +0100172typedef uint16_t spci_vcpu_index_t;
Andrew Walbran52d99672019-06-25 15:51:11 +0100173
Andrew Walbranc6d23c42019-06-26 13:30:42 +0100174/**
175 * A count of vCPUs. This has the same range as the vCPU indices but we give it
176 * a different name to make the different semantics clear.
177 */
178typedef spci_vcpu_index_t spci_vcpu_count_t;
179
Andrew Walbranf18e63c2019-10-07 15:13:59 +0100180/** Parameter and return type of SPCI functions. */
Andrew Walbran7f920af2019-09-03 17:09:30 +0100181struct spci_value {
182 uint64_t func;
183 uint64_t arg1;
184 uint64_t arg2;
185 uint64_t arg3;
186 uint64_t arg4;
187 uint64_t arg5;
188 uint64_t arg6;
189 uint64_t arg7;
190};
Jose Marinho75509b42019-04-09 09:34:59 +0100191
Andrew Walbrand4d2fa12019-10-01 16:47:25 +0100192static inline spci_vm_id_t spci_msg_send_sender(struct spci_value args)
193{
194 return (args.arg1 >> 16) & 0xffff;
195}
196
197static inline spci_vm_id_t spci_msg_send_receiver(struct spci_value args)
198{
199 return args.arg1 & 0xffff;
200}
201
202static inline uint32_t spci_msg_send_size(struct spci_value args)
203{
204 return args.arg3;
205}
206
Andrew Walbran70bc8622019-10-07 14:15:58 +0100207static inline uint32_t spci_msg_send_attributes(struct spci_value args)
208{
209 return args.arg4;
210}
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000211
Andrew Walbran4db5f3a2019-11-04 11:42:42 +0000212static inline spci_vm_id_t spci_vm_id(struct spci_value args)
213{
214 return (args.arg1 >> 16) & 0xffff;
215}
216
217static inline spci_vcpu_index_t spci_vcpu_index(struct spci_value args)
218{
219 return args.arg1 & 0xffff;
220}
221
222static inline uint64_t spci_vm_vcpu(spci_vm_id_t vm_id,
223 spci_vcpu_index_t vcpu_index)
224{
225 return ((uint32_t)vm_id << 16) | vcpu_index;
226}
227
Jose Marinho75509b42019-04-09 09:34:59 +0100228struct spci_memory_region_constituent {
Andrew Walbranf5972182019-10-15 15:41:26 +0100229 /**
230 * The base IPA of the constituent memory region, aligned to 4 kiB page
231 * size granularity.
232 */
Jose Marinho75509b42019-04-09 09:34:59 +0100233 uint64_t address;
Andrew Walbranf5972182019-10-15 15:41:26 +0100234 /** The number of 4 kiB pages in the constituent memory region. */
Jose Marinho75509b42019-04-09 09:34:59 +0100235 uint32_t page_count;
236
237 uint32_t reserved;
238};
239
Andrew Walbranf5972182019-10-15 15:41:26 +0100240struct spci_memory_region_attributes {
241 /** The ID of the VM to which the memory is being given or shared. */
242 spci_vm_id_t receiver;
243 /**
244 * The attributes with which the memory region should be mapped in the
245 * receiver's page table.
246 */
247 uint16_t memory_attributes;
Jose Marinho75509b42019-04-09 09:34:59 +0100248};
249
Andrew Walbran28b02102019-11-20 18:03:10 +0000250/** Flags to control the behaviour of a memory sharing transaction. */
251typedef uint32_t spci_memory_region_flags_t;
252
253/**
254 * Clear memory region contents after unmapping it from the sender and before
255 * mapping it for any receiver.
256 */
257#define SPCI_MEMORY_REGION_FLAG_CLEAR 0x1
258
Andrew Walbranf5972182019-10-15 15:41:26 +0100259struct spci_memory_region {
260 /**
261 * An implementation defined value associated with the receiver and the
262 * memory region.
263 */
264 uint32_t tag;
265 /** Flags to control behaviour of the transaction. */
Andrew Walbran28b02102019-11-20 18:03:10 +0000266 spci_memory_region_flags_t flags;
Andrew Walbrane28f4a22019-12-24 15:45:36 +0000267 /** Sender VM ID. */
268 spci_vm_id_t sender;
269 /** Reserved field, must be 0. */
270 uint16_t reserved;
Andrew Walbranf5972182019-10-15 15:41:26 +0100271 /**
272 * The total number of 4 kiB pages included in this memory region. This
273 * must be equal to the sum of page counts specified in each
274 * `spci_memory_region_constituent`.
275 */
276 uint32_t page_count;
277 /**
278 * The number of constituents (`spci_memory_region_constituent`)
279 * included in this memory region.
280 */
281 uint32_t constituent_count;
282 /**
283 * The offset in bytes from the base address of this
284 * `spci_memory_region` to the start of the first
285 * `spci_memory_region_constituent`.
286 */
287 uint32_t constituent_offset;
288 /**
289 * The number of `spci_memory_region_attributes` entries included in
290 * this memory region.
291 */
292 uint32_t attribute_count;
293 /**
294 * An array of `attribute_count` memory region attribute descriptors.
295 * Each one specifies an endpoint and the attributes with which this
296 * memory region should be mapped in that endpoint's page table.
297 */
298 struct spci_memory_region_attributes attributes[];
Jose Marinho713f13a2019-05-21 11:54:16 +0100299};
300
Andrew Walbranf5972182019-10-15 15:41:26 +0100301/**
302 * Gets the constituent array for an `spci_memory_region`.
303 */
304static inline struct spci_memory_region_constituent *
305spci_memory_region_get_constituents(struct spci_memory_region *memory_region)
Jose Marinho4e4e4d52019-02-22 16:23:51 +0000306{
Andrew Walbranf5972182019-10-15 15:41:26 +0100307 return (struct spci_memory_region_constituent
308 *)((uint8_t *)memory_region +
309 memory_region->constituent_offset);
Jose Marinho75509b42019-04-09 09:34:59 +0100310}
311
Andrew Walbran66839252019-11-07 16:01:48 +0000312uint32_t spci_memory_region_init(
Andrew Walbrane28f4a22019-12-24 15:45:36 +0000313 struct spci_memory_region *memory_region, spci_vm_id_t sender,
314 spci_vm_id_t receiver,
Jose Marinho75509b42019-04-09 09:34:59 +0100315 const struct spci_memory_region_constituent constituents[],
Andrew Walbranf5972182019-10-15 15:41:26 +0100316 uint32_t constituent_count, uint32_t tag,
Andrew Walbran28b02102019-11-20 18:03:10 +0000317 spci_memory_region_flags_t flags, enum spci_memory_access access,
318 enum spci_memory_type type, enum spci_memory_cacheability cacheability,
Andrew Walbran66839252019-11-07 16:01:48 +0000319 enum spci_memory_shareability shareability);