blob: a18dcf9866f3b35c99d419c30fa1a9a1d1fd212a [file] [log] [blame]
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -05001#!/usr/bin/env bash
Fathi Boudra422bf772019-12-02 11:10:16 +02002#
Alexei Fedorov20fdf502020-07-27 17:36:38 +01003# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
Fathi Boudra422bf772019-12-02 11:10:16 +02004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8#
9# This script builds the TF in different configs.
10# Rather than telling cov-build to build TF using a simple 'make all' command,
11# the goal here is to combine several build flags to analyse more of our source
12# code in a single 'build'. The Coverity Scan service does not have the notion
13# of separate types of build - there is just one linear sequence of builds in
14# the project history.
15#
16
17# Bail out as soon as an error is encountered.
18set -e
19
20TF_SOURCES=$1
21if [ ! -d "$TF_SOURCES" ]; then
22 echo "ERROR: '$TF_SOURCES' does not exist or is not a directory"
23 echo "Usage: $(basename "$0") <trusted-firmware-directory>"
24 exit 1
25fi
26
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -050027export CROSS_COMPILE=aarch64-none-elf-
Fathi Boudra422bf772019-12-02 11:10:16 +020028
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050029containing_dir="$(readlink -f "$(dirname "$0")/")"
30. $containing_dir/common-def.sh
31
Fathi Boudra422bf772019-12-02 11:10:16 +020032# Get mbed TLS library code to build Trusted Firmware with Trusted Board Boot
33# support. The version of mbed TLS to use here must be the same as when
34# building TF in the usual context.
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050035if [ ! -d "$MBED_TLS_DIR" ]; then
36 git clone -q --depth 1 -b "$MBED_TLS_SOURCES_TAG" "$MBED_TLS_URL_REPO" "$MBED_TLS_DIR"
Fathi Boudra422bf772019-12-02 11:10:16 +020037fi
Leonardo Sandovalc4dfbb02020-08-17 10:21:44 -050038
Fathi Boudra422bf772019-12-02 11:10:16 +020039TBB_OPTIONS="TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$(pwd)/mbedtls"
40ARM_TBB_OPTIONS="$TBB_OPTIONS ARM_ROTPK_LOCATION=devel_rsa"
41
42cd "$TF_SOURCES"
43
44# Clean TF source dir to make sure we don't analyse temporary files.
45make distclean
46
47#
48# Build TF in different configurations to get as much coverage as possible
49#
50
51# We need to clean the platform build between each configuration because Trusted
52# Firmware's build system doesn't track build options dependencies and won't
53# rebuild the files affected by build options changes.
54clean_build()
55{
56 local flags="$*"
57 echo "Building TF with the following build flags:"
58 echo " $flags"
59 make $flags clean
60 make $flags all
61 echo "Build config complete."
62 echo
63}
64
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050065# Defines common flags between platforms
66common_flags() {
67 local release="${1:-}"
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050068 local num_cpus="$(/usr/bin/getconf _NPROCESSORS_ONLN)"
69 local parallel_make="-j $num_cpus"
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050070
71 # default to debug mode, unless a parameter is passed to the function
72 debug="DEBUG=1"
73 [ -n "$release" ] && debug=""
74
Leonardo Sandoval9b69f502020-08-14 13:00:38 -050075 echo " $parallel_make $debug -s "
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050076}
77
Fathi Boudra422bf772019-12-02 11:10:16 +020078#
79# FVP platform
80# We'll use the following flags for all FVP builds.
81#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050082fvp_common_flags="$(common_flags) PLAT=fvp"
Fathi Boudra422bf772019-12-02 11:10:16 +020083
84# Try all possible SPDs.
85clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
86clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
87 TSP_NS_INTR_ASYNC_PREEMPT=1
88clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
89clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
90
Zelalemc9531f82020-08-04 15:37:08 -050091# Dualroot chain of trust.
92clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tspd COT=dualroot
93
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050094clean_build $fvp_common_flags SPD=trusty
95clean_build $fvp_common_flags SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1
Fathi Boudra422bf772019-12-02 11:10:16 +020096
97# SDEI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -050098clean_build $fvp_common_flags SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +020099
Zelalemc9531f82020-08-04 15:37:08 -0500100# SDEI with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500101clean_build $fvp_common_flags SDEI_IN_FCONF=1 SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1
Zelalemc9531f82020-08-04 15:37:08 -0500102
103# Secure interrupt descriptors with fconf
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500104clean_build $fvp_common_flags SEC_INT_DESC_IN_FCONF=1
Zelalemc9531f82020-08-04 15:37:08 -0500105
Fathi Boudra422bf772019-12-02 11:10:16 +0200106# Without coherent memory
107clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd USE_COHERENT_MEM=0
108
109# Using PSCI extended State ID format rather than the original format
110clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd PSCI_EXTENDED_STATE_ID=1 \
111 ARM_RECOM_STATE_ID_ENC=1
112
113# Alternative boot flows (This changes some of the platform initialisation code)
114clean_build $fvp_common_flags EL3_PAYLOAD=0x80000000
115clean_build $fvp_common_flags PRELOADED_BL33_BASE=0x80000000
116
117# Using the SP804 timer instead of the Generic Timer
118clean_build $fvp_common_flags FVP_USE_SP804_TIMER=1
119
120# Using the CCN driver and multi cluster topology
121clean_build $fvp_common_flags FVP_CLUSTER_COUNT=4
122
123# PMF
124clean_build $fvp_common_flags ENABLE_PMF=1
125
126# stack protector
127clean_build $fvp_common_flags ENABLE_STACK_PROTECTOR=strong
128
129# AArch32 build
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500130clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200131 ARCH=aarch32 AARCH32_SP=sp_min \
132 RESET_TO_SP_MIN=1 PRELOADED_BL33_BASE=0x80000000
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500133clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200134 ARCH=aarch32 AARCH32_SP=sp_min
135
136# Xlat tables lib version 1 (AArch64 and AArch32)
137clean_build $fvp_common_flags ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500138clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200139 ARCH=aarch32 AARCH32_SP=sp_min ARM_XLAT_TABLES_LIB_V1=1 RECLAIM_INIT_CODE=0
140
Zelalemc9531f82020-08-04 15:37:08 -0500141# SPM support based on Management Mode Interface Specification
142clean_build $fvp_common_flags SPM_MM=1 EL3_EXCEPTION_HANDLING=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200143
Zelalemc9531f82020-08-04 15:37:08 -0500144# SPM support with TOS(optee) as SPM sitting at S-EL1
145clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=0
146
147# SPM support with Secure hafnium as SPM sitting at S-EL2
148# SP_LAYOUT_FILE is used only during FIP creation but build won't progress
149# if we have NULL value to it, so passing a dummy string.
150clean_build $fvp_common_flags SPD=spmd SPMD_SPM_AT_SEL2=1 ARM_ARCH_MINOR=4 \
151 CTX_INCLUDE_EL2_REGS=1 SP_LAYOUT_FILE=dummy
Fathi Boudra422bf772019-12-02 11:10:16 +0200152
153#BL2 at EL3 support
154clean_build $fvp_common_flags BL2_AT_EL3=1
Leonardo Sandoval1c24ae52020-07-08 11:47:23 -0500155clean_build $fvp_common_flags CROSS_COMPILE=arm-none-eabi- \
Fathi Boudra422bf772019-12-02 11:10:16 +0200156 ARCH=aarch32 AARCH32_SP=sp_min BL2_AT_EL3=1
157
Zelalemc9531f82020-08-04 15:37:08 -0500158# RAS Extension Support
159clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
160 FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
161 SDEI_SUPPORT=1
162
163# Hardware Assisted Coherency(DynamIQ)
164clean_build $fvp_common_flags FVP_CLUSTER_COUNT=1 FVP_MAX_CPUS_PER_CLUSTER=8 \
165 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0
166
167# Pointer Authentication Support
168clean_build $fvp_common_flags CTX_INCLUDE_PAUTH_REGS=1 \
169 ARM_ARCH_MINOR=5 EL3_EXCEPTION_HANDLING=1 BRANCH_PROTECTION=1 SDEI_SUPPORT=1 SPD=tspd TSP_NS_INTR_ASYNC_PREEMPT=1
170
171# Undefined Behaviour Sanitizer
172# Building with UBSAN SANITIZE_UB=on increases the executable size.
173# Hence it is only properly supported in bl31 with RESET_TO_BL31 enabled
174make $fvp_common_flags clean
175make $fvp_common_flags SANITIZE_UB=on RESET_TO_BL31=1 bl31
176
177# debugfs feature
178clean_build $fvp_common_flags DEBUG=1 USE_DEBUGFS=1
179
180# MPAM feature
181clean_build $fvp_common_flags ENABLE_MPAM_FOR_LOWER_ELS=1
182
183# Using GICv3.1 driver with extended PPI and SPI range
184clean_build $fvp_common_flags GIC_EXT_INTID=1
185
186# Using GICv4 features with extended PPI and SPI range
187clean_build $fvp_common_flags GIC_ENABLE_V4_EXTN=1 GIC_EXT_INTID=1
188
Alexei Fedorov20fdf502020-07-27 17:36:38 +0100189# Measured Boot
190clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} MEASURED_BOOT=1
191
Fathi Boudra422bf772019-12-02 11:10:16 +0200192#
193# Juno platform
194# We'll use the following flags for all Juno builds.
195#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500196juno_common_flags="$(common_flags) PLAT=juno"
Fathi Boudra422bf772019-12-02 11:10:16 +0200197clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS}
198clean_build $juno_common_flags EL3_PAYLOAD=0x80000000
199clean_build $juno_common_flags ENABLE_STACK_PROTECTOR=strong
200clean_build $juno_common_flags CSS_USE_SCMI_SDS_DRIVER=0
Zelalemc9531f82020-08-04 15:37:08 -0500201clean_build $juno_common_flags SPD=tspd ${ARM_TBB_OPTIONS} ARM_CRYPTOCELL_INTEG=1 CCSBROM_LIB_PATH=${CRYPTOCELL_LIB_PATH} KEY_SIZE=2048
Fathi Boudra422bf772019-12-02 11:10:16 +0200202
203#
204# System Guidance for Infrastructure platform SGI575
Zelalemc9531f82020-08-04 15:37:08 -0500205# Enable build config with RAS_EXTENSION to cover more files
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500206make $(common_flags) PLAT=sgi575 ${ARM_TBB_OPTIONS} EL3_EXCEPTION_HANDLING=1 FAULT_INJECTION_SUPPORT=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500207 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 SDEI_SUPPORT=1 SPM_MM=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200208#
Zelalemc9531f82020-08-04 15:37:08 -0500209# System Guidance for Mobile platform SGM775
210#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500211make $(common_flags) PLAT=sgm775 ${ARM_TBB_OPTIONS} SPD=tspd \
Zelalemc9531f82020-08-04 15:37:08 -0500212 CSS_USE_SCMI_SDS_DRIVER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200213
214#
Vijayenthiran Subramaniam2a47a6d2020-07-22 14:16:58 +0530215# System Guidance for Infrastructure platform RD-N1-Edge-Dual
Fathi Boudra422bf772019-12-02 11:10:16 +0200216#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500217make $(common_flags) PLAT=rdn1edge CSS_SGI_CHIP_COUNT=2 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200218
219#
220# System Guidance for Infrastructure platform RD-E1Edge
221#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500222make $(common_flags) PLAT=rde1edge ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=1 all
Zelalemc9531f82020-08-04 15:37:08 -0500223
224#
225# System Guidance for Infrastructure platform RD-Daniel
226#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500227make $(common_flags) PLAT=rddaniel ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500228
229#
230# System Guidance for Infrastructure platform RD-Danielxlr
231#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500232make $(common_flags) PLAT=rddanielxlr ${ARM_TBB_OPTIONS} CSS_SGI_CHIP_COUNT=4 all
Zelalemc9531f82020-08-04 15:37:08 -0500233
234#
235# Neoverse N1 SDP platform
236#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500237make $(common_flags) PLAT=n1sdp ${ARM_TBB_OPTIONS} all
Zelalemc9531f82020-08-04 15:37:08 -0500238
239#
240# FVP VE platform
241#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500242make $(common_flags) PLAT=fvp_ve AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500243 CROSS_COMPILE=arm-none-eabi- ARM_ARCH_MAJOR=7 \
244 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
245 FVP_HW_CONFIG_DTS=fdts/fvp-ve-Cortex-A5x1.dts all
246
247#
248# A5 DesignStart Platform
249#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500250make $(common_flags) PLAT=a5ds AARCH32_SP=sp_min ARCH=aarch32 \
Zelalemc9531f82020-08-04 15:37:08 -0500251 ARM_ARCH_MAJOR=7 ARM_CORTEX_A5=yes ARM_XLAT_TABLES_LIB_V1=1 \
252 CROSS_COMPILE=arm-none-eabi- FVP_HW_CONFIG_DTS=fdts/a5ds.dts
253
254#
255# Corstone700 Platform
256#
257
258corstone700_common_flags="CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500259 $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500260 PLAT=corstone700 \
261 ARCH=aarch32 \
262 RESET_TO_SP_MIN=1 \
263 AARCH32_SP=sp_min \
264 ARM_LINUX_KERNEL_AS_BL33=0 \
265 ARM_PRELOADED_DTB_BASE=0x80400000 \
266 ENABLE_PIE=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500267 ENABLE_STACK_PROTECTOR=all \
268 all"
269
270echo "Info: Building Corstone700 FVP ..."
271
272make TARGET_PLATFORM=fvp ${corstone700_common_flags}
273
274echo "Info: Building Corstone700 FPGA ..."
275
276make TARGET_PLATFORM=fpga ${corstone700_common_flags}
277
278#
279# Arm internal FPGA port
280#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500281make PLAT=arm_fpga $(common_flags) CROSS_COMPILE=aarch64-none-elf- \
Zelalemc9531f82020-08-04 15:37:08 -0500282 FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
283
284#
285# Total Compute platform
286#
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500287make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
Fathi Boudra422bf772019-12-02 11:10:16 +0200288
289# Partners' platforms.
290# Enable as many features as possible.
291# We don't need to clean between each build here because we only do one build
292# per platform so we don't hit the build flags dependency problem.
Fathi Boudra422bf772019-12-02 11:10:16 +0200293
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500294make PLAT=mt8173 $(common_flags) all
295make PLAT=mt8183 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200296
Zelalemc9531f82020-08-04 15:37:08 -0500297make PLAT=rk3288 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500298 $(common_flags) ARCH=aarch32 AARCH32_SP=sp_min all
299make PLAT=rk3368 $(common_flags) COREBOOT=1 all
300make PLAT=rk3399 $(common_flags) COREBOOT=1 PLAT_RK_DP_HDCP=1 all
301make PLAT=rk3328 $(common_flags) COREBOOT=1 PLAT_RK_SECURE_DDR_MINILOADER=1 all
302make PLAT=px30 $(common_flags) PLAT_RK_SECURE_DDR_MINILOADER=1 all
Fathi Boudra422bf772019-12-02 11:10:16 +0200303
304# Although we do several consecutive builds for the Tegra platform below, we
305# don't need to clean between each one because the Tegra makefiles specify
306# a different build directory per SoC.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500307make PLAT=tegra TARGET_SOC=t210 $(common_flags) all
308make PLAT=tegra TARGET_SOC=t132 $(common_flags) all
309make PLAT=tegra TARGET_SOC=t186 $(common_flags) all
310make PLAT=tegra TARGET_SOC=t194 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200311
312# For the Xilinx platform, artificially increase the extents of BL31 memory
313# (using the platform-specific build options ZYNQMP_ATF_MEM_{BASE,SIZE}).
314# If we keep the default values, BL31 doesn't fit when it is built with all
315# these build flags.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500316make PLAT=zynqmp $(common_flags) \
Fathi Boudra422bf772019-12-02 11:10:16 +0200317 RESET_TO_BL31=1 SPD=tspd \
318 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 ZYNQMP_ATF_MEM_SIZE=0x00040000 \
319 all
320
Zelalemc9531f82020-08-04 15:37:08 -0500321# Build both for silicon (default) and virtual QEMU platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500322clean_build PLAT=versal $(common_flags)
323clean_build PLAT=versal $(common_flags) VERSAL_PLATFORM=versal_virt
Zelalemc9531f82020-08-04 15:37:08 -0500324
325# Platforms from Allwinner
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500326make PLAT=sun50i_a64 $(common_flags) all
327make PLAT=sun50i_h6 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500328
329# Platforms from i.MX
330make AARCH32_SP=optee ARCH=aarch32 ARM_ARCH_MAJOR=7 ARM_CORTEX_A7=yes \
331 CROSS_COMPILE=arm-none-eabi- PLAT=warp7 ${TBB_OPTIONS} \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500332 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500333make AARCH32_SP=optee ARCH=aarch32 CROSS_COMPILE=arm-none-eabi- PLAT=picopi \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500334 $(common_flags) all
335make PLAT=imx8mm $(common_flags) all
336make PLAT=imx8mn $(common_flags) all
337make PLAT=imx8mp $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500338
339# Temporarily building in release mode until the following ticket is resolved:
340# https://developer.trustedfirmware.org/T626
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500341# make PLAT=imx8mq $(common_flags) all
342make PLAT=imx8mq $(common_flags release) all
Zelalemc9531f82020-08-04 15:37:08 -0500343
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500344make PLAT=imx8qm $(common_flags) all
345make PLAT=imx8qx $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500346
347# Platforms from Intel
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500348make PLAT=stratix10 $(common_flags) all
349make PLAT=agilex $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500350
351# Platforms from Broadcom
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500352clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t INCLUDE_EMMC_DRIVER_ERASE_CODE=1
353clean_build PLAT=stingray $(common_flags) BOARD_CFG=bcm958742t-ns3 INCLUDE_EMMC_DRIVER_ERASE_CODE=1
Zelalemc9531f82020-08-04 15:37:08 -0500354
355# Platforms from Marvell
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500356make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null all
Zelalemc9531f82020-08-04 15:37:08 -0500357# Source files from mv-ddr-marvell repository are necessary
358# to build below four platforms
Manish Pandey62dc3d92020-08-10 16:29:47 +0100359wget http://files.oss.arm.com/downloads/tf-a/mv-ddr-marvell/mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
360tar -xzf mv-ddr-marvell-fae3f6c98230ae51a78e248af5de96fac97a8fca.tar.gz 2> /dev/null
Zelalemc9531f82020-08-04 15:37:08 -0500361mv mv-ddr-marvell drivers/marvell/mv_ddr
362
363# These platforms from Marvell have dependency on GCC-6.2.1 toolchain
364make PLAT=a80x0 DEBUG=1 SCP_BL2=/dev/null \
365 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
366make PLAT=a80x0_mcbin DEBUG=1 SCP_BL2=/dev/null \
367 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
368make PLAT=a70x0 DEBUG=1 SCP_BL2=/dev/null \
369 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
370make PLAT=a70x0_amc DEBUG=1 SCP_BL2=/dev/null \
371 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
372make PLAT=a80x0_puzzle DEBUG=1 SCP_BL2=/dev/null \
373 CROSS_COMPILE=/arm/pdsw/tools/gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu- all
374
375# Removing the source files
376rm -rf drivers/marvell/mv_ddr 2> /dev/null
377
378# Platforms from Meson
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500379make PLAT=gxbb $(common_flags) all
380make PLAT=gxl $(common_flags) all
381make PLAT=g12a $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500382
383# Platforms from Renesas
384# Renesas R-Car D3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500385clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500386 BL33=Makefile LIFEC_DBSC_PROTECT_ENABLE=0 LSI=D3 \
387 MBEDTLS_DIR=$(pwd)/mbedtls PMIC_ROHM_BD9571=0 \
388 RCAR_AVS_SETTING_ENABLE=0 SPD=none RCAR_LOSSY_ENABLE=0 \
389 RCAR_SA0_SIZE=0 RCAR_SYSTEM_SUSPEND=0 TRUSTED_BOARD_BOOT=1
390
391# Renesas R-Car H3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500392clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500393 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3 \
394 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
395 RCAR_DRAM_SPLIT=1 RCAR_GEN3_ULCB=1 SPD=opteed \
396 TRUSTED_BOARD_BOOT=1
397
398# Renesas R-Car H3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500399clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500400 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=H3N \
401 SPD=opteed TRUSTED_BOARD_BOOT=1
402
403# Renesas R-Car M3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500404clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500405 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3 \
406 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
407 RCAR_DRAM_SPLIT=2 RCAR_GEN3_ULCB=1 SPD=opteed \
408 TRUSTED_BOARD_BOOT=1
409
410# Renesas R-Car M3N Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500411clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500412 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=M3N \
413 MACHINE=ulcb PMIC_LEVEL_MODE=0 RCAR_DRAM_LPDDR4_MEMCONF=0 \
414 RCAR_GEN3_ULCB=1 SPD=opteed TRUSTED_BOARD_BOOT=1
415
416# Renesas R-Car E3 Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500417clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500418 BL33=Makefile MBEDTLS_DIR=$(pwd)/mbedtls LSI=E3 \
419 RCAR_AVS_SETTING_ENABLE=0 RCAR_DRAM_DDR3L_MEMCONF=0 \
420 RCAR_SA0_SIZE=0 SPD=opteed TRUSTED_BOARD_BOOT=1
421
422# Renesas R-Car V3M Automotive SoC
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500423clean_build PLAT=rcar $(common_flags) BL32=Makefile \
Zelalemc9531f82020-08-04 15:37:08 -0500424 MBEDTLS_DIR=$(pwd)/mbedtls BL33=Makefile LSI=V3M MACHINE=eagle \
425 PMIC_ROHM_BD9571=0 RCAR_DRAM_SPLIT=0 RCAR_SYSTEM_SUSPEND=0 \
426 AVS_SETTING_ENABLE=0 SPD=none TRUSTED_BOARD_BOOT=1
427
428# Platforms from ST
429make PLAT=stm32mp1 CROSS_COMPILE=arm-none-eabi- \
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500430 $(common_flags) ARM_ARCH_MAJOR=7 STM32MP_EMMC=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500431 STM32MP_RAW_NAND=1 STM32MP_SDMMC=1 STM32MP_SPI_NAND=1 STM32MP_SPI_NOR=1 \
432 ARCH=aarch32 AARCH32_SP=sp_min ENABLE_STACK_PROTECTOR=strong bl1 bl2 bl32
433
434# Platforms from TI
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500435make PLAT=k3 $(common_flags) all
Zelalemc9531f82020-08-04 15:37:08 -0500436
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500437clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS}
Zelalemc9531f82020-08-04 15:37:08 -0500438# Use GICV3 driver
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500439clean_build PLAT=qemu $(common_flags) QEMU_USE_GIC_DRIVER=QEMU_GICV3 \
Zelalemc9531f82020-08-04 15:37:08 -0500440 ENABLE_STACK_PROTECTOR=strong
441# Use encrypted FIP feature.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500442clean_build PLAT=qemu $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500443 BL32_RAM_LOCATION=tdram DECRYPTION_SUPPORT=aes_gcm ENCRYPT_BL31=1 \
444 ENCRYPT_BL32=1 FW_ENC_STATUS=0 SPD=opteed
445
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500446clean_build PLAT=qemu_sbsa $(common_flags)
Fathi Boudra422bf772019-12-02 11:10:16 +0200447
448# For hikey enable PMF to include all files in the platform port
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500449make PLAT=hikey $(common_flags) ${TBB_OPTIONS} ENABLE_PMF=1 all
450make PLAT=hikey960 $(common_flags) ${TBB_OPTIONS} all
451make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200452
Zelalemc9531f82020-08-04 15:37:08 -0500453# Platforms from Socionext
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500454clean_build PLAT=uniphier $(common_flags) ${TBB_OPTIONS} SPD=tspd
455clean_build PLAT=uniphier $(common_flags) FIP_GZIP=1
Fathi Boudra422bf772019-12-02 11:10:16 +0200456
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500457clean_build PLAT=synquacer $(common_flags) SPM_MM=1 \
Zelalemc9531f82020-08-04 15:37:08 -0500458 EL3_EXCEPTION_HANDLING=1 PRELOADED_BL33_BASE=0x0
459
460# Support for SCP Message Interface protocol with platform specific drivers
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500461clean_build PLAT=synquacer $(common_flags) \
Zelalemc9531f82020-08-04 15:37:08 -0500462 PRELOADED_BL33_BASE=0x0 SQ_USE_SCMI_DRIVER=1
463
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500464make PLAT=poplar $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200465
Zelalemc9531f82020-08-04 15:37:08 -0500466# Raspberry Pi Platforms
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500467make PLAT=rpi3 $(common_flags) ${TBB_OPTIONS} \
Zelalemc9531f82020-08-04 15:37:08 -0500468 ENABLE_STACK_PROTECTOR=strong PRELOADED_BL33_BASE=0xDEADBEEF all
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500469make PLAT=rpi4 $(common_flags) all
Fathi Boudra422bf772019-12-02 11:10:16 +0200470
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500471# Cannot use $(common_flags) for LS1043 platform, as then
Fathi Boudra422bf772019-12-02 11:10:16 +0200472# the binaries do not fit in memory.
473clean_build PLAT=ls1043 SPD=opteed ENABLE_STACK_PROTECTOR=strong
474clean_build PLAT=ls1043 SPD=tspd
475
Zelalemc9531f82020-08-04 15:37:08 -0500476# A113D (AXG) platform.
Leonardo Sandoval97e2ef02020-08-06 13:29:08 -0500477clean_build PLAT=axg $(common_flags) SPD=opteed
478clean_build PLAT=axg $(common_flags) AML_USE_ATOS=1
Zelalemc9531f82020-08-04 15:37:08 -0500479
Fathi Boudra422bf772019-12-02 11:10:16 +0200480cd ..