Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 1 | # |
Yann Gautier | 197ac78 | 2024-01-03 14:28:23 +0100 | [diff] [blame] | 2 | # Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Yann Gautier | 66b4c5c | 2023-01-05 14:34:37 +0100 | [diff] [blame] | 7 | # Extra partitions used to find FIP, contains: |
| 8 | # metadata (2) and fsbl-m (2) and the FIP partitions (default is 2). |
| 9 | STM32_EXTRA_PARTS := 6 |
| 10 | |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 11 | include plat/st/common/common.mk |
| 12 | |
| 13 | CRASH_REPORTING := 1 |
| 14 | ENABLE_PIE := 1 |
| 15 | PROGRAMMABLE_RESET_ADDRESS := 1 |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 16 | BL2_IN_XIP_MEM := 1 |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 17 | |
| 18 | # Default Device tree |
| 19 | DTB_FILE_NAME ?= stm32mp257f-ev1.dtb |
| 20 | |
| 21 | STM32MP25 := 1 |
| 22 | |
| 23 | # STM32 image header version v2.2 |
| 24 | STM32_HEADER_VERSION_MAJOR := 2 |
| 25 | STM32_HEADER_VERSION_MINOR := 2 |
| 26 | |
Yann Gautier | 2e905c0 | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 27 | # Set load address for serial boot devices |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 28 | DWL_BUFFER_BASE ?= 0x87000000 |
Yann Gautier | 2e905c0 | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 29 | |
Nicolas Le Bayon | d07e946 | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 30 | # DDR types |
| 31 | STM32MP_DDR3_TYPE ?= 0 |
| 32 | STM32MP_DDR4_TYPE ?= 0 |
| 33 | STM32MP_LPDDR4_TYPE ?= 0 |
| 34 | ifeq (${STM32MP_DDR3_TYPE},1) |
| 35 | DDR_TYPE := ddr3 |
| 36 | endif |
| 37 | ifeq (${STM32MP_DDR4_TYPE},1) |
| 38 | DDR_TYPE := ddr4 |
| 39 | endif |
| 40 | ifeq (${STM32MP_LPDDR4_TYPE},1) |
| 41 | DDR_TYPE := lpddr4 |
| 42 | endif |
| 43 | |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 44 | # DDR features |
Nicolas Le Bayon | 79629b1 | 2021-07-01 14:44:22 +0200 | [diff] [blame^] | 45 | STM32MP_DDR_DUAL_AXI_PORT := 1 |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 46 | STM32MP_DDR_FIP_IO_STORAGE := 1 |
| 47 | |
Yann Gautier | e5839ed | 2023-06-14 18:44:41 +0200 | [diff] [blame] | 48 | # Device tree |
| 49 | BL2_DTSI := stm32mp25-bl2.dtsi |
| 50 | FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) |
| 51 | |
| 52 | # Macros and rules to build TF binary |
| 53 | STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) |
| 54 | STM32_LD_FILE := plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S |
| 55 | STM32_BINARY_MAPPING := plat/st/stm32mp2/${ARCH}/stm32mp2.S |
| 56 | |
Yann Gautier | 5af9369 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 57 | STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) |
| 58 | STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 59 | ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) |
| 60 | STM32MP_DDR_FW_PATH ?= drivers/st/ddr/phy/firmware/bin/stm32mp2 |
| 61 | STM32MP_DDR_FW_NAME := ${DDR_TYPE}_pmu_train.bin |
| 62 | STM32MP_DDR_FW := ${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME} |
| 63 | endif |
Yann Gautier | 5af9369 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 64 | FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) |
| 65 | # Add the FW_CONFIG to FIP and specify the same to certtool |
| 66 | $(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 67 | ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) |
| 68 | # Add the FW_DDR to FIP and specify the same to certtool |
| 69 | $(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw)) |
| 70 | endif |
Yann Gautier | 5af9369 | 2024-05-22 16:16:59 +0200 | [diff] [blame] | 71 | |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 72 | # Enable flags for C files |
| 73 | $(eval $(call assert_booleans,\ |
| 74 | $(sort \ |
Nicolas Le Bayon | 79629b1 | 2021-07-01 14:44:22 +0200 | [diff] [blame^] | 75 | STM32MP_DDR_DUAL_AXI_PORT \ |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 76 | STM32MP_DDR_FIP_IO_STORAGE \ |
Nicolas Le Bayon | d07e946 | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 77 | STM32MP_DDR3_TYPE \ |
| 78 | STM32MP_DDR4_TYPE \ |
| 79 | STM32MP_LPDDR4_TYPE \ |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 80 | STM32MP25 \ |
| 81 | ))) |
| 82 | |
| 83 | $(eval $(call assert_numerics,\ |
| 84 | $(sort \ |
| 85 | PLAT_PARTITION_MAX_ENTRIES \ |
| 86 | STM32_HEADER_VERSION_MAJOR \ |
| 87 | STM32_TF_A_COPIES \ |
| 88 | ))) |
| 89 | |
Yann Gautier | 2e905c0 | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 90 | $(eval $(call add_defines,\ |
| 91 | $(sort \ |
| 92 | DWL_BUFFER_BASE \ |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 93 | PLAT_DEF_FIP_UUID \ |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 94 | PLAT_PARTITION_MAX_ENTRIES \ |
| 95 | PLAT_TBBR_IMG_DEF \ |
| 96 | STM32_TF_A_COPIES \ |
Nicolas Le Bayon | 79629b1 | 2021-07-01 14:44:22 +0200 | [diff] [blame^] | 97 | STM32MP_DDR_DUAL_AXI_PORT \ |
Maxime Méré | ae84525 | 2024-09-13 17:57:58 +0200 | [diff] [blame] | 98 | STM32MP_DDR_FIP_IO_STORAGE \ |
Nicolas Le Bayon | d07e946 | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 99 | STM32MP_DDR3_TYPE \ |
| 100 | STM32MP_DDR4_TYPE \ |
| 101 | STM32MP_LPDDR4_TYPE \ |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 102 | STM32MP25 \ |
Yann Gautier | 2e905c0 | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 103 | ))) |
| 104 | |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 105 | # STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI |
| 106 | # Disable mbranch-protection to avoid adding useless code |
| 107 | TF_CFLAGS += -mbranch-protection=none |
| 108 | |
| 109 | # Include paths and source files |
| 110 | PLAT_INCLUDES += -Iplat/st/stm32mp2/include/ |
Nicolas Le Bayon | 79629b1 | 2021-07-01 14:44:22 +0200 | [diff] [blame^] | 111 | PLAT_INCLUDES += -Idrivers/st/ddr/phy/phyinit/include/ |
| 112 | PLAT_INCLUDES += -Idrivers/st/ddr/phy/firmware/include/ |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 113 | |
| 114 | PLAT_BL_COMMON_SOURCES += lib/cpus/${ARCH}/cortex_a35.S |
Yann Gautier | 87a940e | 2023-06-14 18:05:47 +0200 | [diff] [blame] | 115 | PLAT_BL_COMMON_SOURCES += drivers/st/uart/${ARCH}/stm32_console.S |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 116 | PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S |
| 117 | |
Pascal Paillet | 817f42f | 2022-12-16 14:59:34 +0100 | [diff] [blame] | 118 | PLAT_BL_COMMON_SOURCES += drivers/st/pmic/stm32mp_pmic2.c \ |
| 119 | drivers/st/pmic/stpmic2.c \ |
| 120 | |
| 121 | PLAT_BL_COMMON_SOURCES += drivers/st/i2c/stm32_i2c.c |
| 122 | |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 123 | PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/stm32mp2_private.c |
| 124 | |
Gabriel Fernandez | f829d7d | 2022-04-20 10:08:08 +0200 | [diff] [blame] | 125 | PLAT_BL_COMMON_SOURCES += drivers/st/bsec/bsec3.c \ |
Yann Gautier | 154e6e6 | 2024-05-21 12:05:43 +0200 | [diff] [blame] | 126 | drivers/st/reset/stm32mp2_reset.c \ |
| 127 | plat/st/stm32mp2/stm32mp2_syscfg.c |
Yann Gautier | 197ac78 | 2024-01-03 14:28:23 +0100 | [diff] [blame] | 128 | |
Gabriel Fernandez | 615f31f | 2022-04-20 10:08:49 +0200 | [diff] [blame] | 129 | PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ |
| 130 | drivers/st/clk/clk-stm32mp2.c |
| 131 | |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 132 | BL2_SOURCES += plat/st/stm32mp2/plat_bl2_mem_params_desc.c |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 133 | |
Pascal Paillet | e2d6e5e | 2023-01-18 11:47:10 +0100 | [diff] [blame] | 134 | BL2_SOURCES += plat/st/stm32mp2/bl2_plat_setup.c \ |
| 135 | plat/st/stm32mp2/plat_ddr.c |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 136 | |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 137 | ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) |
| 138 | BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c |
| 139 | endif |
| 140 | |
Yann Gautier | 2e905c0 | 2024-02-02 17:07:20 +0100 | [diff] [blame] | 141 | ifeq (${STM32MP_USB_PROGRAMMER},1) |
| 142 | BL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c |
| 143 | endif |
| 144 | |
Nicolas Le Bayon | 79629b1 | 2021-07-01 14:44:22 +0200 | [diff] [blame^] | 145 | BL2_SOURCES += drivers/st/ddr/stm32mp2_ddr.c \ |
| 146 | drivers/st/ddr/stm32mp2_ddr_helpers.c \ |
| 147 | drivers/st/ddr/stm32mp2_ram.c |
| 148 | |
| 149 | BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_c_initphyconfig.c \ |
| 150 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_calcmb.c \ |
| 151 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_i_loadpieimage.c \ |
| 152 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_initstruct.c \ |
| 153 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_isdbytedisabled.c \ |
| 154 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_loadpieprodcode.c \ |
| 155 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_mapdrvstren.c \ |
| 156 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_progcsrskiptrain.c \ |
| 157 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_reginterface.c \ |
| 158 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_restore_sequence.c \ |
| 159 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_sequence.c \ |
| 160 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_softsetmb.c \ |
| 161 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_custompretrain.c \ |
| 162 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_saveretregs.c |
| 163 | |
| 164 | BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_d_loadimem.c \ |
| 165 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_f_loaddmem.c \ |
| 166 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_g_execfw.c \ |
| 167 | drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_writeoutmem.c \ |
| 168 | drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_g_waitfwdone.c |
Yann Gautier | 5e0be8c | 2024-05-21 20:54:04 +0200 | [diff] [blame] | 169 | |
Yann Gautier | 03020b6 | 2023-06-13 18:45:03 +0200 | [diff] [blame] | 170 | # BL31 sources |
| 171 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
| 172 | |
| 173 | BL31_SOURCES += plat/st/stm32mp2/bl31_plat_setup.c \ |
| 174 | plat/st/stm32mp2/stm32mp2_pm.c \ |
| 175 | plat/st/stm32mp2/stm32mp2_topology.c |
| 176 | # Generic GIC v2 |
| 177 | include drivers/arm/gic/v2/gicv2.mk |
| 178 | |
| 179 | BL31_SOURCES += ${GICV2_SOURCES} \ |
| 180 | plat/common/plat_gicv2.c \ |
| 181 | plat/st/common/stm32mp_gic.c |
| 182 | |
| 183 | # Generic PSCI |
| 184 | BL31_SOURCES += plat/common/plat_psci_common.c |
| 185 | |
Yann Gautier | db77f8b | 2024-05-21 11:46:59 +0200 | [diff] [blame] | 186 | # Compilation rules |
Nicolas Le Bayon | d07e946 | 2021-07-05 15:23:54 +0200 | [diff] [blame] | 187 | .PHONY: check_ddr_type |
| 188 | .SUFFIXES: |
| 189 | |
| 190 | bl2: check_ddr_type |
| 191 | |
| 192 | check_ddr_type: |
| 193 | $(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \ |
| 194 | $(STM32MP_DDR4_TYPE) + \ |
| 195 | $(STM32MP_LPDDR4_TYPE))))) |
| 196 | @if [ ${DDR_TYPE} != 1 ]; then \ |
| 197 | echo "One and only one DDR type must be defined"; \ |
| 198 | false; \ |
| 199 | fi |
| 200 | |
Yann Gautier | 35527fb | 2023-06-14 10:40:59 +0200 | [diff] [blame] | 201 | include plat/st/common/common_rules.mk |