Sandrine Bailleux | 1b77c81 | 2020-08-07 11:30:15 +0200 | [diff] [blame] | 1 | #!/usr/bin/env bash |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 2 | # |
Jayanth Dodderi Chidanand | 00b3b41 | 2022-04-13 15:00:58 +0100 | [diff] [blame] | 3 | # Copyright (c) 2020-2022, Arm Limited. All rights reserved. |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | # |
| 7 | |
| 8 | fetch_tf_resource() { |
Alexei Fedorov | 9e4473d | 2020-11-04 10:13:07 +0000 | [diff] [blame] | 9 | # Fetch the pre-built SCP/MCP binaries if they haven't been built |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 10 | if [ ! -f "$archive/mcp_rom.bin" ]; then |
Jayanth Dodderi Chidanand | 00b3b41 | 2022-04-13 15:00:58 +0100 | [diff] [blame] | 11 | url="$scp_mcp_prebuilts/rdn1e1-mcp-bl1.bin" saveas="mcp_rom.bin" fetch_file |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 12 | archive_file "mcp_rom.bin" |
| 13 | fi |
| 14 | if [ ! -f "$archive/scp_ram.bin" ]; then |
Jayanth Dodderi Chidanand | 00b3b41 | 2022-04-13 15:00:58 +0100 | [diff] [blame] | 15 | url="$scp_mcp_prebuilts/rdn1e1-bl2.bin" saveas="scp_ram.bin" fetch_file |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 16 | archive_file "scp_ram.bin" |
| 17 | fi |
| 18 | if [ ! -f "$archive/scp_rom.bin" ]; then |
Jayanth Dodderi Chidanand | 00b3b41 | 2022-04-13 15:00:58 +0100 | [diff] [blame] | 19 | url="$scp_mcp_prebuilts/rdn1e1-bl1.bin" saveas="scp_rom.bin" fetch_file |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 20 | archive_file "scp_rom.bin" |
| 21 | fi |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 22 | } |
| 23 | |
Vijayenthiran Subramaniam | dfda93d | 2020-07-23 12:53:35 +0530 | [diff] [blame] | 24 | pre_tf_build() { |
| 25 | # |
| 26 | # Dual-Chip RD-N1-Edge FVP has reliability issues with stlr instruction |
| 27 | # while sending events across the chip through CCIX link. Apply 'send |
| 28 | # explicit event after store release instruction' patch to improve the |
| 29 | # reliability of cross chip events. |
| 30 | # |
| 31 | apply_tf_patch "css_rd_multichip_fvp/spinlock-send-explicit-event-after-store-release.patch" |
| 32 | } |
| 33 | |
Chris Kay | 4e8aaf1 | 2022-09-01 15:21:55 +0100 | [diff] [blame] | 34 | generate_lava_job() { |
| 35 | local model="css-rdn1edgex2" |
Leonardo Sandoval | 00ced1f | 2020-12-07 12:55:08 -0600 | [diff] [blame] | 36 | |
Chris Kay | 4e8aaf1 | 2022-09-01 15:21:55 +0100 | [diff] [blame] | 37 | uart="1" set_expect_variable "num_cpus" "16" |
| 38 | |
| 39 | # Hold scp terminal_uart_aon on css0 |
| 40 | uart="2" file="hold_uart.exp" track_expect |
| 41 | |
| 42 | # Hold scp terminal_uart_aon on css1 |
| 43 | uart="3" file="hold_uart.exp" track_expect |
| 44 | |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 45 | set_run_env "ports_script" "$ci_root/model/css-rdinfra-ports.awk" |
| 46 | set_run_env "num_uarts" "4" |
Chris Kay | 4e8aaf1 | 2022-09-01 15:21:55 +0100 | [diff] [blame] | 47 | |
| 48 | model="$model" gen_model_params |
Leonardo Sandoval | 00ced1f | 2020-12-07 12:55:08 -0600 | [diff] [blame] | 49 | model="$model" gen_fvp_yaml |
Vijayenthiran Subramaniam | 8c50c6f | 2020-07-21 19:05:09 +0530 | [diff] [blame] | 50 | } |