blob: c08f930ba1519fd3482f4a3f6da6cfa21bed579c [file] [log] [blame]
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +02001option(SEMIHOSTING "Test trace using printf" ON)
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +02002
3if (PLATFORM STREQUAL "FVP")
Christophe Favergeonec574202019-08-09 06:54:05 +01004SET(PLATFORMFOLDER ${ROOT}/CMSIS/DSP/Platforms/FVP)
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +02005SET(PLATFORMID "FVP")
6list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP)
7endif()
8
9if (PLATFORM STREQUAL "SDSIM")
Christophe Favergeonec574202019-08-09 06:54:05 +010010SET(PLATFORMFOLDER ${SDSIMROOT})
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +020011SET(PLATFORMID "SDSIM")
Christophe Favergeonec574202019-08-09 06:54:05 +010012list(APPEND CMAKE_MODULE_PATH ${SDSIMROOT})
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +020013endif()
14
15SET(CORE ARMCM7)
16
17include(platform)
18
19function(set_platform_core)
20 ###################
21 #
22 # Cortex cortex-m7
23 #
24 if (ARM_CPU STREQUAL "cortex-m7")
25 SET(CORE ARMCM7 PARENT_SCOPE)
26 endif()
27
28 ###################
29 #
30 # Cortex cortex-m4
31 #
32 if (ARM_CPU STREQUAL "cortex-m4")
33 SET(CORE ARMCM4 PARENT_SCOPE)
34 endif()
35
36 ###################
37 #
38 # Cortex cortex-m35p
39 #
40 if (ARM_CPU STREQUAL "cortex-m35")
41 SET(CORE ARMCM35P PARENT_SCOPE)
42
43 endif()
44
45 ###################
46 #
47 # Cortex cortex-m33
48 #
49 if (ARM_CPU STREQUAL "cortex-m33")
50 SET(CORE ARMCM33 PARENT_SCOPE)
51
52 endif()
53
54 ###################
55 #
56 # Cortex cortex-m23
57 #
58 if (ARM_CPU STREQUAL "cortex-m23")
59 SET(CORE ARMCM23 PARENT_SCOPE)
60
61 endif()
62
63 ###################
64 #
65 # Cortex cortex-m0+
66 #
67 if (ARM_CPU STREQUAL "cortex-m0p")
68 SET(CORE ARMCM0plus PARENT_SCOPE)
69
70 endif()
71
72 ###################
73 #
74 # Cortex cortex-m0
75 #
76 if (ARM_CPU STREQUAL "cortex-m0")
77 SET(CORE ARMCM0 PARENT_SCOPE)
78
79 endif()
80
81 ###################
82 #
83 # Cortex cortex-a5
84 #
85 if (ARM_CPU STREQUAL "cortex-a5")
86 SET(CORE ARMCA5 PARENT_SCOPE)
87
88 endif()
89
90 ###################
91 #
92 # Cortex cortex-a7
93 #
94 if (ARM_CPU STREQUAL "cortex-a7")
95 SET(CORE ARMCA7 PARENT_SCOPE)
96
97 endif()
98
99 ###################
100 #
101 # Cortex cortex-a9
102 #
103 if (ARM_CPU STREQUAL "cortex-a9")
104 SET(CORE ARMCA9 PARENT_SCOPE)
105
106 endif()
107
108 ###################
109 #
110 # Cortex cortex-a15
111 #
112 if (ARM_CPU STREQUAL "cortex-a15")
113 SET(CORE ARMCA15 PARENT_SCOPE)
114 endif()
115endfunction()
116
117function(core_includes PROJECTNAME)
Christophe Favergeonec574202019-08-09 06:54:05 +0100118 target_include_directories(${PROJECTNAME} PRIVATE ${PLATFORMFOLDER}/${CORE}/Include)
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +0200119endfunction()
120
121function (configplatformForLib PROJECTNAME ROOT)
122 if (SEMIHOSTING)
123 target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING)
124 endif()
125 if (CORTEXM)
126 compilerSpecificPlatformConfigLibForM(${PROJECTNAME} ${ROOT} )
127 else()
128 compilerSpecificPlatformConfigLibForA(${PROJECTNAME} ${ROOT} )
129 endif()
130
131endfunction()
132
133function (configplatformForApp PROJECTNAME ROOT CORE PLATFORMFOLDER)
134 if (SEMIHOSTING)
135 target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING)
136 endif()
137
138 configure_platform(${PROJECTNAME} ${ROOT} ${CORE} ${PLATFORMFOLDER})
139 SET(PLATFORMID ${PLATFORMID} PARENT_SCOPE)
140
141 if (CORTEXM)
142 compilerSpecificPlatformConfigAppForM(${PROJECTNAME} ${ROOT} )
143 else()
144 compilerSpecificPlatformConfigAppForA(${PROJECTNAME} ${ROOT} )
145 endif()
146
147endfunction()