blob: b1e589f799141abe9a368ca9fdaf94b82d869b7b [file] [log] [blame]
Christophe Favergeon3b2a0ee2019-06-12 13:29:14 +02001option(SEMIHOSTING "Test trace using printf" ON)
2option(PLATFORM "Platform" "FVP")
3
4
5if (PLATFORM STREQUAL "FVP")
6SET(PLATFORMFOLDER "FVP")
7SET(PLATFORMID "FVP")
8list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/FVP)
9endif()
10
11if (PLATFORM STREQUAL "SDSIM")
12SET(PLATFORMFOLDER "SDSIM")
13SET(PLATFORMID "SDSIM")
14list(APPEND CMAKE_MODULE_PATH ${ROOT}/CMSIS/DSP/Platforms/SDSIM)
15endif()
16
17SET(CORE ARMCM7)
18
19include(platform)
20
21function(set_platform_core)
22 ###################
23 #
24 # Cortex cortex-m7
25 #
26 if (ARM_CPU STREQUAL "cortex-m7")
27 SET(CORE ARMCM7 PARENT_SCOPE)
28 endif()
29
30 ###################
31 #
32 # Cortex cortex-m4
33 #
34 if (ARM_CPU STREQUAL "cortex-m4")
35 SET(CORE ARMCM4 PARENT_SCOPE)
36 endif()
37
38 ###################
39 #
40 # Cortex cortex-m35p
41 #
42 if (ARM_CPU STREQUAL "cortex-m35")
43 SET(CORE ARMCM35P PARENT_SCOPE)
44
45 endif()
46
47 ###################
48 #
49 # Cortex cortex-m33
50 #
51 if (ARM_CPU STREQUAL "cortex-m33")
52 SET(CORE ARMCM33 PARENT_SCOPE)
53
54 endif()
55
56 ###################
57 #
58 # Cortex cortex-m23
59 #
60 if (ARM_CPU STREQUAL "cortex-m23")
61 SET(CORE ARMCM23 PARENT_SCOPE)
62
63 endif()
64
65 ###################
66 #
67 # Cortex cortex-m0+
68 #
69 if (ARM_CPU STREQUAL "cortex-m0p")
70 SET(CORE ARMCM0plus PARENT_SCOPE)
71
72 endif()
73
74 ###################
75 #
76 # Cortex cortex-m0
77 #
78 if (ARM_CPU STREQUAL "cortex-m0")
79 SET(CORE ARMCM0 PARENT_SCOPE)
80
81 endif()
82
83 ###################
84 #
85 # Cortex cortex-a5
86 #
87 if (ARM_CPU STREQUAL "cortex-a5")
88 SET(CORE ARMCA5 PARENT_SCOPE)
89
90 endif()
91
92 ###################
93 #
94 # Cortex cortex-a7
95 #
96 if (ARM_CPU STREQUAL "cortex-a7")
97 SET(CORE ARMCA7 PARENT_SCOPE)
98
99 endif()
100
101 ###################
102 #
103 # Cortex cortex-a9
104 #
105 if (ARM_CPU STREQUAL "cortex-a9")
106 SET(CORE ARMCA9 PARENT_SCOPE)
107
108 endif()
109
110 ###################
111 #
112 # Cortex cortex-a15
113 #
114 if (ARM_CPU STREQUAL "cortex-a15")
115 SET(CORE ARMCA15 PARENT_SCOPE)
116 endif()
117endfunction()
118
119function(core_includes PROJECTNAME)
120 target_include_directories(${PROJECTNAME} PRIVATE ${ROOT}/CMSIS/DSP/Platforms/${PLATFORMFOLDER}/${CORE}/Include)
121endfunction()
122
123function (configplatformForLib PROJECTNAME ROOT)
124 if (SEMIHOSTING)
125 target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING)
126 endif()
127 if (CORTEXM)
128 compilerSpecificPlatformConfigLibForM(${PROJECTNAME} ${ROOT} )
129 else()
130 compilerSpecificPlatformConfigLibForA(${PROJECTNAME} ${ROOT} )
131 endif()
132
133endfunction()
134
135function (configplatformForApp PROJECTNAME ROOT CORE PLATFORMFOLDER)
136 if (SEMIHOSTING)
137 target_compile_definitions(${PROJECTNAME} PRIVATE SEMIHOSTING)
138 endif()
139
140 configure_platform(${PROJECTNAME} ${ROOT} ${CORE} ${PLATFORMFOLDER})
141 SET(PLATFORMID ${PLATFORMID} PARENT_SCOPE)
142
143 if (CORTEXM)
144 compilerSpecificPlatformConfigAppForM(${PROJECTNAME} ${ROOT} )
145 else()
146 compilerSpecificPlatformConfigAppForA(${PROJECTNAME} ${ROOT} )
147 endif()
148
149endfunction()