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Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001#ifndef _ASM_X86_DISABLED_FEATURES_H
2#define _ASM_X86_DISABLED_FEATURES_H
3
4/* These features, although they might be available in a CPU
5 * will not be used because the compile options to support
6 * them are not present.
7 *
8 * This code allows them to be checked and disabled at
9 * compile time without an explicit #ifdef. Use
10 * cpu_feature_enabled().
11 */
12
David Brazdil0f672f62019-12-10 10:32:29 +000013#ifdef CONFIG_X86_SMAP
14# define DISABLE_SMAP 0
15#else
16# define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31))
17#endif
18
Olivier Deprez157378f2022-04-04 15:47:50 +020019#ifdef CONFIG_X86_UMIP
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000020# define DISABLE_UMIP 0
21#else
22# define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
23#endif
24
25#ifdef CONFIG_X86_64
26# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
27# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
28# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
29# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
30# define DISABLE_PCID 0
31#else
32# define DISABLE_VME 0
33# define DISABLE_K6_MTRR 0
34# define DISABLE_CYRIX_ARR 0
35# define DISABLE_CENTAUR_MCR 0
36# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
37#endif /* CONFIG_X86_64 */
38
39#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
40# define DISABLE_PKU 0
41# define DISABLE_OSPKE 0
42#else
43# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
44# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
45#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
46
47#ifdef CONFIG_X86_5LEVEL
48# define DISABLE_LA57 0
49#else
50# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
51#endif
52
53#ifdef CONFIG_PAGE_TABLE_ISOLATION
54# define DISABLE_PTI 0
55#else
56# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
57#endif
58
Olivier Deprez92d4c212022-12-06 15:05:30 +010059#ifdef CONFIG_RETPOLINE
60# define DISABLE_RETPOLINE 0
61#else
62# define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \
63 (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
64#endif
65
66#ifdef CONFIG_RETHUNK
67# define DISABLE_RETHUNK 0
68#else
69# define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31))
70#endif
71
72#ifdef CONFIG_CPU_UNRET_ENTRY
73# define DISABLE_UNRET 0
74#else
75# define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31))
76#endif
77
Olivier Deprez157378f2022-04-04 15:47:50 +020078/* Force disable because it's broken beyond repair */
79#define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
80
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000081/*
82 * Make sure to add features to the correct mask
83 */
84#define DISABLED_MASK0 (DISABLE_VME)
85#define DISABLED_MASK1 0
86#define DISABLED_MASK2 0
87#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
88#define DISABLED_MASK4 (DISABLE_PCID)
89#define DISABLED_MASK5 0
90#define DISABLED_MASK6 0
91#define DISABLED_MASK7 (DISABLE_PTI)
92#define DISABLED_MASK8 0
Olivier Deprez157378f2022-04-04 15:47:50 +020093#define DISABLED_MASK9 (DISABLE_SMAP)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000094#define DISABLED_MASK10 0
Olivier Deprez92d4c212022-12-06 15:05:30 +010095#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000096#define DISABLED_MASK12 0
97#define DISABLED_MASK13 0
98#define DISABLED_MASK14 0
99#define DISABLED_MASK15 0
Olivier Deprez157378f2022-04-04 15:47:50 +0200100#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
101 DISABLE_ENQCMD)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000102#define DISABLED_MASK17 0
103#define DISABLED_MASK18 0
104#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)
105
106#endif /* _ASM_X86_DISABLED_FEATURES_H */