| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | #ifndef _ASM_X86_DISABLED_FEATURES_H |
| 2 | #define _ASM_X86_DISABLED_FEATURES_H |
| 3 | |
| 4 | /* These features, although they might be available in a CPU |
| 5 | * will not be used because the compile options to support |
| 6 | * them are not present. |
| 7 | * |
| 8 | * This code allows them to be checked and disabled at |
| 9 | * compile time without an explicit #ifdef. Use |
| 10 | * cpu_feature_enabled(). |
| 11 | */ |
| 12 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 13 | #ifdef CONFIG_X86_SMAP |
| 14 | # define DISABLE_SMAP 0 |
| 15 | #else |
| 16 | # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31)) |
| 17 | #endif |
| 18 | |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 19 | #ifdef CONFIG_X86_UMIP |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 20 | # define DISABLE_UMIP 0 |
| 21 | #else |
| 22 | # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) |
| 23 | #endif |
| 24 | |
| 25 | #ifdef CONFIG_X86_64 |
| 26 | # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) |
| 27 | # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) |
| 28 | # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) |
| 29 | # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) |
| 30 | # define DISABLE_PCID 0 |
| 31 | #else |
| 32 | # define DISABLE_VME 0 |
| 33 | # define DISABLE_K6_MTRR 0 |
| 34 | # define DISABLE_CYRIX_ARR 0 |
| 35 | # define DISABLE_CENTAUR_MCR 0 |
| 36 | # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) |
| 37 | #endif /* CONFIG_X86_64 */ |
| 38 | |
| 39 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS |
| 40 | # define DISABLE_PKU 0 |
| 41 | # define DISABLE_OSPKE 0 |
| 42 | #else |
| 43 | # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) |
| 44 | # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) |
| 45 | #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ |
| 46 | |
| 47 | #ifdef CONFIG_X86_5LEVEL |
| 48 | # define DISABLE_LA57 0 |
| 49 | #else |
| 50 | # define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) |
| 51 | #endif |
| 52 | |
| 53 | #ifdef CONFIG_PAGE_TABLE_ISOLATION |
| 54 | # define DISABLE_PTI 0 |
| 55 | #else |
| 56 | # define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31)) |
| 57 | #endif |
| 58 | |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 59 | /* Force disable because it's broken beyond repair */ |
| 60 | #define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31)) |
| 61 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 62 | /* |
| 63 | * Make sure to add features to the correct mask |
| 64 | */ |
| 65 | #define DISABLED_MASK0 (DISABLE_VME) |
| 66 | #define DISABLED_MASK1 0 |
| 67 | #define DISABLED_MASK2 0 |
| 68 | #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) |
| 69 | #define DISABLED_MASK4 (DISABLE_PCID) |
| 70 | #define DISABLED_MASK5 0 |
| 71 | #define DISABLED_MASK6 0 |
| 72 | #define DISABLED_MASK7 (DISABLE_PTI) |
| 73 | #define DISABLED_MASK8 0 |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 74 | #define DISABLED_MASK9 (DISABLE_SMAP) |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 75 | #define DISABLED_MASK10 0 |
| 76 | #define DISABLED_MASK11 0 |
| 77 | #define DISABLED_MASK12 0 |
| 78 | #define DISABLED_MASK13 0 |
| 79 | #define DISABLED_MASK14 0 |
| 80 | #define DISABLED_MASK15 0 |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 81 | #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \ |
| 82 | DISABLE_ENQCMD) |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 83 | #define DISABLED_MASK17 0 |
| 84 | #define DISABLED_MASK18 0 |
| 85 | #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19) |
| 86 | |
| 87 | #endif /* _ASM_X86_DISABLED_FEATURES_H */ |