David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * acpi-cpufreq.c - ACPI Processor P-States Driver |
| 4 | * |
| 5 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> |
| 6 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> |
| 7 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> |
| 8 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/smp.h> |
| 17 | #include <linux/sched.h> |
| 18 | #include <linux/cpufreq.h> |
| 19 | #include <linux/compiler.h> |
| 20 | #include <linux/dmi.h> |
| 21 | #include <linux/slab.h> |
| 22 | |
| 23 | #include <linux/acpi.h> |
| 24 | #include <linux/io.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/uaccess.h> |
| 27 | |
| 28 | #include <acpi/processor.h> |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 29 | #include <acpi/cppc_acpi.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 30 | |
| 31 | #include <asm/msr.h> |
| 32 | #include <asm/processor.h> |
| 33 | #include <asm/cpufeature.h> |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 34 | #include <asm/cpu_device_id.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 35 | |
| 36 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); |
| 37 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); |
| 38 | MODULE_LICENSE("GPL"); |
| 39 | |
| 40 | enum { |
| 41 | UNDEFINED_CAPABLE = 0, |
| 42 | SYSTEM_INTEL_MSR_CAPABLE, |
| 43 | SYSTEM_AMD_MSR_CAPABLE, |
| 44 | SYSTEM_IO_CAPABLE, |
| 45 | }; |
| 46 | |
| 47 | #define INTEL_MSR_RANGE (0xffff) |
| 48 | #define AMD_MSR_RANGE (0x7) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 49 | #define HYGON_MSR_RANGE (0x7) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 50 | |
| 51 | #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) |
| 52 | |
| 53 | struct acpi_cpufreq_data { |
| 54 | unsigned int resume; |
| 55 | unsigned int cpu_feature; |
| 56 | unsigned int acpi_perf_cpu; |
| 57 | cpumask_var_t freqdomain_cpus; |
| 58 | void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); |
| 59 | u32 (*cpu_freq_read)(struct acpi_pct_register *reg); |
| 60 | }; |
| 61 | |
| 62 | /* acpi_perf_data is a pointer to percpu data. */ |
| 63 | static struct acpi_processor_performance __percpu *acpi_perf_data; |
| 64 | |
| 65 | static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) |
| 66 | { |
| 67 | return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); |
| 68 | } |
| 69 | |
| 70 | static struct cpufreq_driver acpi_cpufreq_driver; |
| 71 | |
| 72 | static unsigned int acpi_pstate_strict; |
| 73 | |
| 74 | static bool boost_state(unsigned int cpu) |
| 75 | { |
| 76 | u32 lo, hi; |
| 77 | u64 msr; |
| 78 | |
| 79 | switch (boot_cpu_data.x86_vendor) { |
| 80 | case X86_VENDOR_INTEL: |
| 81 | rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); |
| 82 | msr = lo | ((u64)hi << 32); |
| 83 | return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 84 | case X86_VENDOR_HYGON: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 85 | case X86_VENDOR_AMD: |
| 86 | rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); |
| 87 | msr = lo | ((u64)hi << 32); |
| 88 | return !(msr & MSR_K7_HWCR_CPB_DIS); |
| 89 | } |
| 90 | return false; |
| 91 | } |
| 92 | |
| 93 | static int boost_set_msr(bool enable) |
| 94 | { |
| 95 | u32 msr_addr; |
| 96 | u64 msr_mask, val; |
| 97 | |
| 98 | switch (boot_cpu_data.x86_vendor) { |
| 99 | case X86_VENDOR_INTEL: |
| 100 | msr_addr = MSR_IA32_MISC_ENABLE; |
| 101 | msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; |
| 102 | break; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 103 | case X86_VENDOR_HYGON: |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 104 | case X86_VENDOR_AMD: |
| 105 | msr_addr = MSR_K7_HWCR; |
| 106 | msr_mask = MSR_K7_HWCR_CPB_DIS; |
| 107 | break; |
| 108 | default: |
| 109 | return -EINVAL; |
| 110 | } |
| 111 | |
| 112 | rdmsrl(msr_addr, val); |
| 113 | |
| 114 | if (enable) |
| 115 | val &= ~msr_mask; |
| 116 | else |
| 117 | val |= msr_mask; |
| 118 | |
| 119 | wrmsrl(msr_addr, val); |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static void boost_set_msr_each(void *p_en) |
| 124 | { |
| 125 | bool enable = (bool) p_en; |
| 126 | |
| 127 | boost_set_msr(enable); |
| 128 | } |
| 129 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 130 | static int set_boost(struct cpufreq_policy *policy, int val) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 131 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 132 | on_each_cpu_mask(policy->cpus, boost_set_msr_each, |
| 133 | (void *)(long)val, 1); |
| 134 | pr_debug("CPU %*pbl: Core Boosting %sabled.\n", |
| 135 | cpumask_pr_args(policy->cpus), val ? "en" : "dis"); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) |
| 141 | { |
| 142 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 143 | |
| 144 | if (unlikely(!data)) |
| 145 | return -ENODEV; |
| 146 | |
| 147 | return cpufreq_show_cpus(data->freqdomain_cpus, buf); |
| 148 | } |
| 149 | |
| 150 | cpufreq_freq_attr_ro(freqdomain_cpus); |
| 151 | |
| 152 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
| 153 | static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, |
| 154 | size_t count) |
| 155 | { |
| 156 | int ret; |
| 157 | unsigned int val = 0; |
| 158 | |
| 159 | if (!acpi_cpufreq_driver.set_boost) |
| 160 | return -EINVAL; |
| 161 | |
| 162 | ret = kstrtouint(buf, 10, &val); |
| 163 | if (ret || val > 1) |
| 164 | return -EINVAL; |
| 165 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 166 | get_online_cpus(); |
| 167 | set_boost(policy, val); |
| 168 | put_online_cpus(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 169 | |
| 170 | return count; |
| 171 | } |
| 172 | |
| 173 | static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) |
| 174 | { |
| 175 | return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); |
| 176 | } |
| 177 | |
| 178 | cpufreq_freq_attr_rw(cpb); |
| 179 | #endif |
| 180 | |
| 181 | static int check_est_cpu(unsigned int cpuid) |
| 182 | { |
| 183 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
| 184 | |
| 185 | return cpu_has(cpu, X86_FEATURE_EST); |
| 186 | } |
| 187 | |
| 188 | static int check_amd_hwpstate_cpu(unsigned int cpuid) |
| 189 | { |
| 190 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
| 191 | |
| 192 | return cpu_has(cpu, X86_FEATURE_HW_PSTATE); |
| 193 | } |
| 194 | |
| 195 | static unsigned extract_io(struct cpufreq_policy *policy, u32 value) |
| 196 | { |
| 197 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 198 | struct acpi_processor_performance *perf; |
| 199 | int i; |
| 200 | |
| 201 | perf = to_perf_data(data); |
| 202 | |
| 203 | for (i = 0; i < perf->state_count; i++) { |
| 204 | if (value == perf->states[i].status) |
| 205 | return policy->freq_table[i].frequency; |
| 206 | } |
| 207 | return 0; |
| 208 | } |
| 209 | |
| 210 | static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) |
| 211 | { |
| 212 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 213 | struct cpufreq_frequency_table *pos; |
| 214 | struct acpi_processor_performance *perf; |
| 215 | |
| 216 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) |
| 217 | msr &= AMD_MSR_RANGE; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 218 | else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) |
| 219 | msr &= HYGON_MSR_RANGE; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 220 | else |
| 221 | msr &= INTEL_MSR_RANGE; |
| 222 | |
| 223 | perf = to_perf_data(data); |
| 224 | |
| 225 | cpufreq_for_each_entry(pos, policy->freq_table) |
| 226 | if (msr == perf->states[pos->driver_data].status) |
| 227 | return pos->frequency; |
| 228 | return policy->freq_table[0].frequency; |
| 229 | } |
| 230 | |
| 231 | static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) |
| 232 | { |
| 233 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 234 | |
| 235 | switch (data->cpu_feature) { |
| 236 | case SYSTEM_INTEL_MSR_CAPABLE: |
| 237 | case SYSTEM_AMD_MSR_CAPABLE: |
| 238 | return extract_msr(policy, val); |
| 239 | case SYSTEM_IO_CAPABLE: |
| 240 | return extract_io(policy, val); |
| 241 | default: |
| 242 | return 0; |
| 243 | } |
| 244 | } |
| 245 | |
| 246 | static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) |
| 247 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 248 | u32 val, dummy __always_unused; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 249 | |
| 250 | rdmsr(MSR_IA32_PERF_CTL, val, dummy); |
| 251 | return val; |
| 252 | } |
| 253 | |
| 254 | static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) |
| 255 | { |
| 256 | u32 lo, hi; |
| 257 | |
| 258 | rdmsr(MSR_IA32_PERF_CTL, lo, hi); |
| 259 | lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); |
| 260 | wrmsr(MSR_IA32_PERF_CTL, lo, hi); |
| 261 | } |
| 262 | |
| 263 | static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) |
| 264 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 265 | u32 val, dummy __always_unused; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 266 | |
| 267 | rdmsr(MSR_AMD_PERF_CTL, val, dummy); |
| 268 | return val; |
| 269 | } |
| 270 | |
| 271 | static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) |
| 272 | { |
| 273 | wrmsr(MSR_AMD_PERF_CTL, val, 0); |
| 274 | } |
| 275 | |
| 276 | static u32 cpu_freq_read_io(struct acpi_pct_register *reg) |
| 277 | { |
| 278 | u32 val; |
| 279 | |
| 280 | acpi_os_read_port(reg->address, &val, reg->bit_width); |
| 281 | return val; |
| 282 | } |
| 283 | |
| 284 | static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) |
| 285 | { |
| 286 | acpi_os_write_port(reg->address, val, reg->bit_width); |
| 287 | } |
| 288 | |
| 289 | struct drv_cmd { |
| 290 | struct acpi_pct_register *reg; |
| 291 | u32 val; |
| 292 | union { |
| 293 | void (*write)(struct acpi_pct_register *reg, u32 val); |
| 294 | u32 (*read)(struct acpi_pct_register *reg); |
| 295 | } func; |
| 296 | }; |
| 297 | |
| 298 | /* Called via smp_call_function_single(), on the target CPU */ |
| 299 | static void do_drv_read(void *_cmd) |
| 300 | { |
| 301 | struct drv_cmd *cmd = _cmd; |
| 302 | |
| 303 | cmd->val = cmd->func.read(cmd->reg); |
| 304 | } |
| 305 | |
| 306 | static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) |
| 307 | { |
| 308 | struct acpi_processor_performance *perf = to_perf_data(data); |
| 309 | struct drv_cmd cmd = { |
| 310 | .reg = &perf->control_register, |
| 311 | .func.read = data->cpu_freq_read, |
| 312 | }; |
| 313 | int err; |
| 314 | |
| 315 | err = smp_call_function_any(mask, do_drv_read, &cmd, 1); |
| 316 | WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ |
| 317 | return cmd.val; |
| 318 | } |
| 319 | |
| 320 | /* Called via smp_call_function_many(), on the target CPUs */ |
| 321 | static void do_drv_write(void *_cmd) |
| 322 | { |
| 323 | struct drv_cmd *cmd = _cmd; |
| 324 | |
| 325 | cmd->func.write(cmd->reg, cmd->val); |
| 326 | } |
| 327 | |
| 328 | static void drv_write(struct acpi_cpufreq_data *data, |
| 329 | const struct cpumask *mask, u32 val) |
| 330 | { |
| 331 | struct acpi_processor_performance *perf = to_perf_data(data); |
| 332 | struct drv_cmd cmd = { |
| 333 | .reg = &perf->control_register, |
| 334 | .val = val, |
| 335 | .func.write = data->cpu_freq_write, |
| 336 | }; |
| 337 | int this_cpu; |
| 338 | |
| 339 | this_cpu = get_cpu(); |
| 340 | if (cpumask_test_cpu(this_cpu, mask)) |
| 341 | do_drv_write(&cmd); |
| 342 | |
| 343 | smp_call_function_many(mask, do_drv_write, &cmd, 1); |
| 344 | put_cpu(); |
| 345 | } |
| 346 | |
| 347 | static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) |
| 348 | { |
| 349 | u32 val; |
| 350 | |
| 351 | if (unlikely(cpumask_empty(mask))) |
| 352 | return 0; |
| 353 | |
| 354 | val = drv_read(data, mask); |
| 355 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 356 | pr_debug("%s = %u\n", __func__, val); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 357 | |
| 358 | return val; |
| 359 | } |
| 360 | |
| 361 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
| 362 | { |
| 363 | struct acpi_cpufreq_data *data; |
| 364 | struct cpufreq_policy *policy; |
| 365 | unsigned int freq; |
| 366 | unsigned int cached_freq; |
| 367 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 368 | pr_debug("%s (%d)\n", __func__, cpu); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 369 | |
| 370 | policy = cpufreq_cpu_get_raw(cpu); |
| 371 | if (unlikely(!policy)) |
| 372 | return 0; |
| 373 | |
| 374 | data = policy->driver_data; |
| 375 | if (unlikely(!data || !policy->freq_table)) |
| 376 | return 0; |
| 377 | |
| 378 | cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; |
| 379 | freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); |
| 380 | if (freq != cached_freq) { |
| 381 | /* |
| 382 | * The dreaded BIOS frequency change behind our back. |
| 383 | * Force set the frequency on next target call. |
| 384 | */ |
| 385 | data->resume = 1; |
| 386 | } |
| 387 | |
| 388 | pr_debug("cur freq = %u\n", freq); |
| 389 | |
| 390 | return freq; |
| 391 | } |
| 392 | |
| 393 | static unsigned int check_freqs(struct cpufreq_policy *policy, |
| 394 | const struct cpumask *mask, unsigned int freq) |
| 395 | { |
| 396 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 397 | unsigned int cur_freq; |
| 398 | unsigned int i; |
| 399 | |
| 400 | for (i = 0; i < 100; i++) { |
| 401 | cur_freq = extract_freq(policy, get_cur_val(mask, data)); |
| 402 | if (cur_freq == freq) |
| 403 | return 1; |
| 404 | udelay(10); |
| 405 | } |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, |
| 410 | unsigned int index) |
| 411 | { |
| 412 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 413 | struct acpi_processor_performance *perf; |
| 414 | const struct cpumask *mask; |
| 415 | unsigned int next_perf_state = 0; /* Index into perf table */ |
| 416 | int result = 0; |
| 417 | |
| 418 | if (unlikely(!data)) { |
| 419 | return -ENODEV; |
| 420 | } |
| 421 | |
| 422 | perf = to_perf_data(data); |
| 423 | next_perf_state = policy->freq_table[index].driver_data; |
| 424 | if (perf->state == next_perf_state) { |
| 425 | if (unlikely(data->resume)) { |
| 426 | pr_debug("Called after resume, resetting to P%d\n", |
| 427 | next_perf_state); |
| 428 | data->resume = 0; |
| 429 | } else { |
| 430 | pr_debug("Already at target state (P%d)\n", |
| 431 | next_perf_state); |
| 432 | return 0; |
| 433 | } |
| 434 | } |
| 435 | |
| 436 | /* |
| 437 | * The core won't allow CPUs to go away until the governor has been |
| 438 | * stopped, so we can rely on the stability of policy->cpus. |
| 439 | */ |
| 440 | mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? |
| 441 | cpumask_of(policy->cpu) : policy->cpus; |
| 442 | |
| 443 | drv_write(data, mask, perf->states[next_perf_state].control); |
| 444 | |
| 445 | if (acpi_pstate_strict) { |
| 446 | if (!check_freqs(policy, mask, |
| 447 | policy->freq_table[index].frequency)) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 448 | pr_debug("%s (%d)\n", __func__, policy->cpu); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 449 | result = -EAGAIN; |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | if (!result) |
| 454 | perf->state = next_perf_state; |
| 455 | |
| 456 | return result; |
| 457 | } |
| 458 | |
| 459 | static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, |
| 460 | unsigned int target_freq) |
| 461 | { |
| 462 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 463 | struct acpi_processor_performance *perf; |
| 464 | struct cpufreq_frequency_table *entry; |
| 465 | unsigned int next_perf_state, next_freq, index; |
| 466 | |
| 467 | /* |
| 468 | * Find the closest frequency above target_freq. |
| 469 | */ |
| 470 | if (policy->cached_target_freq == target_freq) |
| 471 | index = policy->cached_resolved_idx; |
| 472 | else |
| 473 | index = cpufreq_table_find_index_dl(policy, target_freq); |
| 474 | |
| 475 | entry = &policy->freq_table[index]; |
| 476 | next_freq = entry->frequency; |
| 477 | next_perf_state = entry->driver_data; |
| 478 | |
| 479 | perf = to_perf_data(data); |
| 480 | if (perf->state == next_perf_state) { |
| 481 | if (unlikely(data->resume)) |
| 482 | data->resume = 0; |
| 483 | else |
| 484 | return next_freq; |
| 485 | } |
| 486 | |
| 487 | data->cpu_freq_write(&perf->control_register, |
| 488 | perf->states[next_perf_state].control); |
| 489 | perf->state = next_perf_state; |
| 490 | return next_freq; |
| 491 | } |
| 492 | |
| 493 | static unsigned long |
| 494 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
| 495 | { |
| 496 | struct acpi_processor_performance *perf; |
| 497 | |
| 498 | perf = to_perf_data(data); |
| 499 | if (cpu_khz) { |
| 500 | /* search the closest match to cpu_khz */ |
| 501 | unsigned int i; |
| 502 | unsigned long freq; |
| 503 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
| 504 | |
| 505 | for (i = 0; i < (perf->state_count-1); i++) { |
| 506 | freq = freqn; |
| 507 | freqn = perf->states[i+1].core_frequency * 1000; |
| 508 | if ((2 * cpu_khz) > (freqn + freq)) { |
| 509 | perf->state = i; |
| 510 | return freq; |
| 511 | } |
| 512 | } |
| 513 | perf->state = perf->state_count-1; |
| 514 | return freqn; |
| 515 | } else { |
| 516 | /* assume CPU is at P0... */ |
| 517 | perf->state = 0; |
| 518 | return perf->states[0].core_frequency * 1000; |
| 519 | } |
| 520 | } |
| 521 | |
| 522 | static void free_acpi_perf_data(void) |
| 523 | { |
| 524 | unsigned int i; |
| 525 | |
| 526 | /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ |
| 527 | for_each_possible_cpu(i) |
| 528 | free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) |
| 529 | ->shared_cpu_map); |
| 530 | free_percpu(acpi_perf_data); |
| 531 | } |
| 532 | |
| 533 | static int cpufreq_boost_online(unsigned int cpu) |
| 534 | { |
| 535 | /* |
| 536 | * On the CPU_UP path we simply keep the boost-disable flag |
| 537 | * in sync with the current global state. |
| 538 | */ |
| 539 | return boost_set_msr(acpi_cpufreq_driver.boost_enabled); |
| 540 | } |
| 541 | |
| 542 | static int cpufreq_boost_down_prep(unsigned int cpu) |
| 543 | { |
| 544 | /* |
| 545 | * Clear the boost-disable bit on the CPU_DOWN path so that |
| 546 | * this cpu cannot block the remaining ones from boosting. |
| 547 | */ |
| 548 | return boost_set_msr(1); |
| 549 | } |
| 550 | |
| 551 | /* |
| 552 | * acpi_cpufreq_early_init - initialize ACPI P-States library |
| 553 | * |
| 554 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) |
| 555 | * in order to determine correct frequency and voltage pairings. We can |
| 556 | * do _PDC and _PSD and find out the processor dependency for the |
| 557 | * actual init that will happen later... |
| 558 | */ |
| 559 | static int __init acpi_cpufreq_early_init(void) |
| 560 | { |
| 561 | unsigned int i; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 562 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 563 | |
| 564 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
| 565 | if (!acpi_perf_data) { |
| 566 | pr_debug("Memory allocation error for acpi_perf_data.\n"); |
| 567 | return -ENOMEM; |
| 568 | } |
| 569 | for_each_possible_cpu(i) { |
| 570 | if (!zalloc_cpumask_var_node( |
| 571 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, |
| 572 | GFP_KERNEL, cpu_to_node(i))) { |
| 573 | |
| 574 | /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ |
| 575 | free_acpi_perf_data(); |
| 576 | return -ENOMEM; |
| 577 | } |
| 578 | } |
| 579 | |
| 580 | /* Do initialization in ACPI core */ |
| 581 | acpi_processor_preregister_performance(acpi_perf_data); |
| 582 | return 0; |
| 583 | } |
| 584 | |
| 585 | #ifdef CONFIG_SMP |
| 586 | /* |
| 587 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw |
| 588 | * or do it in BIOS firmware and won't inform about it to OS. If not |
| 589 | * detected, this has a side effect of making CPU run at a different speed |
| 590 | * than OS intended it to run at. Detect it and handle it cleanly. |
| 591 | */ |
| 592 | static int bios_with_sw_any_bug; |
| 593 | |
| 594 | static int sw_any_bug_found(const struct dmi_system_id *d) |
| 595 | { |
| 596 | bios_with_sw_any_bug = 1; |
| 597 | return 0; |
| 598 | } |
| 599 | |
| 600 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
| 601 | { |
| 602 | .callback = sw_any_bug_found, |
| 603 | .ident = "Supermicro Server X6DLP", |
| 604 | .matches = { |
| 605 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), |
| 606 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), |
| 607 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), |
| 608 | }, |
| 609 | }, |
| 610 | { } |
| 611 | }; |
| 612 | |
| 613 | static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) |
| 614 | { |
| 615 | /* Intel Xeon Processor 7100 Series Specification Update |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 616 | * https://www.intel.com/Assets/PDF/specupdate/314554.pdf |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 617 | * AL30: A Machine Check Exception (MCE) Occurring during an |
| 618 | * Enhanced Intel SpeedStep Technology Ratio Change May Cause |
| 619 | * Both Processor Cores to Lock Up. */ |
| 620 | if (c->x86_vendor == X86_VENDOR_INTEL) { |
| 621 | if ((c->x86 == 15) && |
| 622 | (c->x86_model == 6) && |
| 623 | (c->x86_stepping == 8)) { |
| 624 | pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); |
| 625 | return -ENODEV; |
| 626 | } |
| 627 | } |
| 628 | return 0; |
| 629 | } |
| 630 | #endif |
| 631 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 632 | #ifdef CONFIG_ACPI_CPPC_LIB |
| 633 | static u64 get_max_boost_ratio(unsigned int cpu) |
| 634 | { |
| 635 | struct cppc_perf_caps perf_caps; |
| 636 | u64 highest_perf, nominal_perf; |
| 637 | int ret; |
| 638 | |
| 639 | if (acpi_pstate_strict) |
| 640 | return 0; |
| 641 | |
| 642 | ret = cppc_get_perf_caps(cpu, &perf_caps); |
| 643 | if (ret) { |
| 644 | pr_debug("CPU%d: Unable to get performance capabilities (%d)\n", |
| 645 | cpu, ret); |
| 646 | return 0; |
| 647 | } |
| 648 | |
| 649 | highest_perf = perf_caps.highest_perf; |
| 650 | nominal_perf = perf_caps.nominal_perf; |
| 651 | |
| 652 | if (!highest_perf || !nominal_perf) { |
| 653 | pr_debug("CPU%d: highest or nominal performance missing\n", cpu); |
| 654 | return 0; |
| 655 | } |
| 656 | |
| 657 | if (highest_perf < nominal_perf) { |
| 658 | pr_debug("CPU%d: nominal performance above highest\n", cpu); |
| 659 | return 0; |
| 660 | } |
| 661 | |
| 662 | return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); |
| 663 | } |
| 664 | #else |
| 665 | static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; } |
| 666 | #endif |
| 667 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 668 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
| 669 | { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 670 | struct cpufreq_frequency_table *freq_table; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 671 | struct acpi_processor_performance *perf; |
| 672 | struct acpi_cpufreq_data *data; |
| 673 | unsigned int cpu = policy->cpu; |
| 674 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
| 675 | unsigned int valid_states = 0; |
| 676 | unsigned int result = 0; |
| 677 | u64 max_boost_ratio; |
| 678 | unsigned int i; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 679 | #ifdef CONFIG_SMP |
| 680 | static int blacklisted; |
| 681 | #endif |
| 682 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 683 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 684 | |
| 685 | #ifdef CONFIG_SMP |
| 686 | if (blacklisted) |
| 687 | return blacklisted; |
| 688 | blacklisted = acpi_cpufreq_blacklist(c); |
| 689 | if (blacklisted) |
| 690 | return blacklisted; |
| 691 | #endif |
| 692 | |
| 693 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
| 694 | if (!data) |
| 695 | return -ENOMEM; |
| 696 | |
| 697 | if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { |
| 698 | result = -ENOMEM; |
| 699 | goto err_free; |
| 700 | } |
| 701 | |
| 702 | perf = per_cpu_ptr(acpi_perf_data, cpu); |
| 703 | data->acpi_perf_cpu = cpu; |
| 704 | policy->driver_data = data; |
| 705 | |
| 706 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
| 707 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
| 708 | |
| 709 | result = acpi_processor_register_performance(perf, cpu); |
| 710 | if (result) |
| 711 | goto err_free_mask; |
| 712 | |
| 713 | policy->shared_type = perf->shared_type; |
| 714 | |
| 715 | /* |
| 716 | * Will let policy->cpus know about dependency only when software |
| 717 | * coordination is required. |
| 718 | */ |
| 719 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || |
| 720 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
| 721 | cpumask_copy(policy->cpus, perf->shared_cpu_map); |
| 722 | } |
| 723 | cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); |
| 724 | |
| 725 | #ifdef CONFIG_SMP |
| 726 | dmi_check_system(sw_any_bug_dmi_table); |
| 727 | if (bios_with_sw_any_bug && !policy_is_shared(policy)) { |
| 728 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
| 729 | cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); |
| 730 | } |
| 731 | |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 732 | if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 && |
| 733 | !acpi_pstate_strict) { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 734 | cpumask_clear(policy->cpus); |
| 735 | cpumask_set_cpu(cpu, policy->cpus); |
| 736 | cpumask_copy(data->freqdomain_cpus, |
| 737 | topology_sibling_cpumask(cpu)); |
| 738 | policy->shared_type = CPUFREQ_SHARED_TYPE_HW; |
| 739 | pr_info_once("overriding BIOS provided _PSD data\n"); |
| 740 | } |
| 741 | #endif |
| 742 | |
| 743 | /* capability check */ |
| 744 | if (perf->state_count <= 1) { |
| 745 | pr_debug("No P-States\n"); |
| 746 | result = -ENODEV; |
| 747 | goto err_unreg; |
| 748 | } |
| 749 | |
| 750 | if (perf->control_register.space_id != perf->status_register.space_id) { |
| 751 | result = -ENODEV; |
| 752 | goto err_unreg; |
| 753 | } |
| 754 | |
| 755 | switch (perf->control_register.space_id) { |
| 756 | case ACPI_ADR_SPACE_SYSTEM_IO: |
| 757 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && |
| 758 | boot_cpu_data.x86 == 0xf) { |
| 759 | pr_debug("AMD K8 systems must use native drivers.\n"); |
| 760 | result = -ENODEV; |
| 761 | goto err_unreg; |
| 762 | } |
| 763 | pr_debug("SYSTEM IO addr space\n"); |
| 764 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
| 765 | data->cpu_freq_read = cpu_freq_read_io; |
| 766 | data->cpu_freq_write = cpu_freq_write_io; |
| 767 | break; |
| 768 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
| 769 | pr_debug("HARDWARE addr space\n"); |
| 770 | if (check_est_cpu(cpu)) { |
| 771 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; |
| 772 | data->cpu_freq_read = cpu_freq_read_intel; |
| 773 | data->cpu_freq_write = cpu_freq_write_intel; |
| 774 | break; |
| 775 | } |
| 776 | if (check_amd_hwpstate_cpu(cpu)) { |
| 777 | data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; |
| 778 | data->cpu_freq_read = cpu_freq_read_amd; |
| 779 | data->cpu_freq_write = cpu_freq_write_amd; |
| 780 | break; |
| 781 | } |
| 782 | result = -ENODEV; |
| 783 | goto err_unreg; |
| 784 | default: |
| 785 | pr_debug("Unknown addr space %d\n", |
| 786 | (u32) (perf->control_register.space_id)); |
| 787 | result = -ENODEV; |
| 788 | goto err_unreg; |
| 789 | } |
| 790 | |
| 791 | freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table), |
| 792 | GFP_KERNEL); |
| 793 | if (!freq_table) { |
| 794 | result = -ENOMEM; |
| 795 | goto err_unreg; |
| 796 | } |
| 797 | |
| 798 | /* detect transition latency */ |
| 799 | policy->cpuinfo.transition_latency = 0; |
| 800 | for (i = 0; i < perf->state_count; i++) { |
| 801 | if ((perf->states[i].transition_latency * 1000) > |
| 802 | policy->cpuinfo.transition_latency) |
| 803 | policy->cpuinfo.transition_latency = |
| 804 | perf->states[i].transition_latency * 1000; |
| 805 | } |
| 806 | |
| 807 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ |
| 808 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && |
| 809 | policy->cpuinfo.transition_latency > 20 * 1000) { |
| 810 | policy->cpuinfo.transition_latency = 20 * 1000; |
| 811 | pr_info_once("P-state transition latency capped at 20 uS\n"); |
| 812 | } |
| 813 | |
| 814 | /* table init */ |
| 815 | for (i = 0; i < perf->state_count; i++) { |
| 816 | if (i > 0 && perf->states[i].core_frequency >= |
| 817 | freq_table[valid_states-1].frequency / 1000) |
| 818 | continue; |
| 819 | |
| 820 | freq_table[valid_states].driver_data = i; |
| 821 | freq_table[valid_states].frequency = |
| 822 | perf->states[i].core_frequency * 1000; |
| 823 | valid_states++; |
| 824 | } |
| 825 | freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 826 | |
| 827 | max_boost_ratio = get_max_boost_ratio(cpu); |
| 828 | if (max_boost_ratio) { |
| 829 | unsigned int freq = freq_table[0].frequency; |
| 830 | |
| 831 | /* |
| 832 | * Because the loop above sorts the freq_table entries in the |
| 833 | * descending order, freq is the maximum frequency in the table. |
| 834 | * Assume that it corresponds to the CPPC nominal frequency and |
| 835 | * use it to set cpuinfo.max_freq. |
| 836 | */ |
| 837 | policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT; |
| 838 | } else { |
| 839 | /* |
| 840 | * If the maximum "boost" frequency is unknown, ask the arch |
| 841 | * scale-invariance code to use the "nominal" performance for |
| 842 | * CPU utilization scaling so as to prevent the schedutil |
| 843 | * governor from selecting inadequate CPU frequencies. |
| 844 | */ |
| 845 | arch_set_max_freq_ratio(true); |
| 846 | } |
| 847 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 848 | policy->freq_table = freq_table; |
| 849 | perf->state = 0; |
| 850 | |
| 851 | switch (perf->control_register.space_id) { |
| 852 | case ACPI_ADR_SPACE_SYSTEM_IO: |
| 853 | /* |
| 854 | * The core will not set policy->cur, because |
| 855 | * cpufreq_driver->get is NULL, so we need to set it here. |
| 856 | * However, we have to guess it, because the current speed is |
| 857 | * unknown and not detectable via IO ports. |
| 858 | */ |
| 859 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); |
| 860 | break; |
| 861 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
| 862 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
| 863 | break; |
| 864 | default: |
| 865 | break; |
| 866 | } |
| 867 | |
| 868 | /* notify BIOS that we exist */ |
| 869 | acpi_processor_notify_smm(THIS_MODULE); |
| 870 | |
| 871 | pr_debug("CPU%u - ACPI performance management activated.\n", cpu); |
| 872 | for (i = 0; i < perf->state_count; i++) |
| 873 | pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", |
| 874 | (i == perf->state ? '*' : ' '), i, |
| 875 | (u32) perf->states[i].core_frequency, |
| 876 | (u32) perf->states[i].power, |
| 877 | (u32) perf->states[i].transition_latency); |
| 878 | |
| 879 | /* |
| 880 | * the first call to ->target() should result in us actually |
| 881 | * writing something to the appropriate registers. |
| 882 | */ |
| 883 | data->resume = 1; |
| 884 | |
| 885 | policy->fast_switch_possible = !acpi_pstate_strict && |
| 886 | !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); |
| 887 | |
| 888 | return result; |
| 889 | |
| 890 | err_unreg: |
| 891 | acpi_processor_unregister_performance(cpu); |
| 892 | err_free_mask: |
| 893 | free_cpumask_var(data->freqdomain_cpus); |
| 894 | err_free: |
| 895 | kfree(data); |
| 896 | policy->driver_data = NULL; |
| 897 | |
| 898 | return result; |
| 899 | } |
| 900 | |
| 901 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
| 902 | { |
| 903 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 904 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 905 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 906 | |
| 907 | policy->fast_switch_possible = false; |
| 908 | policy->driver_data = NULL; |
| 909 | acpi_processor_unregister_performance(data->acpi_perf_cpu); |
| 910 | free_cpumask_var(data->freqdomain_cpus); |
| 911 | kfree(policy->freq_table); |
| 912 | kfree(data); |
| 913 | |
| 914 | return 0; |
| 915 | } |
| 916 | |
| 917 | static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy) |
| 918 | { |
| 919 | struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data, |
| 920 | policy->cpu); |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 921 | unsigned int freq = policy->freq_table[0].frequency; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 922 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 923 | if (perf->states[0].core_frequency * 1000 != freq) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 924 | pr_warn(FW_WARN "P-state 0 is not max freq\n"); |
| 925 | } |
| 926 | |
| 927 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
| 928 | { |
| 929 | struct acpi_cpufreq_data *data = policy->driver_data; |
| 930 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 931 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 932 | |
| 933 | data->resume = 1; |
| 934 | |
| 935 | return 0; |
| 936 | } |
| 937 | |
| 938 | static struct freq_attr *acpi_cpufreq_attr[] = { |
| 939 | &cpufreq_freq_attr_scaling_available_freqs, |
| 940 | &freqdomain_cpus, |
| 941 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
| 942 | &cpb, |
| 943 | #endif |
| 944 | NULL, |
| 945 | }; |
| 946 | |
| 947 | static struct cpufreq_driver acpi_cpufreq_driver = { |
| 948 | .verify = cpufreq_generic_frequency_table_verify, |
| 949 | .target_index = acpi_cpufreq_target, |
| 950 | .fast_switch = acpi_cpufreq_fast_switch, |
| 951 | .bios_limit = acpi_processor_get_bios_limit, |
| 952 | .init = acpi_cpufreq_cpu_init, |
| 953 | .exit = acpi_cpufreq_cpu_exit, |
| 954 | .ready = acpi_cpufreq_cpu_ready, |
| 955 | .resume = acpi_cpufreq_resume, |
| 956 | .name = "acpi-cpufreq", |
| 957 | .attr = acpi_cpufreq_attr, |
| 958 | }; |
| 959 | |
| 960 | static enum cpuhp_state acpi_cpufreq_online; |
| 961 | |
| 962 | static void __init acpi_cpufreq_boost_init(void) |
| 963 | { |
| 964 | int ret; |
| 965 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 966 | if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) { |
| 967 | pr_debug("Boost capabilities not present in the processor\n"); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 968 | return; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 969 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 970 | |
| 971 | acpi_cpufreq_driver.set_boost = set_boost; |
| 972 | acpi_cpufreq_driver.boost_enabled = boost_state(0); |
| 973 | |
| 974 | /* |
| 975 | * This calls the online callback on all online cpu and forces all |
| 976 | * MSRs to the same value. |
| 977 | */ |
| 978 | ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online", |
| 979 | cpufreq_boost_online, cpufreq_boost_down_prep); |
| 980 | if (ret < 0) { |
| 981 | pr_err("acpi_cpufreq: failed to register hotplug callbacks\n"); |
| 982 | return; |
| 983 | } |
| 984 | acpi_cpufreq_online = ret; |
| 985 | } |
| 986 | |
| 987 | static void acpi_cpufreq_boost_exit(void) |
| 988 | { |
| 989 | if (acpi_cpufreq_online > 0) |
| 990 | cpuhp_remove_state_nocalls(acpi_cpufreq_online); |
| 991 | } |
| 992 | |
| 993 | static int __init acpi_cpufreq_init(void) |
| 994 | { |
| 995 | int ret; |
| 996 | |
| 997 | if (acpi_disabled) |
| 998 | return -ENODEV; |
| 999 | |
| 1000 | /* don't keep reloading if cpufreq_driver exists */ |
| 1001 | if (cpufreq_get_current_driver()) |
| 1002 | return -EEXIST; |
| 1003 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1004 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1005 | |
| 1006 | ret = acpi_cpufreq_early_init(); |
| 1007 | if (ret) |
| 1008 | return ret; |
| 1009 | |
| 1010 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
| 1011 | /* this is a sysfs file with a strange name and an even stranger |
| 1012 | * semantic - per CPU instantiation, but system global effect. |
| 1013 | * Lets enable it only on AMD CPUs for compatibility reasons and |
| 1014 | * only if configured. This is considered legacy code, which |
| 1015 | * will probably be removed at some point in the future. |
| 1016 | */ |
| 1017 | if (!check_amd_hwpstate_cpu(0)) { |
| 1018 | struct freq_attr **attr; |
| 1019 | |
| 1020 | pr_debug("CPB unsupported, do not expose it\n"); |
| 1021 | |
| 1022 | for (attr = acpi_cpufreq_attr; *attr; attr++) |
| 1023 | if (*attr == &cpb) { |
| 1024 | *attr = NULL; |
| 1025 | break; |
| 1026 | } |
| 1027 | } |
| 1028 | #endif |
| 1029 | acpi_cpufreq_boost_init(); |
| 1030 | |
| 1031 | ret = cpufreq_register_driver(&acpi_cpufreq_driver); |
| 1032 | if (ret) { |
| 1033 | free_acpi_perf_data(); |
| 1034 | acpi_cpufreq_boost_exit(); |
| 1035 | } |
| 1036 | return ret; |
| 1037 | } |
| 1038 | |
| 1039 | static void __exit acpi_cpufreq_exit(void) |
| 1040 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1041 | pr_debug("%s\n", __func__); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1042 | |
| 1043 | acpi_cpufreq_boost_exit(); |
| 1044 | |
| 1045 | cpufreq_unregister_driver(&acpi_cpufreq_driver); |
| 1046 | |
| 1047 | free_acpi_perf_data(); |
| 1048 | } |
| 1049 | |
| 1050 | module_param(acpi_pstate_strict, uint, 0644); |
| 1051 | MODULE_PARM_DESC(acpi_pstate_strict, |
| 1052 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
| 1053 | "performed during frequency changes."); |
| 1054 | |
| 1055 | late_initcall(acpi_cpufreq_init); |
| 1056 | module_exit(acpi_cpufreq_exit); |
| 1057 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1058 | static const struct x86_cpu_id __maybe_unused acpi_cpufreq_ids[] = { |
| 1059 | X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL), |
| 1060 | X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL), |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1061 | {} |
| 1062 | }; |
| 1063 | MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); |
| 1064 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1065 | static const struct acpi_device_id __maybe_unused processor_device_ids[] = { |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1066 | {ACPI_PROCESSOR_OBJECT_HID, }, |
| 1067 | {ACPI_PROCESSOR_DEVICE_HID, }, |
| 1068 | {}, |
| 1069 | }; |
| 1070 | MODULE_DEVICE_TABLE(acpi, processor_device_ids); |
| 1071 | |
| 1072 | MODULE_ALIAS("acpi"); |