blob: ebc0892e37c7a0fd7360c9052f876718d6b771e0 [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (C) 2015-2018 Y Soft Corporation, a.s.
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/interrupt-controller/irq.h>
Olivier Deprez157378f2022-04-04 15:47:50 +02007#include <dt-bindings/input/input.h>
8#include <dt-bindings/leds/common.h>
David Brazdil0f672f62019-12-10 10:32:29 +00009#include <dt-bindings/pwm/pwm.h>
10
11/ {
Olivier Deprez157378f2022-04-04 15:47:50 +020012 aliases: aliases {
13 ethernet1 = &eth1;
14 ethernet2 = &eth2;
15 };
16
David Brazdil0f672f62019-12-10 10:32:29 +000017 backlight: backlight {
18 compatible = "pwm-backlight";
19 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
20 brightness-levels = <0 32 64 128 255>;
21 default-brightness-level = <32>;
22 num-interpolated-steps = <8>;
23 power-supply = <&sw2_reg>;
24 status = "disabled";
25 };
26
27 lcd_display: display {
28 compatible = "fsl,imx-parallel-display";
29 #address-cells = <1>;
30 #size-cells = <0>;
31 interface-pix-fmt = "rgb24";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_ipu1>;
34 status = "disabled";
35
36 port@0 {
37 reg = <0>;
38
39 lcd_display_in: endpoint {
40 remote-endpoint = <&ipu1_di0_disp0>;
41 };
42 };
43
44 port@1 {
45 reg = <1>;
46
47 lcd_display_out: endpoint {
48 remote-endpoint = <&lcd_panel_in>;
49 };
50 };
51 };
52
53 panel: panel {
54 compatible = "dataimage,scf0700c48ggu18";
55 power-supply = <&sw2_reg>;
56 status = "disabled";
57
58 port {
59 lcd_panel_in: endpoint {
60 remote-endpoint = <&lcd_display_out>;
61 };
62 };
63 };
64
65 reg_pcie: regulator-pcie {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_pcie_reg>;
69 regulator-name = "MPCIE_3V3";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
73 enable-active-high;
74 status = "disabled";
75 };
76
77 reg_usb_h1_vbus: regulator-usb-h1-vbus {
78 compatible = "regulator-fixed";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_usbh1_vbus>;
81 regulator-name = "usb_h1_vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
85 enable-active-high;
86 status = "disabled";
87 };
88
89 reg_usb_otg_vbus: regulator-usb-otg-vbus {
90 compatible = "regulator-fixed";
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_usbotg_vbus>;
93 regulator-name = "usb_otg_vbus";
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
96 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
97 enable-active-high;
98 status = "okay";
99 };
100};
101
102&fec {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_enet>;
105 phy-mode = "rgmii-id";
106 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
107 phy-reset-duration = <20>;
108 phy-supply = <&sw2_reg>;
David Brazdil0f672f62019-12-10 10:32:29 +0000109 status = "okay";
110
Olivier Deprez0e641232021-09-23 10:07:05 +0200111 fixed-link {
112 speed = <1000>;
113 full-duplex;
114 };
115
David Brazdil0f672f62019-12-10 10:32:29 +0000116 mdio {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 phy_port2: phy@1 {
121 reg = <1>;
122 };
123
124 phy_port3: phy@2 {
125 reg = <2>;
126 };
127
128 switch@10 {
129 compatible = "qca,qca8334";
130 reg = <10>;
131
132 switch_ports: ports {
133 #address-cells = <1>;
134 #size-cells = <0>;
135
136 ethphy0: port@0 {
137 reg = <0>;
138 label = "cpu";
139 phy-mode = "rgmii-id";
140 ethernet = <&fec>;
141
142 fixed-link {
143 speed = <1000>;
144 full-duplex;
145 };
146 };
147
Olivier Deprez157378f2022-04-04 15:47:50 +0200148 eth2: port@2 {
David Brazdil0f672f62019-12-10 10:32:29 +0000149 reg = <2>;
150 label = "eth2";
151 phy-handle = <&phy_port2>;
152 };
153
Olivier Deprez157378f2022-04-04 15:47:50 +0200154 eth1: port@3 {
David Brazdil0f672f62019-12-10 10:32:29 +0000155 reg = <3>;
156 label = "eth1";
157 phy-handle = <&phy_port3>;
158 };
159 };
160 };
161 };
162};
163
164&hdmi {
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_hdmi_cec>;
167 ddc-i2c-bus = <&i2c2>;
168 status = "disabled";
169};
170
171&i2c2 {
172 clock-frequency = <100000>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c2>;
175 status = "okay";
176
177 pmic@8 {
178 compatible = "fsl,pfuze200";
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_pmic>;
181 reg = <0x8>;
182
183 regulators {
184 sw1a_reg: sw1ab {
185 regulator-min-microvolt = <300000>;
186 regulator-max-microvolt = <1875000>;
187 regulator-boot-on;
188 regulator-always-on;
189 regulator-ramp-delay = <6250>;
190 };
191
192 sw2_reg: sw2 {
193 regulator-min-microvolt = <800000>;
194 regulator-max-microvolt = <3300000>;
195 regulator-boot-on;
196 regulator-always-on;
197 };
198
199 sw3a_reg: sw3a {
200 regulator-min-microvolt = <400000>;
201 regulator-max-microvolt = <1975000>;
202 regulator-boot-on;
203 regulator-always-on;
204 };
205
206 sw3b_reg: sw3b {
207 regulator-min-microvolt = <400000>;
208 regulator-max-microvolt = <1975000>;
209 regulator-boot-on;
210 regulator-always-on;
211 };
212
213 swbst_reg: swbst {
214 regulator-min-microvolt = <5000000>;
215 regulator-max-microvolt = <5150000>;
216 };
217
218 vgen1_reg: vgen1 {
219 regulator-min-microvolt = <800000>;
220 regulator-max-microvolt = <1550000>;
221 };
222
223 vgen2_reg: vgen2 {
224 regulator-min-microvolt = <800000>;
225 regulator-max-microvolt = <1550000>;
226 };
227
228 vgen3_reg: vgen3 {
229 regulator-min-microvolt = <1800000>;
230 regulator-max-microvolt = <3300000>;
231 regulator-always-on;
232 };
233
234 vgen4_reg: vgen4 {
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <3300000>;
237 regulator-always-on;
238 };
239
240 vgen5_reg: vgen5 {
241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <3300000>;
243 regulator-always-on;
244 };
245
246 vgen6_reg: vgen6 {
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <3300000>;
249 regulator-always-on;
250 };
251
252 vref_reg: vrefddr {
253 regulator-boot-on;
254 regulator-always-on;
255 };
256
257 vsnvs_reg: vsnvs {
258 regulator-min-microvolt = <1000000>;
259 regulator-max-microvolt = <3000000>;
260 regulator-boot-on;
261 regulator-always-on;
262 };
263 };
264 };
265
266 leds: led-controller@30 {
267 compatible = "ti,lp5562";
268 reg = <0x30>;
269 clock-mode = /bits/ 8 <1>;
270 status = "disabled";
Olivier Deprez157378f2022-04-04 15:47:50 +0200271 #address-cells = <1>;
272 #size-cells = <0>;
David Brazdil0f672f62019-12-10 10:32:29 +0000273
Olivier Deprez157378f2022-04-04 15:47:50 +0200274 chan@0 {
David Brazdil0f672f62019-12-10 10:32:29 +0000275 chan-name = "R";
276 led-cur = /bits/ 8 <0x20>;
277 max-cur = /bits/ 8 <0x60>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200278 reg = <0>;
279 color = <LED_COLOR_ID_RED>;
David Brazdil0f672f62019-12-10 10:32:29 +0000280 };
281
Olivier Deprez157378f2022-04-04 15:47:50 +0200282 chan@1 {
David Brazdil0f672f62019-12-10 10:32:29 +0000283 chan-name = "G";
284 led-cur = /bits/ 8 <0x20>;
285 max-cur = /bits/ 8 <0x60>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200286 reg = <1>;
287 color = <LED_COLOR_ID_GREEN>;
David Brazdil0f672f62019-12-10 10:32:29 +0000288 };
289
Olivier Deprez157378f2022-04-04 15:47:50 +0200290 chan@2 {
David Brazdil0f672f62019-12-10 10:32:29 +0000291 chan-name = "B";
292 led-cur = /bits/ 8 <0x20>;
293 max-cur = /bits/ 8 <0x60>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200294 reg = <2>;
295 color = <LED_COLOR_ID_BLUE>;
David Brazdil0f672f62019-12-10 10:32:29 +0000296 };
297
Olivier Deprez157378f2022-04-04 15:47:50 +0200298 chan@3 {
David Brazdil0f672f62019-12-10 10:32:29 +0000299 chan-name = "W";
300 led-cur = /bits/ 8 <0x0>;
301 max-cur = /bits/ 8 <0x0>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200302 reg = <3>;
303 color = <LED_COLOR_ID_WHITE>;
David Brazdil0f672f62019-12-10 10:32:29 +0000304 };
305 };
306
307 eeprom@57 {
308 compatible = "atmel,24c128";
309 reg = <0x57>;
310 pagesize = <64>;
311 status = "okay";
312 };
313
314 touchscreen: touchscreen@5c {
315 compatible = "pixcir,pixcir_tangoc";
316 reg = <0x5c>;
317 pinctrl-0 = <&pinctrl_touch>;
318 interrupt-parent = <&gpio4>;
319 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
320 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
321 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
322 touchscreen-size-x = <800>;
323 touchscreen-size-y = <480>;
324 status = "disabled";
325 };
326};
327
328&i2c3 {
329 clock-frequency = <100000>;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_i2c3>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200332 status = "okay";
David Brazdil0f672f62019-12-10 10:32:29 +0000333
Olivier Deprez157378f2022-04-04 15:47:50 +0200334 oled_1309: oled@3c {
335 compatible = "solomon,ssd1309fb-i2c";
336 reg = <0x3c>;
337 solomon,height = <64>;
338 solomon,width = <128>;
339 solomon,page-offset = <0>;
340 solomon,segment-no-remap;
341 solomon,prechargep2 = <15>;
342 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
343 vbat-supply = <&sw2_reg>;
344 status = "disabled";
345 };
346
347 oled_1305: oled@3d {
David Brazdil0f672f62019-12-10 10:32:29 +0000348 compatible = "solomon,ssd1305fb-i2c";
349 reg = <0x3d>;
350 solomon,height = <64>;
351 solomon,width = <128>;
352 solomon,page-offset = <0>;
353 solomon,prechargep2 = <15>;
354 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
355 vbat-supply = <&sw2_reg>;
356 status = "disabled";
357 };
358
359 gpio_oled: gpio@41 {
360 compatible = "nxp,pca9536";
361 gpio-controller;
362 #gpio-cells = <2>;
363 reg = <0x41>;
364 vcc-supply = <&sw2_reg>;
365 status = "disabled";
366 };
Olivier Deprez157378f2022-04-04 15:47:50 +0200367
368 touchkeys: keys@5a {
369 compatible = "fsl,mpr121-touchkey";
370 reg = <0x5a>;
371 vdd-supply = <&sw2_reg>;
372 autorepeat;
373 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
374 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
375 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
376 poll-interval = <50>;
377 status = "disabled";
378 };
David Brazdil0f672f62019-12-10 10:32:29 +0000379};
380
381&iomuxc {
382 pinctrl_enet: enetgrp {
383 fsl,pins = <
384 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020
385 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020
386 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
387 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020
388 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020
389 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020
390 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020
391 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020
392 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020
393 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020
394 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020
395 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020
396 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020
397 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020
398 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010
399 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010
400 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098
401 >;
402 };
403
404 pinctrl_hdmi_cec: hdmicecgrp {
405 fsl,pins = <
406 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1b898
407 >;
408 };
409
410 pinctrl_i2c2: i2c2grp {
411 fsl,pins = <
412 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
413 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
414 >;
415 };
416
417 pinctrl_i2c3: i2c3grp {
418 fsl,pins = <
419 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899
420 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
421 >;
422 };
423
424 pinctrl_ipu1: ipu1grp {
425 fsl,pins = <
426 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
427 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
428 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
429 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
430 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
431 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
432 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
433 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
434 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
435 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
436 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
437 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
438 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
439 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
440 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
441 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
442 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
443 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
444 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
445 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
446 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
447 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
448 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
449 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
450 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
451 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
452 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
453 >;
454 };
455
456 pinctrl_pcie: pciegrp {
457 fsl,pins = <
458 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098
459 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b098
460 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b098
461 >;
462 };
463
464 pinctrl_pcie_reg: pciereggrp {
465 fsl,pins = <
466 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b098
467 >;
468 };
469
470 pinctrl_pmic: pmicgrp {
471 fsl,pins = <
472 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098
473 >;
474 };
475
476 pinctrl_pwm1: pwm1grp {
477 fsl,pins = <
478 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
479 >;
480 };
481
482 pinctrl_touch: touchgrp {
483 fsl,pins = <
484 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098
485 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098
486 >;
487 };
488
489 pinctrl_uart1: uart1grp {
490 fsl,pins = <
491 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8
492 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8
493 >;
494 };
495
Olivier Deprez157378f2022-04-04 15:47:50 +0200496 pinctrl_uart2: uart2grp {
497 fsl,pins = <
498 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098
499 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098
500 >;
501 };
502
David Brazdil0f672f62019-12-10 10:32:29 +0000503 pinctrl_usbh1: usbh1grp {
504 fsl,pins = <
505 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098
506 >;
507 };
508
509 pinctrl_usbh1_vbus: usbh1-vbus {
510 fsl,pins = <
511 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98
512 >;
513 };
514
515 pinctrl_usbotg: usbotggrp {
516 fsl,pins = <
517 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098
518 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098
519 >;
520 };
521
522 pinctrl_usbotg_vbus: usbotg-vbus {
523 fsl,pins = <
524 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98
525 >;
526 };
527
528 pinctrl_usdhc3: usdhc3grp {
529 fsl,pins = <
530 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b018
531 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018
532 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
533 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
534 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
535 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
536 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
537 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
538 >;
539 };
540
541 pinctrl_usdhc4: usdhc4grp {
542 fsl,pins = <
543 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069
544 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069
545 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069
546 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069
547 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069
548 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069
549 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069
550 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069
551 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069
552 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069
553 >;
554 };
555
556 pinctrl_wdog: wdoggrp {
557 fsl,pins = <
558 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
559 >;
560 };
561};
562
563&ipu1_di0_disp0 {
564 remote-endpoint = <&lcd_display_in>;
565};
566
567&pcie {
568 pinctrl-names = "default";
569 pinctrl-0 = <&pinctrl_pcie>;
570 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
571 vpcie-supply = <&reg_pcie>;
572 status = "disabled";
573};
574
575&pwm1 {
David Brazdil0f672f62019-12-10 10:32:29 +0000576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_pwm1>;
578 status = "disabled";
579};
580
581&uart1 {
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_uart1>;
584 status = "okay";
585};
586
Olivier Deprez157378f2022-04-04 15:47:50 +0200587&uart2 {
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_uart2>;
590 status = "okay";
591};
592
David Brazdil0f672f62019-12-10 10:32:29 +0000593&usbh1 {
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_usbh1>;
596 vbus-supply = <&reg_usb_h1_vbus>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200597 over-current-active-low;
David Brazdil0f672f62019-12-10 10:32:29 +0000598 status = "disabled";
599};
600
601&usbotg {
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_usbotg>;
604 vbus-supply = <&reg_usb_otg_vbus>;
Olivier Deprez157378f2022-04-04 15:47:50 +0200605 over-current-active-low;
David Brazdil0f672f62019-12-10 10:32:29 +0000606 srp-disable;
607 hnp-disable;
608 adp-disable;
609 status = "okay";
610};
611
612&usbphy1 {
613 fsl,tx-d-cal = <106>;
614 status = "okay";
615};
616
617&usbphy2 {
618 fsl,tx-d-cal = <109>;
619 status = "disabled";
620};
621
622&usdhc3 {
623 pinctrl-names = "default";
624 pinctrl-0 = <&pinctrl_usdhc3>;
625 bus-width = <4>;
626 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
627 wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
628 no-1-8-v;
629 keep-power-in-suspend;
630 wakeup-source;
631 vmmc-supply = <&sw2_reg>;
632 status = "disabled";
633};
634
635&usdhc4 {
636 pinctrl-names = "default";
637 pinctrl-0 = <&pinctrl_usdhc4>;
638 bus-width = <8>;
639 non-removable;
640 no-1-8-v;
641 keep-power-in-suspend;
642 vmmc-supply = <&sw2_reg>;
643 status = "okay";
644};
645
646&wdog1 {
647 status = "disabled";
648};
649
650&wdog2 {
651 pinctrl-names = "default";
652 pinctrl-0 = <&pinctrl_wdog>;
653 fsl,ext-reset-output;
654 status = "okay";
655};