Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #ifndef _LINUX_GPIO_REGMAP_H |
| 4 | #define _LINUX_GPIO_REGMAP_H |
| 5 | |
| 6 | struct device; |
| 7 | struct gpio_regmap; |
| 8 | struct irq_domain; |
| 9 | struct regmap; |
| 10 | |
| 11 | #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1)) |
| 12 | #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) |
| 13 | |
| 14 | /** |
| 15 | * struct gpio_regmap_config - Description of a generic regmap gpio_chip. |
| 16 | * @parent: The parent device |
| 17 | * @regmap: The regmap used to access the registers |
| 18 | * given, the name of the device is used |
| 19 | * @label: (Optional) Descriptive name for GPIO controller. |
| 20 | * If not given, the name of the device is used. |
| 21 | * @ngpio: Number of GPIOs |
| 22 | * @names: (Optional) Array of names for gpios |
| 23 | * @reg_dat_base: (Optional) (in) register base address |
| 24 | * @reg_set_base: (Optional) set register base address |
| 25 | * @reg_clr_base: (Optional) clear register base address |
| 26 | * @reg_dir_in_base: (Optional) in setting register base address |
| 27 | * @reg_dir_out_base: (Optional) out setting register base address |
| 28 | * @reg_stride: (Optional) May be set if the registers (of the |
| 29 | * same type, dat, set, etc) are not consecutive. |
| 30 | * @ngpio_per_reg: Number of GPIOs per register |
| 31 | * @irq_domain: (Optional) IRQ domain if the controller is |
| 32 | * interrupt-capable |
| 33 | * @reg_mask_xlate: (Optional) Translates base address and GPIO |
| 34 | * offset to a register/bitmask pair. If not |
| 35 | * given the default gpio_regmap_simple_xlate() |
| 36 | * is used. |
| 37 | * |
| 38 | * The ->reg_mask_xlate translates a given base address and GPIO offset to |
| 39 | * register and mask pair. The base address is one of the given register |
| 40 | * base addresses in this structure. |
| 41 | * |
| 42 | * Although all register base addresses are marked as optional, there are |
| 43 | * several rules: |
| 44 | * 1. if you only have @reg_dat_base set, then it is input-only |
| 45 | * 2. if you only have @reg_set_base set, then it is output-only |
| 46 | * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then |
| 47 | * you have to set both @reg_dat_base and @reg_set_base |
| 48 | * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have |
| 49 | * two different registers for setting and clearing the output. This is |
| 50 | * also valid for the output-only case. |
| 51 | * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really |
| 52 | * hardware which has redundant registers? |
| 53 | * |
| 54 | * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO |
| 55 | * which forces the address to the value 0. |
| 56 | */ |
| 57 | struct gpio_regmap_config { |
| 58 | struct device *parent; |
| 59 | struct regmap *regmap; |
| 60 | |
| 61 | const char *label; |
| 62 | int ngpio; |
| 63 | const char *const *names; |
| 64 | |
| 65 | unsigned int reg_dat_base; |
| 66 | unsigned int reg_set_base; |
| 67 | unsigned int reg_clr_base; |
| 68 | unsigned int reg_dir_in_base; |
| 69 | unsigned int reg_dir_out_base; |
| 70 | int reg_stride; |
| 71 | int ngpio_per_reg; |
| 72 | struct irq_domain *irq_domain; |
| 73 | |
| 74 | int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base, |
| 75 | unsigned int offset, unsigned int *reg, |
| 76 | unsigned int *mask); |
| 77 | }; |
| 78 | |
| 79 | struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config); |
| 80 | void gpio_regmap_unregister(struct gpio_regmap *gpio); |
| 81 | struct gpio_regmap *devm_gpio_regmap_register(struct device *dev, |
| 82 | const struct gpio_regmap_config *config); |
| 83 | void gpio_regmap_set_drvdata(struct gpio_regmap *gpio, void *data); |
| 84 | void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio); |
| 85 | |
| 86 | #endif /* _LINUX_GPIO_REGMAP_H */ |