blob: 3c65bf070c908dd672572075faa4a383ae3766de [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001// SPDX-License-Identifier: GPL-2.0
David Brazdil0f672f62019-12-10 10:32:29 +00002/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003
4#include <linux/kernel.h>
5#include <linux/interrupt.h>
6#include <linux/pm_runtime.h>
7#include "cc_driver.h"
8#include "cc_buffer_mgr.h"
9#include "cc_request_mgr.h"
10#include "cc_sram_mgr.h"
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011#include "cc_hash.h"
12#include "cc_pm.h"
David Brazdil0f672f62019-12-10 10:32:29 +000013#include "cc_fips.h"
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000014
15#define POWER_DOWN_ENABLE 0x01
16#define POWER_DOWN_DISABLE 0x00
17
Olivier Deprez157378f2022-04-04 15:47:50 +020018static int cc_pm_suspend(struct device *dev)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000019{
20 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000021
22 dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000023 fini_cc_regs(drvdata);
David Brazdil0f672f62019-12-10 10:32:29 +000024 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
Olivier Deprez157378f2022-04-04 15:47:50 +020025 clk_disable_unprepare(drvdata->clk);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000026 return 0;
27}
28
Olivier Deprez157378f2022-04-04 15:47:50 +020029static int cc_pm_resume(struct device *dev)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000030{
31 int rc;
32 struct cc_drvdata *drvdata = dev_get_drvdata(dev);
33
34 dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
David Brazdil0f672f62019-12-10 10:32:29 +000035 /* Enables the device source clk */
Olivier Deprez157378f2022-04-04 15:47:50 +020036 rc = clk_prepare_enable(drvdata->clk);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000037 if (rc) {
38 dev_err(dev, "failed getting clock back on. We're toast.\n");
39 return rc;
40 }
Olivier Deprez157378f2022-04-04 15:47:50 +020041 /* wait for Cryptocell reset completion */
David Brazdil0f672f62019-12-10 10:32:29 +000042 if (!cc_wait_for_reset_completion(drvdata)) {
43 dev_err(dev, "Cryptocell reset not completed");
44 return -EBUSY;
45 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000046
David Brazdil0f672f62019-12-10 10:32:29 +000047 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000048 rc = init_cc_regs(drvdata, false);
49 if (rc) {
50 dev_err(dev, "init_cc_regs (%x)\n", rc);
51 return rc;
52 }
David Brazdil0f672f62019-12-10 10:32:29 +000053 /* check if tee fips error occurred during power down */
54 cc_tee_handle_fips_error(drvdata);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000055
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000056 cc_init_hash_sram(drvdata);
57
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000058 return 0;
59}
60
Olivier Deprez157378f2022-04-04 15:47:50 +020061const struct dev_pm_ops ccree_pm = {
62 SET_RUNTIME_PM_OPS(cc_pm_suspend, cc_pm_resume, NULL)
63};
64
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000065int cc_pm_get(struct device *dev)
66{
Olivier Deprez157378f2022-04-04 15:47:50 +020067 int rc = pm_runtime_get_sync(dev);
68 if (rc < 0) {
69 pm_runtime_put_noidle(dev);
70 return rc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000071 }
Olivier Deprez0e641232021-09-23 10:07:05 +020072
Olivier Deprez157378f2022-04-04 15:47:50 +020073 return 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000074}
75
Olivier Deprez157378f2022-04-04 15:47:50 +020076void cc_pm_put_suspend(struct device *dev)
David Brazdil0f672f62019-12-10 10:32:29 +000077{
Olivier Deprez157378f2022-04-04 15:47:50 +020078 pm_runtime_mark_last_busy(dev);
79 pm_runtime_put_autosuspend(dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000080}