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Andrew Scull5e1ddfa2018-08-14 10:06:54 +01001//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements a target parser to recognise hardware features such as
11// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_SUPPORT_TARGETPARSER_H
16#define LLVM_SUPPORT_TARGETPARSER_H
17
18// FIXME: vector is used because that's what clang uses for subtarget feature
19// lists, but SmallVector would probably be better
20#include "llvm/ADT/Triple.h"
21#include <vector>
22
23namespace llvm {
24class StringRef;
25
26// Target specific information into their own namespaces. These should be
27// generated from TableGen because the information is already there, and there
28// is where new information about targets will be added.
29// FIXME: To TableGen this we need to make some table generated files available
30// even if the back-end is not compiled with LLVM, plus we need to create a new
31// back-end to TableGen to create these clean tables.
32namespace ARM {
33
34// FPU Version
35enum class FPUVersion {
36 NONE,
37 VFPV2,
38 VFPV3,
39 VFPV3_FP16,
40 VFPV4,
41 VFPV5
42};
43
44// An FPU name restricts the FPU in one of three ways:
45enum class FPURestriction {
46 None = 0, ///< No restriction
47 D16, ///< Only 16 D registers
48 SP_D16 ///< Only single-precision instructions, with 16 D registers
49};
50
51// An FPU name implies one of three levels of Neon support:
52enum class NeonSupportLevel {
53 None = 0, ///< No Neon
54 Neon, ///< Neon
55 Crypto ///< Neon with Crypto
56};
57
58// FPU names.
59enum FPUKind {
60#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
61#include "ARMTargetParser.def"
62 FK_LAST
63};
64
65// Arch names.
66enum class ArchKind {
67#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
68#include "ARMTargetParser.def"
69};
70
71// Arch extension modifiers for CPUs.
72enum ArchExtKind : unsigned {
73 AEK_INVALID = 0,
74 AEK_NONE = 1,
75 AEK_CRC = 1 << 1,
76 AEK_CRYPTO = 1 << 2,
77 AEK_FP = 1 << 3,
78 AEK_HWDIVTHUMB = 1 << 4,
79 AEK_HWDIVARM = 1 << 5,
80 AEK_MP = 1 << 6,
81 AEK_SIMD = 1 << 7,
82 AEK_SEC = 1 << 8,
83 AEK_VIRT = 1 << 9,
84 AEK_DSP = 1 << 10,
85 AEK_FP16 = 1 << 11,
86 AEK_RAS = 1 << 12,
87 AEK_SVE = 1 << 13,
88 AEK_DOTPROD = 1 << 14,
Andrew Scullcdfcccc2018-10-05 20:58:37 +010089 AEK_SHA2 = 1 << 15,
90 AEK_AES = 1 << 16,
Andrew Scull0372a572018-11-16 15:47:06 +000091 AEK_FP16FML = 1 << 17,
Andrew Scull5e1ddfa2018-08-14 10:06:54 +010092 // Unsupported extensions.
93 AEK_OS = 0x8000000,
94 AEK_IWMMXT = 0x10000000,
95 AEK_IWMMXT2 = 0x20000000,
96 AEK_MAVERICK = 0x40000000,
97 AEK_XSCALE = 0x80000000,
98};
99
100// ISA kinds.
101enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
102
103// Endianness
104// FIXME: BE8 vs. BE32?
105enum class EndianKind { INVALID = 0, LITTLE, BIG };
106
107// v6/v7/v8 Profile
108enum class ProfileKind { INVALID = 0, A, R, M };
109
110StringRef getCanonicalArchName(StringRef Arch);
111
112// Information by ID
113StringRef getFPUName(unsigned FPUKind);
114FPUVersion getFPUVersion(unsigned FPUKind);
115NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
116FPURestriction getFPURestriction(unsigned FPUKind);
117
118// FIXME: These should be moved to TargetTuple once it exists
119bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
120bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
121bool getExtensionFeatures(unsigned Extensions,
122 std::vector<StringRef> &Features);
123
124StringRef getArchName(ArchKind AK);
125unsigned getArchAttr(ArchKind AK);
126StringRef getCPUAttr(ArchKind AK);
127StringRef getSubArch(ArchKind AK);
128StringRef getArchExtName(unsigned ArchExtKind);
129StringRef getArchExtFeature(StringRef ArchExt);
130StringRef getHWDivName(unsigned HWDivKind);
131
132// Information by Name
133unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
134unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
135StringRef getDefaultCPU(StringRef Arch);
136
137// Parser
138unsigned parseHWDiv(StringRef HWDiv);
139unsigned parseFPU(StringRef FPU);
140ArchKind parseArch(StringRef Arch);
141unsigned parseArchExt(StringRef ArchExt);
142ArchKind parseCPUArch(StringRef CPU);
143void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
144ISAKind parseArchISA(StringRef Arch);
145EndianKind parseArchEndian(StringRef Arch);
146ProfileKind parseArchProfile(StringRef Arch);
147unsigned parseArchVersion(StringRef Arch);
148
149StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
150
151} // namespace ARM
152
153// FIXME:This should be made into class design,to avoid dupplication.
154namespace AArch64 {
155
156// Arch names.
157enum class ArchKind {
158#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
159#include "AArch64TargetParser.def"
160};
161
162// Arch extension modifiers for CPUs.
163enum ArchExtKind : unsigned {
164 AEK_INVALID = 0,
165 AEK_NONE = 1,
166 AEK_CRC = 1 << 1,
167 AEK_CRYPTO = 1 << 2,
168 AEK_FP = 1 << 3,
169 AEK_SIMD = 1 << 4,
170 AEK_FP16 = 1 << 5,
171 AEK_PROFILE = 1 << 6,
172 AEK_RAS = 1 << 7,
173 AEK_LSE = 1 << 8,
174 AEK_SVE = 1 << 9,
175 AEK_DOTPROD = 1 << 10,
176 AEK_RCPC = 1 << 11,
Andrew Scullcdfcccc2018-10-05 20:58:37 +0100177 AEK_RDM = 1 << 12,
178 AEK_SM4 = 1 << 13,
179 AEK_SHA3 = 1 << 14,
180 AEK_SHA2 = 1 << 15,
181 AEK_AES = 1 << 16,
Andrew Scull0372a572018-11-16 15:47:06 +0000182 AEK_FP16FML = 1 << 17,
183 AEK_RAND = 1 << 18,
184 AEK_MTE = 1 << 19,
Andrew Scull5e1ddfa2018-08-14 10:06:54 +0100185};
186
187StringRef getCanonicalArchName(StringRef Arch);
188
189// Information by ID
190StringRef getFPUName(unsigned FPUKind);
191ARM::FPUVersion getFPUVersion(unsigned FPUKind);
192ARM::NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
193ARM::FPURestriction getFPURestriction(unsigned FPUKind);
194
195// FIXME: These should be moved to TargetTuple once it exists
196bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
197bool getExtensionFeatures(unsigned Extensions,
198 std::vector<StringRef> &Features);
199bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features);
200
201StringRef getArchName(ArchKind AK);
202unsigned getArchAttr(ArchKind AK);
203StringRef getCPUAttr(ArchKind AK);
204StringRef getSubArch(ArchKind AK);
205StringRef getArchExtName(unsigned ArchExtKind);
206StringRef getArchExtFeature(StringRef ArchExt);
207unsigned checkArchVersion(StringRef Arch);
208
209// Information by Name
210unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
211unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
212StringRef getDefaultCPU(StringRef Arch);
Andrew Scullcdfcccc2018-10-05 20:58:37 +0100213AArch64::ArchKind getCPUArchKind(StringRef CPU);
Andrew Scull5e1ddfa2018-08-14 10:06:54 +0100214
215// Parser
216unsigned parseFPU(StringRef FPU);
217AArch64::ArchKind parseArch(StringRef Arch);
218ArchExtKind parseArchExt(StringRef ArchExt);
219ArchKind parseCPUArch(StringRef CPU);
220void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
221ARM::ISAKind parseArchISA(StringRef Arch);
222ARM::EndianKind parseArchEndian(StringRef Arch);
223ARM::ProfileKind parseArchProfile(StringRef Arch);
224unsigned parseArchVersion(StringRef Arch);
225
Andrew Scullcdfcccc2018-10-05 20:58:37 +0100226bool isX18ReservedByDefault(const Triple &TT);
227
Andrew Scull5e1ddfa2018-08-14 10:06:54 +0100228} // namespace AArch64
229
230namespace X86 {
231
232// This should be kept in sync with libcc/compiler-rt as its included by clang
233// as a proxy for what's in libgcc/compiler-rt.
234enum ProcessorVendors : unsigned {
235 VENDOR_DUMMY,
236#define X86_VENDOR(ENUM, STRING) \
237 ENUM,
238#include "llvm/Support/X86TargetParser.def"
239 VENDOR_OTHER
240};
241
242// This should be kept in sync with libcc/compiler-rt as its included by clang
243// as a proxy for what's in libgcc/compiler-rt.
244enum ProcessorTypes : unsigned {
245 CPU_TYPE_DUMMY,
246#define X86_CPU_TYPE(ARCHNAME, ENUM) \
247 ENUM,
248#include "llvm/Support/X86TargetParser.def"
249 CPU_TYPE_MAX
250};
251
252// This should be kept in sync with libcc/compiler-rt as its included by clang
253// as a proxy for what's in libgcc/compiler-rt.
254enum ProcessorSubtypes : unsigned {
255 CPU_SUBTYPE_DUMMY,
256#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
257 ENUM,
258#include "llvm/Support/X86TargetParser.def"
259 CPU_SUBTYPE_MAX
260};
261
262// This should be kept in sync with libcc/compiler-rt as it should be used
263// by clang as a proxy for what's in libgcc/compiler-rt.
264enum ProcessorFeatures {
265#define X86_FEATURE(VAL, ENUM) \
266 ENUM = VAL,
267#include "llvm/Support/X86TargetParser.def"
268
269};
270
271} // namespace X86
272
Andrew Scull0372a572018-11-16 15:47:06 +0000273namespace AMDGPU {
274
275/// GPU kinds supported by the AMDGPU target.
276enum GPUKind : uint32_t {
277 // Not specified processor.
278 GK_NONE = 0,
279
280 // R600-based processors.
281 GK_R600 = 1,
282 GK_R630 = 2,
283 GK_RS880 = 3,
284 GK_RV670 = 4,
285 GK_RV710 = 5,
286 GK_RV730 = 6,
287 GK_RV770 = 7,
288 GK_CEDAR = 8,
289 GK_CYPRESS = 9,
290 GK_JUNIPER = 10,
291 GK_REDWOOD = 11,
292 GK_SUMO = 12,
293 GK_BARTS = 13,
294 GK_CAICOS = 14,
295 GK_CAYMAN = 15,
296 GK_TURKS = 16,
297
298 GK_R600_FIRST = GK_R600,
299 GK_R600_LAST = GK_TURKS,
300
301 // AMDGCN-based processors.
302 GK_GFX600 = 32,
303 GK_GFX601 = 33,
304
305 GK_GFX700 = 40,
306 GK_GFX701 = 41,
307 GK_GFX702 = 42,
308 GK_GFX703 = 43,
309 GK_GFX704 = 44,
310
311 GK_GFX801 = 50,
312 GK_GFX802 = 51,
313 GK_GFX803 = 52,
314 GK_GFX810 = 53,
315
316 GK_GFX900 = 60,
317 GK_GFX902 = 61,
318 GK_GFX904 = 62,
319 GK_GFX906 = 63,
320
321 GK_AMDGCN_FIRST = GK_GFX600,
322 GK_AMDGCN_LAST = GK_GFX906,
323};
324
325/// Instruction set architecture version.
326struct IsaVersion {
327 unsigned Major;
328 unsigned Minor;
329 unsigned Stepping;
330};
331
332// This isn't comprehensive for now, just things that are needed from the
333// frontend driver.
334enum ArchFeatureKind : uint32_t {
335 FEATURE_NONE = 0,
336
337 // These features only exist for r600, and are implied true for amdgcn.
338 FEATURE_FMA = 1 << 1,
339 FEATURE_LDEXP = 1 << 2,
340 FEATURE_FP64 = 1 << 3,
341
342 // Common features.
343 FEATURE_FAST_FMA_F32 = 1 << 4,
344 FEATURE_FAST_DENORMAL_F32 = 1 << 5
345};
346
347StringRef getArchNameAMDGCN(GPUKind AK);
348StringRef getArchNameR600(GPUKind AK);
349StringRef getCanonicalArchName(StringRef Arch);
350GPUKind parseArchAMDGCN(StringRef CPU);
351GPUKind parseArchR600(StringRef CPU);
352unsigned getArchAttrAMDGCN(GPUKind AK);
353unsigned getArchAttrR600(GPUKind AK);
354
355void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
356void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
357
358IsaVersion getIsaVersion(StringRef GPU);
359
360} // namespace AMDGPU
361
Andrew Scull5e1ddfa2018-08-14 10:06:54 +0100362} // namespace llvm
363
364#endif