Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 1 | //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file exposes a function named BuildMI, which is useful for dramatically |
| 11 | // simplifying how MachineInstr's are created. It allows use of code like this: |
| 12 | // |
| 13 | // M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst) |
| 14 | // .addReg(argVal1) |
| 15 | // .addReg(argVal2); |
| 16 | // |
| 17 | //===----------------------------------------------------------------------===// |
| 18 | |
| 19 | #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H |
| 20 | #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H |
| 21 | |
| 22 | #include "llvm/ADT/ArrayRef.h" |
| 23 | #include "llvm/CodeGen/GlobalISel/Utils.h" |
| 24 | #include "llvm/CodeGen/MachineBasicBlock.h" |
| 25 | #include "llvm/CodeGen/MachineFunction.h" |
| 26 | #include "llvm/CodeGen/MachineInstr.h" |
| 27 | #include "llvm/CodeGen/MachineInstrBundle.h" |
| 28 | #include "llvm/CodeGen/MachineOperand.h" |
| 29 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 30 | #include "llvm/IR/InstrTypes.h" |
| 31 | #include "llvm/IR/Intrinsics.h" |
| 32 | #include "llvm/Support/ErrorHandling.h" |
| 33 | #include <cassert> |
| 34 | #include <cstdint> |
| 35 | #include <utility> |
| 36 | |
| 37 | namespace llvm { |
| 38 | |
| 39 | class MCInstrDesc; |
| 40 | class MDNode; |
| 41 | |
| 42 | namespace RegState { |
| 43 | |
| 44 | enum { |
| 45 | Define = 0x2, |
| 46 | Implicit = 0x4, |
| 47 | Kill = 0x8, |
| 48 | Dead = 0x10, |
| 49 | Undef = 0x20, |
| 50 | EarlyClobber = 0x40, |
| 51 | Debug = 0x80, |
| 52 | InternalRead = 0x100, |
| 53 | Renamable = 0x200, |
| 54 | DefineNoRead = Define | Undef, |
| 55 | ImplicitDefine = Implicit | Define, |
| 56 | ImplicitKill = Implicit | Kill |
| 57 | }; |
| 58 | |
| 59 | } // end namespace RegState |
| 60 | |
| 61 | class MachineInstrBuilder { |
| 62 | MachineFunction *MF = nullptr; |
| 63 | MachineInstr *MI = nullptr; |
| 64 | |
| 65 | public: |
| 66 | MachineInstrBuilder() = default; |
| 67 | |
| 68 | /// Create a MachineInstrBuilder for manipulating an existing instruction. |
| 69 | /// F must be the machine function that was used to allocate I. |
| 70 | MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} |
| 71 | MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I) |
| 72 | : MF(&F), MI(&*I) {} |
| 73 | |
| 74 | /// Allow automatic conversion to the machine instruction we are working on. |
| 75 | operator MachineInstr*() const { return MI; } |
| 76 | MachineInstr *operator->() const { return MI; } |
| 77 | operator MachineBasicBlock::iterator() const { return MI; } |
| 78 | |
| 79 | /// If conversion operators fail, use this method to get the MachineInstr |
| 80 | /// explicitly. |
| 81 | MachineInstr *getInstr() const { return MI; } |
| 82 | |
| 83 | /// Add a new virtual register operand. |
| 84 | const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0, |
| 85 | unsigned SubReg = 0) const { |
| 86 | assert((flags & 0x1) == 0 && |
| 87 | "Passing in 'true' to addReg is forbidden! Use enums instead."); |
| 88 | MI->addOperand(*MF, MachineOperand::CreateReg(RegNo, |
| 89 | flags & RegState::Define, |
| 90 | flags & RegState::Implicit, |
| 91 | flags & RegState::Kill, |
| 92 | flags & RegState::Dead, |
| 93 | flags & RegState::Undef, |
| 94 | flags & RegState::EarlyClobber, |
| 95 | SubReg, |
| 96 | flags & RegState::Debug, |
| 97 | flags & RegState::InternalRead, |
| 98 | flags & RegState::Renamable)); |
| 99 | return *this; |
| 100 | } |
| 101 | |
| 102 | /// Add a virtual register definition operand. |
| 103 | const MachineInstrBuilder &addDef(unsigned RegNo, unsigned Flags = 0, |
| 104 | unsigned SubReg = 0) const { |
| 105 | return addReg(RegNo, Flags | RegState::Define, SubReg); |
| 106 | } |
| 107 | |
| 108 | /// Add a virtual register use operand. It is an error for Flags to contain |
| 109 | /// `RegState::Define` when calling this function. |
| 110 | const MachineInstrBuilder &addUse(unsigned RegNo, unsigned Flags = 0, |
| 111 | unsigned SubReg = 0) const { |
| 112 | assert(!(Flags & RegState::Define) && |
| 113 | "Misleading addUse defines register, use addReg instead."); |
| 114 | return addReg(RegNo, Flags, SubReg); |
| 115 | } |
| 116 | |
| 117 | /// Add a new immediate operand. |
| 118 | const MachineInstrBuilder &addImm(int64_t Val) const { |
| 119 | MI->addOperand(*MF, MachineOperand::CreateImm(Val)); |
| 120 | return *this; |
| 121 | } |
| 122 | |
| 123 | const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { |
| 124 | MI->addOperand(*MF, MachineOperand::CreateCImm(Val)); |
| 125 | return *this; |
| 126 | } |
| 127 | |
| 128 | const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { |
| 129 | MI->addOperand(*MF, MachineOperand::CreateFPImm(Val)); |
| 130 | return *this; |
| 131 | } |
| 132 | |
| 133 | const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB, |
| 134 | unsigned char TargetFlags = 0) const { |
| 135 | MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags)); |
| 136 | return *this; |
| 137 | } |
| 138 | |
| 139 | const MachineInstrBuilder &addFrameIndex(int Idx) const { |
| 140 | MI->addOperand(*MF, MachineOperand::CreateFI(Idx)); |
| 141 | return *this; |
| 142 | } |
| 143 | |
| 144 | const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx, |
| 145 | int Offset = 0, |
| 146 | unsigned char TargetFlags = 0) const { |
| 147 | MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags)); |
| 148 | return *this; |
| 149 | } |
| 150 | |
| 151 | const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0, |
| 152 | unsigned char TargetFlags = 0) const { |
| 153 | MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset, |
| 154 | TargetFlags)); |
| 155 | return *this; |
| 156 | } |
| 157 | |
| 158 | const MachineInstrBuilder &addJumpTableIndex(unsigned Idx, |
| 159 | unsigned char TargetFlags = 0) const { |
| 160 | MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags)); |
| 161 | return *this; |
| 162 | } |
| 163 | |
| 164 | const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV, |
| 165 | int64_t Offset = 0, |
| 166 | unsigned char TargetFlags = 0) const { |
| 167 | MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags)); |
| 168 | return *this; |
| 169 | } |
| 170 | |
| 171 | const MachineInstrBuilder &addExternalSymbol(const char *FnName, |
| 172 | unsigned char TargetFlags = 0) const { |
| 173 | MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags)); |
| 174 | return *this; |
| 175 | } |
| 176 | |
| 177 | const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA, |
| 178 | int64_t Offset = 0, |
| 179 | unsigned char TargetFlags = 0) const { |
| 180 | MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags)); |
| 181 | return *this; |
| 182 | } |
| 183 | |
| 184 | const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { |
| 185 | MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask)); |
| 186 | return *this; |
| 187 | } |
| 188 | |
| 189 | const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const { |
| 190 | MI->addMemOperand(*MF, MMO); |
| 191 | return *this; |
| 192 | } |
| 193 | |
Andrew Scull | 0372a57 | 2018-11-16 15:47:06 +0000 | [diff] [blame^] | 194 | const MachineInstrBuilder & |
| 195 | setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const { |
| 196 | MI->setMemRefs(*MF, MMOs); |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 197 | return *this; |
| 198 | } |
| 199 | |
Andrew Scull | 0372a57 | 2018-11-16 15:47:06 +0000 | [diff] [blame^] | 200 | const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const { |
| 201 | MI->cloneMemRefs(*MF, OtherMI); |
| 202 | return *this; |
| 203 | } |
| 204 | |
| 205 | const MachineInstrBuilder & |
| 206 | cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const { |
| 207 | MI->cloneMergedMemRefs(*MF, OtherMIs); |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 208 | return *this; |
| 209 | } |
| 210 | |
| 211 | const MachineInstrBuilder &add(const MachineOperand &MO) const { |
| 212 | MI->addOperand(*MF, MO); |
| 213 | return *this; |
| 214 | } |
| 215 | |
| 216 | const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const { |
| 217 | for (const MachineOperand &MO : MOs) { |
| 218 | MI->addOperand(*MF, MO); |
| 219 | } |
| 220 | return *this; |
| 221 | } |
| 222 | |
| 223 | const MachineInstrBuilder &addMetadata(const MDNode *MD) const { |
| 224 | MI->addOperand(*MF, MachineOperand::CreateMetadata(MD)); |
| 225 | assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable()) |
| 226 | : true) && |
| 227 | "first MDNode argument of a DBG_VALUE not a variable"); |
Andrew Scull | cdfcccc | 2018-10-05 20:58:37 +0100 | [diff] [blame] | 228 | assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel()) |
| 229 | : true) && |
| 230 | "first MDNode argument of a DBG_LABEL not a label"); |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 231 | return *this; |
| 232 | } |
| 233 | |
| 234 | const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const { |
| 235 | MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex)); |
| 236 | return *this; |
| 237 | } |
| 238 | |
| 239 | const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const { |
| 240 | MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID)); |
| 241 | return *this; |
| 242 | } |
| 243 | |
| 244 | const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const { |
| 245 | MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred)); |
| 246 | return *this; |
| 247 | } |
| 248 | |
| 249 | const MachineInstrBuilder &addSym(MCSymbol *Sym, |
| 250 | unsigned char TargetFlags = 0) const { |
| 251 | MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags)); |
| 252 | return *this; |
| 253 | } |
| 254 | |
| 255 | const MachineInstrBuilder &setMIFlags(unsigned Flags) const { |
| 256 | MI->setFlags(Flags); |
| 257 | return *this; |
| 258 | } |
| 259 | |
| 260 | const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const { |
| 261 | MI->setFlag(Flag); |
| 262 | return *this; |
| 263 | } |
| 264 | |
| 265 | // Add a displacement from an existing MachineOperand with an added offset. |
| 266 | const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off, |
| 267 | unsigned char TargetFlags = 0) const { |
| 268 | // If caller specifies new TargetFlags then use it, otherwise the |
| 269 | // default behavior is to copy the target flags from the existing |
| 270 | // MachineOperand. This means if the caller wants to clear the |
| 271 | // target flags it needs to do so explicitly. |
| 272 | if (0 == TargetFlags) |
| 273 | TargetFlags = Disp.getTargetFlags(); |
| 274 | |
| 275 | switch (Disp.getType()) { |
| 276 | default: |
| 277 | llvm_unreachable("Unhandled operand type in addDisp()"); |
| 278 | case MachineOperand::MO_Immediate: |
| 279 | return addImm(Disp.getImm() + off); |
| 280 | case MachineOperand::MO_ConstantPoolIndex: |
| 281 | return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off, |
| 282 | TargetFlags); |
| 283 | case MachineOperand::MO_GlobalAddress: |
| 284 | return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off, |
| 285 | TargetFlags); |
| 286 | } |
| 287 | } |
| 288 | |
| 289 | /// Copy all the implicit operands from OtherMI onto this one. |
| 290 | const MachineInstrBuilder & |
| 291 | copyImplicitOps(const MachineInstr &OtherMI) const { |
| 292 | MI->copyImplicitOps(*MF, OtherMI); |
| 293 | return *this; |
| 294 | } |
| 295 | |
| 296 | bool constrainAllUses(const TargetInstrInfo &TII, |
| 297 | const TargetRegisterInfo &TRI, |
| 298 | const RegisterBankInfo &RBI) const { |
| 299 | return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); |
| 300 | } |
| 301 | }; |
| 302 | |
| 303 | /// Builder interface. Specify how to create the initial instruction itself. |
| 304 | inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, |
| 305 | const MCInstrDesc &MCID) { |
| 306 | return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); |
| 307 | } |
| 308 | |
| 309 | /// This version of the builder sets up the first operand as a |
| 310 | /// destination virtual register. |
| 311 | inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, |
| 312 | const MCInstrDesc &MCID, unsigned DestReg) { |
| 313 | return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) |
| 314 | .addReg(DestReg, RegState::Define); |
| 315 | } |
| 316 | |
| 317 | /// This version of the builder inserts the newly-built instruction before |
| 318 | /// the given position in the given MachineBasicBlock, and sets up the first |
| 319 | /// operand as a destination virtual register. |
| 320 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 321 | MachineBasicBlock::iterator I, |
| 322 | const DebugLoc &DL, const MCInstrDesc &MCID, |
| 323 | unsigned DestReg) { |
| 324 | MachineFunction &MF = *BB.getParent(); |
| 325 | MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); |
| 326 | BB.insert(I, MI); |
| 327 | return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define); |
| 328 | } |
| 329 | |
| 330 | /// This version of the builder inserts the newly-built instruction before |
| 331 | /// the given position in the given MachineBasicBlock, and sets up the first |
| 332 | /// operand as a destination virtual register. |
| 333 | /// |
| 334 | /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is |
| 335 | /// added to the same bundle. |
| 336 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 337 | MachineBasicBlock::instr_iterator I, |
| 338 | const DebugLoc &DL, const MCInstrDesc &MCID, |
| 339 | unsigned DestReg) { |
| 340 | MachineFunction &MF = *BB.getParent(); |
| 341 | MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); |
| 342 | BB.insert(I, MI); |
| 343 | return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define); |
| 344 | } |
| 345 | |
| 346 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, |
| 347 | const DebugLoc &DL, const MCInstrDesc &MCID, |
| 348 | unsigned DestReg) { |
| 349 | // Calling the overload for instr_iterator is always correct. However, the |
| 350 | // definition is not available in headers, so inline the check. |
| 351 | if (I.isInsideBundle()) |
| 352 | return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); |
| 353 | return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg); |
| 354 | } |
| 355 | |
| 356 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, |
| 357 | const DebugLoc &DL, const MCInstrDesc &MCID, |
| 358 | unsigned DestReg) { |
| 359 | return BuildMI(BB, *I, DL, MCID, DestReg); |
| 360 | } |
| 361 | |
| 362 | /// This version of the builder inserts the newly-built instruction before the |
| 363 | /// given position in the given MachineBasicBlock, and does NOT take a |
| 364 | /// destination register. |
| 365 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 366 | MachineBasicBlock::iterator I, |
| 367 | const DebugLoc &DL, |
| 368 | const MCInstrDesc &MCID) { |
| 369 | MachineFunction &MF = *BB.getParent(); |
| 370 | MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); |
| 371 | BB.insert(I, MI); |
| 372 | return MachineInstrBuilder(MF, MI); |
| 373 | } |
| 374 | |
| 375 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 376 | MachineBasicBlock::instr_iterator I, |
| 377 | const DebugLoc &DL, |
| 378 | const MCInstrDesc &MCID) { |
| 379 | MachineFunction &MF = *BB.getParent(); |
| 380 | MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); |
| 381 | BB.insert(I, MI); |
| 382 | return MachineInstrBuilder(MF, MI); |
| 383 | } |
| 384 | |
| 385 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, |
| 386 | const DebugLoc &DL, |
| 387 | const MCInstrDesc &MCID) { |
| 388 | // Calling the overload for instr_iterator is always correct. However, the |
| 389 | // definition is not available in headers, so inline the check. |
| 390 | if (I.isInsideBundle()) |
| 391 | return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID); |
| 392 | return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID); |
| 393 | } |
| 394 | |
| 395 | inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, |
| 396 | const DebugLoc &DL, |
| 397 | const MCInstrDesc &MCID) { |
| 398 | return BuildMI(BB, *I, DL, MCID); |
| 399 | } |
| 400 | |
| 401 | /// This version of the builder inserts the newly-built instruction at the end |
| 402 | /// of the given MachineBasicBlock, and does NOT take a destination register. |
| 403 | inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL, |
| 404 | const MCInstrDesc &MCID) { |
| 405 | return BuildMI(*BB, BB->end(), DL, MCID); |
| 406 | } |
| 407 | |
| 408 | /// This version of the builder inserts the newly-built instruction at the |
| 409 | /// end of the given MachineBasicBlock, and sets up the first operand as a |
| 410 | /// destination virtual register. |
| 411 | inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL, |
| 412 | const MCInstrDesc &MCID, unsigned DestReg) { |
| 413 | return BuildMI(*BB, BB->end(), DL, MCID, DestReg); |
| 414 | } |
| 415 | |
| 416 | /// This version of the builder builds a DBG_VALUE intrinsic |
| 417 | /// for either a value in a register or a register-indirect |
| 418 | /// address. The convention is that a DBG_VALUE is indirect iff the |
| 419 | /// second operand is an immediate. |
| 420 | MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, |
| 421 | const MCInstrDesc &MCID, bool IsIndirect, |
| 422 | unsigned Reg, const MDNode *Variable, |
| 423 | const MDNode *Expr); |
| 424 | |
| 425 | /// This version of the builder builds a DBG_VALUE intrinsic |
Andrew Scull | cdfcccc | 2018-10-05 20:58:37 +0100 | [diff] [blame] | 426 | /// for a MachineOperand. |
| 427 | MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, |
| 428 | const MCInstrDesc &MCID, bool IsIndirect, |
| 429 | MachineOperand &MO, const MDNode *Variable, |
| 430 | const MDNode *Expr); |
| 431 | |
| 432 | /// This version of the builder builds a DBG_VALUE intrinsic |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 433 | /// for either a value in a register or a register-indirect |
| 434 | /// address and inserts it at position I. |
| 435 | MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 436 | MachineBasicBlock::iterator I, const DebugLoc &DL, |
| 437 | const MCInstrDesc &MCID, bool IsIndirect, |
| 438 | unsigned Reg, const MDNode *Variable, |
| 439 | const MDNode *Expr); |
| 440 | |
Andrew Scull | cdfcccc | 2018-10-05 20:58:37 +0100 | [diff] [blame] | 441 | /// This version of the builder builds a DBG_VALUE intrinsic |
| 442 | /// for a machine operand and inserts it at position I. |
| 443 | MachineInstrBuilder BuildMI(MachineBasicBlock &BB, |
| 444 | MachineBasicBlock::iterator I, const DebugLoc &DL, |
| 445 | const MCInstrDesc &MCID, bool IsIndirect, |
| 446 | MachineOperand &MO, const MDNode *Variable, |
| 447 | const MDNode *Expr); |
| 448 | |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 449 | /// Clone a DBG_VALUE whose value has been spilled to FrameIndex. |
| 450 | MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB, |
| 451 | MachineBasicBlock::iterator I, |
| 452 | const MachineInstr &Orig, int FrameIndex); |
| 453 | |
| 454 | /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when |
| 455 | /// modifying an instruction in place while iterating over a basic block. |
| 456 | void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex); |
| 457 | |
| 458 | inline unsigned getDefRegState(bool B) { |
| 459 | return B ? RegState::Define : 0; |
| 460 | } |
| 461 | inline unsigned getImplRegState(bool B) { |
| 462 | return B ? RegState::Implicit : 0; |
| 463 | } |
| 464 | inline unsigned getKillRegState(bool B) { |
| 465 | return B ? RegState::Kill : 0; |
| 466 | } |
| 467 | inline unsigned getDeadRegState(bool B) { |
| 468 | return B ? RegState::Dead : 0; |
| 469 | } |
| 470 | inline unsigned getUndefRegState(bool B) { |
| 471 | return B ? RegState::Undef : 0; |
| 472 | } |
| 473 | inline unsigned getInternalReadRegState(bool B) { |
| 474 | return B ? RegState::InternalRead : 0; |
| 475 | } |
| 476 | inline unsigned getDebugRegState(bool B) { |
| 477 | return B ? RegState::Debug : 0; |
| 478 | } |
| 479 | inline unsigned getRenamableRegState(bool B) { |
| 480 | return B ? RegState::Renamable : 0; |
| 481 | } |
| 482 | |
| 483 | /// Get all register state flags from machine operand \p RegOp. |
| 484 | inline unsigned getRegState(const MachineOperand &RegOp) { |
| 485 | assert(RegOp.isReg() && "Not a register operand"); |
| 486 | return getDefRegState(RegOp.isDef()) | |
| 487 | getImplRegState(RegOp.isImplicit()) | |
| 488 | getKillRegState(RegOp.isKill()) | |
| 489 | getDeadRegState(RegOp.isDead()) | |
| 490 | getUndefRegState(RegOp.isUndef()) | |
| 491 | getInternalReadRegState(RegOp.isInternalRead()) | |
| 492 | getDebugRegState(RegOp.isDebug()) | |
| 493 | getRenamableRegState( |
| 494 | TargetRegisterInfo::isPhysicalRegister(RegOp.getReg()) && |
| 495 | RegOp.isRenamable()); |
| 496 | } |
| 497 | |
| 498 | /// Helper class for constructing bundles of MachineInstrs. |
| 499 | /// |
| 500 | /// MIBundleBuilder can create a bundle from scratch by inserting new |
| 501 | /// MachineInstrs one at a time, or it can create a bundle from a sequence of |
| 502 | /// existing MachineInstrs in a basic block. |
| 503 | class MIBundleBuilder { |
| 504 | MachineBasicBlock &MBB; |
| 505 | MachineBasicBlock::instr_iterator Begin; |
| 506 | MachineBasicBlock::instr_iterator End; |
| 507 | |
| 508 | public: |
| 509 | /// Create an MIBundleBuilder that inserts instructions into a new bundle in |
| 510 | /// BB above the bundle or instruction at Pos. |
| 511 | MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos) |
| 512 | : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {} |
| 513 | |
| 514 | /// Create a bundle from the sequence of instructions between B and E. |
| 515 | MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, |
| 516 | MachineBasicBlock::iterator E) |
| 517 | : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) { |
| 518 | assert(B != E && "No instructions to bundle"); |
| 519 | ++B; |
| 520 | while (B != E) { |
| 521 | MachineInstr &MI = *B; |
| 522 | ++B; |
| 523 | MI.bundleWithPred(); |
| 524 | } |
| 525 | } |
| 526 | |
| 527 | /// Create an MIBundleBuilder representing an existing instruction or bundle |
| 528 | /// that has MI as its head. |
| 529 | explicit MIBundleBuilder(MachineInstr *MI) |
| 530 | : MBB(*MI->getParent()), Begin(MI), |
| 531 | End(getBundleEnd(MI->getIterator())) {} |
| 532 | |
| 533 | /// Return a reference to the basic block containing this bundle. |
| 534 | MachineBasicBlock &getMBB() const { return MBB; } |
| 535 | |
| 536 | /// Return true if no instructions have been inserted in this bundle yet. |
| 537 | /// Empty bundles aren't representable in a MachineBasicBlock. |
| 538 | bool empty() const { return Begin == End; } |
| 539 | |
| 540 | /// Return an iterator to the first bundled instruction. |
| 541 | MachineBasicBlock::instr_iterator begin() const { return Begin; } |
| 542 | |
| 543 | /// Return an iterator beyond the last bundled instruction. |
| 544 | MachineBasicBlock::instr_iterator end() const { return End; } |
| 545 | |
| 546 | /// Insert MI into this bundle before I which must point to an instruction in |
| 547 | /// the bundle, or end(). |
| 548 | MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I, |
| 549 | MachineInstr *MI) { |
| 550 | MBB.insert(I, MI); |
| 551 | if (I == Begin) { |
| 552 | if (!empty()) |
| 553 | MI->bundleWithSucc(); |
| 554 | Begin = MI->getIterator(); |
| 555 | return *this; |
| 556 | } |
| 557 | if (I == End) { |
| 558 | MI->bundleWithPred(); |
| 559 | return *this; |
| 560 | } |
| 561 | // MI was inserted in the middle of the bundle, so its neighbors' flags are |
| 562 | // already fine. Update MI's bundle flags manually. |
| 563 | MI->setFlag(MachineInstr::BundledPred); |
| 564 | MI->setFlag(MachineInstr::BundledSucc); |
| 565 | return *this; |
| 566 | } |
| 567 | |
| 568 | /// Insert MI into MBB by prepending it to the instructions in the bundle. |
| 569 | /// MI will become the first instruction in the bundle. |
| 570 | MIBundleBuilder &prepend(MachineInstr *MI) { |
| 571 | return insert(begin(), MI); |
| 572 | } |
| 573 | |
| 574 | /// Insert MI into MBB by appending it to the instructions in the bundle. |
| 575 | /// MI will become the last instruction in the bundle. |
| 576 | MIBundleBuilder &append(MachineInstr *MI) { |
| 577 | return insert(end(), MI); |
| 578 | } |
| 579 | }; |
| 580 | |
| 581 | } // end namespace llvm |
| 582 | |
| 583 | #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H |