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Andrew Scull5e1ddfa2018-08-14 10:06:54 +01001//===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file exposes a function named BuildMI, which is useful for dramatically
11// simplifying how MachineInstr's are created. It allows use of code like this:
12//
13// M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
14// .addReg(argVal1)
15// .addReg(argVal2);
16//
17//===----------------------------------------------------------------------===//
18
19#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
21
22#include "llvm/ADT/ArrayRef.h"
23#include "llvm/CodeGen/GlobalISel/Utils.h"
24#include "llvm/CodeGen/MachineBasicBlock.h"
25#include "llvm/CodeGen/MachineFunction.h"
26#include "llvm/CodeGen/MachineInstr.h"
27#include "llvm/CodeGen/MachineInstrBundle.h"
28#include "llvm/CodeGen/MachineOperand.h"
29#include "llvm/CodeGen/TargetRegisterInfo.h"
30#include "llvm/IR/InstrTypes.h"
31#include "llvm/IR/Intrinsics.h"
32#include "llvm/Support/ErrorHandling.h"
33#include <cassert>
34#include <cstdint>
35#include <utility>
36
37namespace llvm {
38
39class MCInstrDesc;
40class MDNode;
41
42namespace RegState {
43
44 enum {
45 Define = 0x2,
46 Implicit = 0x4,
47 Kill = 0x8,
48 Dead = 0x10,
49 Undef = 0x20,
50 EarlyClobber = 0x40,
51 Debug = 0x80,
52 InternalRead = 0x100,
53 Renamable = 0x200,
54 DefineNoRead = Define | Undef,
55 ImplicitDefine = Implicit | Define,
56 ImplicitKill = Implicit | Kill
57 };
58
59} // end namespace RegState
60
61class MachineInstrBuilder {
62 MachineFunction *MF = nullptr;
63 MachineInstr *MI = nullptr;
64
65public:
66 MachineInstrBuilder() = default;
67
68 /// Create a MachineInstrBuilder for manipulating an existing instruction.
69 /// F must be the machine function that was used to allocate I.
70 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
71 MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
72 : MF(&F), MI(&*I) {}
73
74 /// Allow automatic conversion to the machine instruction we are working on.
75 operator MachineInstr*() const { return MI; }
76 MachineInstr *operator->() const { return MI; }
77 operator MachineBasicBlock::iterator() const { return MI; }
78
79 /// If conversion operators fail, use this method to get the MachineInstr
80 /// explicitly.
81 MachineInstr *getInstr() const { return MI; }
82
83 /// Add a new virtual register operand.
84 const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
85 unsigned SubReg = 0) const {
86 assert((flags & 0x1) == 0 &&
87 "Passing in 'true' to addReg is forbidden! Use enums instead.");
88 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
89 flags & RegState::Define,
90 flags & RegState::Implicit,
91 flags & RegState::Kill,
92 flags & RegState::Dead,
93 flags & RegState::Undef,
94 flags & RegState::EarlyClobber,
95 SubReg,
96 flags & RegState::Debug,
97 flags & RegState::InternalRead,
98 flags & RegState::Renamable));
99 return *this;
100 }
101
102 /// Add a virtual register definition operand.
103 const MachineInstrBuilder &addDef(unsigned RegNo, unsigned Flags = 0,
104 unsigned SubReg = 0) const {
105 return addReg(RegNo, Flags | RegState::Define, SubReg);
106 }
107
108 /// Add a virtual register use operand. It is an error for Flags to contain
109 /// `RegState::Define` when calling this function.
110 const MachineInstrBuilder &addUse(unsigned RegNo, unsigned Flags = 0,
111 unsigned SubReg = 0) const {
112 assert(!(Flags & RegState::Define) &&
113 "Misleading addUse defines register, use addReg instead.");
114 return addReg(RegNo, Flags, SubReg);
115 }
116
117 /// Add a new immediate operand.
118 const MachineInstrBuilder &addImm(int64_t Val) const {
119 MI->addOperand(*MF, MachineOperand::CreateImm(Val));
120 return *this;
121 }
122
123 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
124 MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
125 return *this;
126 }
127
128 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
129 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
130 return *this;
131 }
132
133 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
134 unsigned char TargetFlags = 0) const {
135 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
136 return *this;
137 }
138
139 const MachineInstrBuilder &addFrameIndex(int Idx) const {
140 MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
141 return *this;
142 }
143
144 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
145 int Offset = 0,
146 unsigned char TargetFlags = 0) const {
147 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
148 return *this;
149 }
150
151 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
152 unsigned char TargetFlags = 0) const {
153 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
154 TargetFlags));
155 return *this;
156 }
157
158 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
159 unsigned char TargetFlags = 0) const {
160 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
161 return *this;
162 }
163
164 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
165 int64_t Offset = 0,
166 unsigned char TargetFlags = 0) const {
167 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
168 return *this;
169 }
170
171 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
172 unsigned char TargetFlags = 0) const {
173 MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
174 return *this;
175 }
176
177 const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
178 int64_t Offset = 0,
179 unsigned char TargetFlags = 0) const {
180 MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
181 return *this;
182 }
183
184 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
185 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
186 return *this;
187 }
188
189 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
190 MI->addMemOperand(*MF, MMO);
191 return *this;
192 }
193
194 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
195 MachineInstr::mmo_iterator e) const {
196 MI->setMemRefs(b, e);
197 return *this;
198 }
199
200 const MachineInstrBuilder &setMemRefs(std::pair<MachineInstr::mmo_iterator,
201 unsigned> MemOperandsRef) const {
202 MI->setMemRefs(MemOperandsRef);
203 return *this;
204 }
205
206 const MachineInstrBuilder &add(const MachineOperand &MO) const {
207 MI->addOperand(*MF, MO);
208 return *this;
209 }
210
211 const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const {
212 for (const MachineOperand &MO : MOs) {
213 MI->addOperand(*MF, MO);
214 }
215 return *this;
216 }
217
218 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
219 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
220 assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
221 : true) &&
222 "first MDNode argument of a DBG_VALUE not a variable");
223 return *this;
224 }
225
226 const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
227 MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
228 return *this;
229 }
230
231 const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const {
232 MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
233 return *this;
234 }
235
236 const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const {
237 MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
238 return *this;
239 }
240
241 const MachineInstrBuilder &addSym(MCSymbol *Sym,
242 unsigned char TargetFlags = 0) const {
243 MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
244 return *this;
245 }
246
247 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
248 MI->setFlags(Flags);
249 return *this;
250 }
251
252 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
253 MI->setFlag(Flag);
254 return *this;
255 }
256
257 // Add a displacement from an existing MachineOperand with an added offset.
258 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
259 unsigned char TargetFlags = 0) const {
260 // If caller specifies new TargetFlags then use it, otherwise the
261 // default behavior is to copy the target flags from the existing
262 // MachineOperand. This means if the caller wants to clear the
263 // target flags it needs to do so explicitly.
264 if (0 == TargetFlags)
265 TargetFlags = Disp.getTargetFlags();
266
267 switch (Disp.getType()) {
268 default:
269 llvm_unreachable("Unhandled operand type in addDisp()");
270 case MachineOperand::MO_Immediate:
271 return addImm(Disp.getImm() + off);
272 case MachineOperand::MO_ConstantPoolIndex:
273 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
274 TargetFlags);
275 case MachineOperand::MO_GlobalAddress:
276 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
277 TargetFlags);
278 }
279 }
280
281 /// Copy all the implicit operands from OtherMI onto this one.
282 const MachineInstrBuilder &
283 copyImplicitOps(const MachineInstr &OtherMI) const {
284 MI->copyImplicitOps(*MF, OtherMI);
285 return *this;
286 }
287
288 bool constrainAllUses(const TargetInstrInfo &TII,
289 const TargetRegisterInfo &TRI,
290 const RegisterBankInfo &RBI) const {
291 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
292 }
293};
294
295/// Builder interface. Specify how to create the initial instruction itself.
296inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
297 const MCInstrDesc &MCID) {
298 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
299}
300
301/// This version of the builder sets up the first operand as a
302/// destination virtual register.
303inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
304 const MCInstrDesc &MCID, unsigned DestReg) {
305 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
306 .addReg(DestReg, RegState::Define);
307}
308
309/// This version of the builder inserts the newly-built instruction before
310/// the given position in the given MachineBasicBlock, and sets up the first
311/// operand as a destination virtual register.
312inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
313 MachineBasicBlock::iterator I,
314 const DebugLoc &DL, const MCInstrDesc &MCID,
315 unsigned DestReg) {
316 MachineFunction &MF = *BB.getParent();
317 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
318 BB.insert(I, MI);
319 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
320}
321
322/// This version of the builder inserts the newly-built instruction before
323/// the given position in the given MachineBasicBlock, and sets up the first
324/// operand as a destination virtual register.
325///
326/// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
327/// added to the same bundle.
328inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
329 MachineBasicBlock::instr_iterator I,
330 const DebugLoc &DL, const MCInstrDesc &MCID,
331 unsigned DestReg) {
332 MachineFunction &MF = *BB.getParent();
333 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
334 BB.insert(I, MI);
335 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
336}
337
338inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
339 const DebugLoc &DL, const MCInstrDesc &MCID,
340 unsigned DestReg) {
341 // Calling the overload for instr_iterator is always correct. However, the
342 // definition is not available in headers, so inline the check.
343 if (I.isInsideBundle())
344 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
345 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
346}
347
348inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
349 const DebugLoc &DL, const MCInstrDesc &MCID,
350 unsigned DestReg) {
351 return BuildMI(BB, *I, DL, MCID, DestReg);
352}
353
354/// This version of the builder inserts the newly-built instruction before the
355/// given position in the given MachineBasicBlock, and does NOT take a
356/// destination register.
357inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
358 MachineBasicBlock::iterator I,
359 const DebugLoc &DL,
360 const MCInstrDesc &MCID) {
361 MachineFunction &MF = *BB.getParent();
362 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
363 BB.insert(I, MI);
364 return MachineInstrBuilder(MF, MI);
365}
366
367inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
368 MachineBasicBlock::instr_iterator I,
369 const DebugLoc &DL,
370 const MCInstrDesc &MCID) {
371 MachineFunction &MF = *BB.getParent();
372 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
373 BB.insert(I, MI);
374 return MachineInstrBuilder(MF, MI);
375}
376
377inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
378 const DebugLoc &DL,
379 const MCInstrDesc &MCID) {
380 // Calling the overload for instr_iterator is always correct. However, the
381 // definition is not available in headers, so inline the check.
382 if (I.isInsideBundle())
383 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
384 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
385}
386
387inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
388 const DebugLoc &DL,
389 const MCInstrDesc &MCID) {
390 return BuildMI(BB, *I, DL, MCID);
391}
392
393/// This version of the builder inserts the newly-built instruction at the end
394/// of the given MachineBasicBlock, and does NOT take a destination register.
395inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
396 const MCInstrDesc &MCID) {
397 return BuildMI(*BB, BB->end(), DL, MCID);
398}
399
400/// This version of the builder inserts the newly-built instruction at the
401/// end of the given MachineBasicBlock, and sets up the first operand as a
402/// destination virtual register.
403inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
404 const MCInstrDesc &MCID, unsigned DestReg) {
405 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
406}
407
408/// This version of the builder builds a DBG_VALUE intrinsic
409/// for either a value in a register or a register-indirect
410/// address. The convention is that a DBG_VALUE is indirect iff the
411/// second operand is an immediate.
412MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
413 const MCInstrDesc &MCID, bool IsIndirect,
414 unsigned Reg, const MDNode *Variable,
415 const MDNode *Expr);
416
417/// This version of the builder builds a DBG_VALUE intrinsic
418/// for either a value in a register or a register-indirect
419/// address and inserts it at position I.
420MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
421 MachineBasicBlock::iterator I, const DebugLoc &DL,
422 const MCInstrDesc &MCID, bool IsIndirect,
423 unsigned Reg, const MDNode *Variable,
424 const MDNode *Expr);
425
426/// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
427MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
428 MachineBasicBlock::iterator I,
429 const MachineInstr &Orig, int FrameIndex);
430
431/// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
432/// modifying an instruction in place while iterating over a basic block.
433void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex);
434
435inline unsigned getDefRegState(bool B) {
436 return B ? RegState::Define : 0;
437}
438inline unsigned getImplRegState(bool B) {
439 return B ? RegState::Implicit : 0;
440}
441inline unsigned getKillRegState(bool B) {
442 return B ? RegState::Kill : 0;
443}
444inline unsigned getDeadRegState(bool B) {
445 return B ? RegState::Dead : 0;
446}
447inline unsigned getUndefRegState(bool B) {
448 return B ? RegState::Undef : 0;
449}
450inline unsigned getInternalReadRegState(bool B) {
451 return B ? RegState::InternalRead : 0;
452}
453inline unsigned getDebugRegState(bool B) {
454 return B ? RegState::Debug : 0;
455}
456inline unsigned getRenamableRegState(bool B) {
457 return B ? RegState::Renamable : 0;
458}
459
460/// Get all register state flags from machine operand \p RegOp.
461inline unsigned getRegState(const MachineOperand &RegOp) {
462 assert(RegOp.isReg() && "Not a register operand");
463 return getDefRegState(RegOp.isDef()) |
464 getImplRegState(RegOp.isImplicit()) |
465 getKillRegState(RegOp.isKill()) |
466 getDeadRegState(RegOp.isDead()) |
467 getUndefRegState(RegOp.isUndef()) |
468 getInternalReadRegState(RegOp.isInternalRead()) |
469 getDebugRegState(RegOp.isDebug()) |
470 getRenamableRegState(
471 TargetRegisterInfo::isPhysicalRegister(RegOp.getReg()) &&
472 RegOp.isRenamable());
473}
474
475/// Helper class for constructing bundles of MachineInstrs.
476///
477/// MIBundleBuilder can create a bundle from scratch by inserting new
478/// MachineInstrs one at a time, or it can create a bundle from a sequence of
479/// existing MachineInstrs in a basic block.
480class MIBundleBuilder {
481 MachineBasicBlock &MBB;
482 MachineBasicBlock::instr_iterator Begin;
483 MachineBasicBlock::instr_iterator End;
484
485public:
486 /// Create an MIBundleBuilder that inserts instructions into a new bundle in
487 /// BB above the bundle or instruction at Pos.
488 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
489 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
490
491 /// Create a bundle from the sequence of instructions between B and E.
492 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B,
493 MachineBasicBlock::iterator E)
494 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
495 assert(B != E && "No instructions to bundle");
496 ++B;
497 while (B != E) {
498 MachineInstr &MI = *B;
499 ++B;
500 MI.bundleWithPred();
501 }
502 }
503
504 /// Create an MIBundleBuilder representing an existing instruction or bundle
505 /// that has MI as its head.
506 explicit MIBundleBuilder(MachineInstr *MI)
507 : MBB(*MI->getParent()), Begin(MI),
508 End(getBundleEnd(MI->getIterator())) {}
509
510 /// Return a reference to the basic block containing this bundle.
511 MachineBasicBlock &getMBB() const { return MBB; }
512
513 /// Return true if no instructions have been inserted in this bundle yet.
514 /// Empty bundles aren't representable in a MachineBasicBlock.
515 bool empty() const { return Begin == End; }
516
517 /// Return an iterator to the first bundled instruction.
518 MachineBasicBlock::instr_iterator begin() const { return Begin; }
519
520 /// Return an iterator beyond the last bundled instruction.
521 MachineBasicBlock::instr_iterator end() const { return End; }
522
523 /// Insert MI into this bundle before I which must point to an instruction in
524 /// the bundle, or end().
525 MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
526 MachineInstr *MI) {
527 MBB.insert(I, MI);
528 if (I == Begin) {
529 if (!empty())
530 MI->bundleWithSucc();
531 Begin = MI->getIterator();
532 return *this;
533 }
534 if (I == End) {
535 MI->bundleWithPred();
536 return *this;
537 }
538 // MI was inserted in the middle of the bundle, so its neighbors' flags are
539 // already fine. Update MI's bundle flags manually.
540 MI->setFlag(MachineInstr::BundledPred);
541 MI->setFlag(MachineInstr::BundledSucc);
542 return *this;
543 }
544
545 /// Insert MI into MBB by prepending it to the instructions in the bundle.
546 /// MI will become the first instruction in the bundle.
547 MIBundleBuilder &prepend(MachineInstr *MI) {
548 return insert(begin(), MI);
549 }
550
551 /// Insert MI into MBB by appending it to the instructions in the bundle.
552 /// MI will become the last instruction in the bundle.
553 MIBundleBuilder &append(MachineInstr *MI) {
554 return insert(end(), MI);
555 }
556};
557
558} // end namespace llvm
559
560#endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H