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J-Alves7ec9d6e2023-02-28 16:39:56 +00001/*
2 * Copyright 2023 The Hafnium Authors.
3 *
4 * Use of this source code is governed by a BSD-style
5 * license that can be found in the LICENSE file or at
6 * https://opensource.org/licenses/BSD-3-Clause.
7 */
8
9#pragma once
10
11#include <stdint.h>
12
13#include "hf/addr.h"
14#include "hf/memiter.h"
15#include "hf/string.h"
16
17#include "vmapi/hf/ffa.h"
18
19#define MANIFEST_INVALID_ADDRESS UINT64_MAX
20#define MANIFEST_INVALID_ID UINT32_MAX
21
22#define SP_RTX_BUF_NAME_SIZE 10
23
24/** FF-A manifest memory and device regions attributes. */
25#define MANIFEST_REGION_ATTR_READ (UINT32_C(1) << 0)
26#define MANIFEST_REGION_ATTR_WRITE (UINT32_C(1) << 1)
27#define MANIFEST_REGION_ATTR_EXEC (UINT32_C(1) << 2)
28#define MANIFEST_REGION_ATTR_SECURITY (UINT32_C(1) << 3)
29
Olivier Deprez058ddee2024-08-27 09:22:11 +020030#define MANIFEST_REGION_ALL_ATTR_MASK \
31 (MANIFEST_REGION_ATTR_READ | MANIFEST_REGION_ATTR_WRITE | \
32 MANIFEST_REGION_ATTR_EXEC | MANIFEST_REGION_ATTR_SECURITY)
J-Alves7ec9d6e2023-02-28 16:39:56 +000033
34#define MANIFEST_POWER_MANAGEMENT_CPU_OFF_SUPPORTED (UINT32_C(1) << 0)
35#define MANIFEST_POWER_MANAGEMENT_CPU_ON_SUPPORTED (UINT32_C(1) << 3)
36#define MANIFEST_POWER_MANAGEMENT_NONE_MASK (UINT32_C(0))
37#define MANIFEST_POWER_MANAGEMENT_ALL_MASK \
38 (MANIFEST_POWER_MANAGEMENT_CPU_OFF_SUPPORTED | \
39 MANIFEST_POWER_MANAGEMENT_CPU_ON_SUPPORTED)
40
41/* Highest possible value for the boot-order field. */
42#define DEFAULT_BOOT_ORDER 0xFFFF
43#define DEFAULT_BOOT_GP_REGISTER UINT32_C(-1)
44
45enum run_time_el {
46 EL1 = 0,
47 S_EL0,
48 S_EL1,
49 SUPERVISOR_MODE,
50 SECURE_USER_MODE,
Daniel Boulby874d5432023-04-27 12:40:24 +010051 SECURE_SUPERVISOR_MODE,
52 EL0
J-Alves7ec9d6e2023-02-28 16:39:56 +000053};
54
55enum execution_state { AARCH64 = 0, AARCH32 };
56
57enum xlat_granule { PAGE_4KB = 0, PAGE_16KB, PAGE_64KB };
58
59/**
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -050060 * Properties of the DMA capable device upstream of an SMMU as specified in the
61 * memory region description of the partition manifest.
62 */
63struct dma_device_properties {
64 /** SMMU ID - optional */
65 uint32_t smmu_id;
66 /** IMPDEF id tracking DMA peripheral device - optional */
67 uint8_t dma_device_id;
68 /** Count of Stream IDs assigned to device - optional */
69 uint8_t stream_count;
70 /** List of Stream IDs assigned to device - optional */
71 uint32_t stream_ids[PARTITION_MAX_STREAMS_PER_DEVICE];
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -050072};
73
74/**
75 * Partition Memory region as described in FFA v1.2 spec, Table 5.2 along with
76 * an implementation defined struct to track the properties of a DMA capable
77 * device that has access to this memory region.
J-Alves7ec9d6e2023-02-28 16:39:56 +000078 */
79struct memory_region {
80 struct string name;
81 /**
82 * Specify PA, VA for S-EL0 partitions or IPA
83 * for S-EL1 partitions - optional.
84 */
85 uintptr_t base_address;
86 /** Page count - mandatory */
87 uint32_t page_count;
88 /** Memory attributes - mandatory */
89 uint32_t attributes;
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -050090 /** DMA device properties - optional */
91 struct dma_device_properties dma_prop;
Madhukar Pappireddy9c764b32024-06-20 14:36:55 -050092 /** Instruction and data access permissions for DMA device - optional */
93 uint32_t dma_access_permissions;
J-Alves7ec9d6e2023-02-28 16:39:56 +000094};
95
Daniel Boulby18485942024-10-14 16:23:03 +010096/**
97 * Interrupts attibutes encoding in the manifest:
98 * Field Bit(s)
99 * ---------------------------
100 * Priority 7:0
101 * Security_State 8
102 * Config(Edge/Level) 9
103 * Type(SPI/PPI/SGI) 11:10
104 * Reserved 31:12
105 */
106#define INT_INFO_ATTR_PRIORITY_SHIFT 0
107#define INT_INFO_ATTR_SEC_STATE_SHIFT 8
108#define INT_INFO_ATTR_CONFIG_SHIFT 9
109#define INT_INFO_ATTR_TYPE_SHIFT 10
110
J-Alves7ec9d6e2023-02-28 16:39:56 +0000111struct interrupt_info {
112 uint32_t id;
113 uint32_t attributes;
114 bool mpidr_valid;
115 uint64_t mpidr;
116};
117
118/**
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -0500119 * Partition Device region as described in FFA v1.2 spec, Table 5.3 along with
120 * few implementation defined fields.
J-Alves7ec9d6e2023-02-28 16:39:56 +0000121 */
122struct device_region {
123 /** Device base PA - mandatory */
124 uintptr_t base_address;
125 /** Page count - mandatory */
126 uint32_t page_count;
127 /** Memory attributes - mandatory */
128 uint32_t attributes;
129 /** List of physical interrupt ID's and their attributes - optional */
130 struct interrupt_info interrupts[PARTITION_MAX_INTERRUPTS_PER_DEVICE];
131 /** Count of physical interrupts - optional */
132 uint8_t interrupt_count;
Madhukar Pappireddy9c764b32024-06-20 14:36:55 -0500133 /** DMA device properties - optional */
134 struct dma_device_properties dma_prop;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000135 /** Exclusive access to an endpoint - optional */
136 bool exclusive_access;
137 /** Name of Device region - optional */
138 struct string name;
139};
140
141/**
142 * RX/TX buffer, reference to memory-region entries that describe RX/TX
143 * buffers in partition manifest.
144 */
145struct rx_tx {
146 bool available;
147 uint32_t rx_phandle;
148 uint32_t tx_phandle;
149 struct memory_region *rx_buffer;
150 struct memory_region *tx_buffer;
151};
152
153/**
154 * Partition manifest as described in FF-A v1.0 spec section 3.1
155 */
156struct ffa_partition_manifest {
157 /** FF-A expected version - mandatory */
Karl Meakin0e617d92024-04-05 12:55:22 +0100158 enum ffa_version ffa_version;
Kathleen Capella422b10b2023-06-30 18:28:27 -0400159 /** UUID - at least one UUID mandatory */
160 uint16_t uuid_count;
161 struct ffa_uuid uuids[PARTITION_MAX_UUIDS];
J-Alves7ec9d6e2023-02-28 16:39:56 +0000162 /** Partition id - optional */
J-Alves19e20cf2023-08-02 12:48:55 +0100163 ffa_id_t id;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000164 /** Aux ids for mem transactions - optional */
J-Alves19e20cf2023-08-02 12:48:55 +0100165 ffa_id_t aux_id;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000166
167 /* NOTE: optional name field maps to VM debug_name field */
168
169 /** mandatory */
170 ffa_vcpu_count_t execution_ctx_count;
171 /** EL1 or secure EL1, secure EL0 - mandatory */
172 enum run_time_el run_time_el;
173 /** AArch32 / AArch64 - mandatory */
174 enum execution_state execution_state;
175 /** optional */
176 uintpaddr_t load_addr;
177 /** optional */
178 size_t ep_offset;
179 /** 4/16/64KB - optional */
180 enum xlat_granule xlat_granule;
181 /** Register id from w0/x0-w3/x3 - optional. */
182 uint32_t gp_register_num;
183 /**
184 * Flags the presence of the optional IMPDEF node to define Partition's
185 * Boot Info.
186 */
187 bool boot_info;
188 /** optional */
189 uint16_t boot_order;
190
191 /** Optional RX/TX buffers */
192 struct rx_tx rxtx;
193
194 /** mandatory - direct/indirect msg or both */
Kathleen Capellaf71dee42023-08-08 16:24:14 -0400195 uint16_t messaging_method;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000196 /** mandatory - action in response to non secure interrupt */
197 uint8_t ns_interrupts_action;
198 /** optional - managed exit signaled through vIRQ */
199 bool me_signal_virq;
200 /** optional - receipt of notifications. */
201 bool notification_support;
202 /**
203 * optional - power management messages bitfield.
204 *
205 * See [1] power-management-messages manifest field.
206 *
207 * The Hafnium supported combinations for a MP SP are:
208 * Bit 0 - relay PSCI cpu off message to the SP.
209 * Bit 3 - relay PSCI cpu on to the SP.
210 *
211 * [1]
212 * https://trustedfirmware-a.readthedocs.io/en/latest/components/ffa-manifest-binding.html#partition-properties
213 */
214 uint32_t power_management;
215 /** optional */
216 bool has_primary_scheduler;
217 /** optional - tuples SEPID/SMMUID/streamId */
218 uint32_t stream_ep_ids[1];
219
220 /** Memory regions */
221 uint16_t mem_region_count;
222 struct memory_region mem_regions[PARTITION_MAX_MEMORY_REGIONS];
223 /** Device regions */
224 uint16_t dev_region_count;
225 struct device_region dev_regions[PARTITION_MAX_DEVICE_REGIONS];
Madhukar Pappireddye032af52023-10-11 14:52:58 -0500226 /** DMA device count. */
227 uint8_t dma_device_count;
228
J-Alves7ec9d6e2023-02-28 16:39:56 +0000229 /** optional - action in response to Other-Secure interrupt */
230 uint8_t other_s_interrupts_action;
231};