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J-Alves7ec9d6e2023-02-28 16:39:56 +00001/*
2 * Copyright 2023 The Hafnium Authors.
3 *
4 * Use of this source code is governed by a BSD-style
5 * license that can be found in the LICENSE file or at
6 * https://opensource.org/licenses/BSD-3-Clause.
7 */
8
9#pragma once
10
11#include <stdint.h>
12
13#include "hf/addr.h"
14#include "hf/memiter.h"
15#include "hf/string.h"
16
17#include "vmapi/hf/ffa.h"
18
19#define MANIFEST_INVALID_ADDRESS UINT64_MAX
20#define MANIFEST_INVALID_ID UINT32_MAX
21
22#define SP_RTX_BUF_NAME_SIZE 10
23
24/** FF-A manifest memory and device regions attributes. */
25#define MANIFEST_REGION_ATTR_READ (UINT32_C(1) << 0)
26#define MANIFEST_REGION_ATTR_WRITE (UINT32_C(1) << 1)
27#define MANIFEST_REGION_ATTR_EXEC (UINT32_C(1) << 2)
28#define MANIFEST_REGION_ATTR_SECURITY (UINT32_C(1) << 3)
Daniel Boulby4339edc2024-02-21 14:59:00 +000029#define MANIFEST_REGION_ATTR_MEMORY_TYPE_DEVICE (UINT32_C(1) << 4)
J-Alves7ec9d6e2023-02-28 16:39:56 +000030
Daniel Boulby4339edc2024-02-21 14:59:00 +000031#define MANIFEST_REGION_ALL_ATTR_MASK \
32 (MANIFEST_REGION_ATTR_READ | MANIFEST_REGION_ATTR_WRITE | \
33 MANIFEST_REGION_ATTR_EXEC | MANIFEST_REGION_ATTR_SECURITY | \
34 MANIFEST_REGION_ATTR_MEMORY_TYPE_DEVICE)
J-Alves7ec9d6e2023-02-28 16:39:56 +000035
36#define MANIFEST_POWER_MANAGEMENT_CPU_OFF_SUPPORTED (UINT32_C(1) << 0)
37#define MANIFEST_POWER_MANAGEMENT_CPU_ON_SUPPORTED (UINT32_C(1) << 3)
38#define MANIFEST_POWER_MANAGEMENT_NONE_MASK (UINT32_C(0))
39#define MANIFEST_POWER_MANAGEMENT_ALL_MASK \
40 (MANIFEST_POWER_MANAGEMENT_CPU_OFF_SUPPORTED | \
41 MANIFEST_POWER_MANAGEMENT_CPU_ON_SUPPORTED)
42
43/* Highest possible value for the boot-order field. */
44#define DEFAULT_BOOT_ORDER 0xFFFF
45#define DEFAULT_BOOT_GP_REGISTER UINT32_C(-1)
46
47enum run_time_el {
48 EL1 = 0,
49 S_EL0,
50 S_EL1,
51 SUPERVISOR_MODE,
52 SECURE_USER_MODE,
Daniel Boulby874d5432023-04-27 12:40:24 +010053 SECURE_SUPERVISOR_MODE,
54 EL0
J-Alves7ec9d6e2023-02-28 16:39:56 +000055};
56
57enum execution_state { AARCH64 = 0, AARCH32 };
58
59enum xlat_granule { PAGE_4KB = 0, PAGE_16KB, PAGE_64KB };
60
61/**
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -050062 * Properties of the DMA capable device upstream of an SMMU as specified in the
63 * memory region description of the partition manifest.
64 */
65struct dma_device_properties {
66 /** SMMU ID - optional */
67 uint32_t smmu_id;
68 /** IMPDEF id tracking DMA peripheral device - optional */
69 uint8_t dma_device_id;
70 /** Count of Stream IDs assigned to device - optional */
71 uint8_t stream_count;
72 /** List of Stream IDs assigned to device - optional */
73 uint32_t stream_ids[PARTITION_MAX_STREAMS_PER_DEVICE];
74 /** Instruction and data access permissions - optional */
75 uint32_t dma_access_permissions;
76};
77
78/**
79 * Partition Memory region as described in FFA v1.2 spec, Table 5.2 along with
80 * an implementation defined struct to track the properties of a DMA capable
81 * device that has access to this memory region.
J-Alves7ec9d6e2023-02-28 16:39:56 +000082 */
83struct memory_region {
84 struct string name;
85 /**
86 * Specify PA, VA for S-EL0 partitions or IPA
87 * for S-EL1 partitions - optional.
88 */
89 uintptr_t base_address;
90 /** Page count - mandatory */
91 uint32_t page_count;
92 /** Memory attributes - mandatory */
93 uint32_t attributes;
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -050094 /** DMA device properties - optional */
95 struct dma_device_properties dma_prop;
J-Alves7ec9d6e2023-02-28 16:39:56 +000096};
97
98struct interrupt_info {
99 uint32_t id;
100 uint32_t attributes;
101 bool mpidr_valid;
102 uint64_t mpidr;
103};
104
105/**
Madhukar Pappireddy3c2b7912023-10-11 14:47:27 -0500106 * Partition Device region as described in FFA v1.2 spec, Table 5.3 along with
107 * few implementation defined fields.
J-Alves7ec9d6e2023-02-28 16:39:56 +0000108 */
109struct device_region {
110 /** Device base PA - mandatory */
111 uintptr_t base_address;
112 /** Page count - mandatory */
113 uint32_t page_count;
114 /** Memory attributes - mandatory */
115 uint32_t attributes;
116 /** List of physical interrupt ID's and their attributes - optional */
117 struct interrupt_info interrupts[PARTITION_MAX_INTERRUPTS_PER_DEVICE];
118 /** Count of physical interrupts - optional */
119 uint8_t interrupt_count;
120 /** SMMU ID - optional */
121 uint32_t smmu_id;
Madhukar Pappireddye032af52023-10-11 14:52:58 -0500122 /** IMPDEF id tracking DMA peripheral device - optional */
123 uint8_t dma_device_id;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000124 /** Count of Stream IDs assigned to device - optional */
125 uint8_t stream_count;
126 /** List of Stream IDs assigned to device - optional */
127 uint32_t stream_ids[PARTITION_MAX_STREAMS_PER_DEVICE];
128 /** Exclusive access to an endpoint - optional */
129 bool exclusive_access;
130 /** Name of Device region - optional */
131 struct string name;
132};
133
134/**
135 * RX/TX buffer, reference to memory-region entries that describe RX/TX
136 * buffers in partition manifest.
137 */
138struct rx_tx {
139 bool available;
140 uint32_t rx_phandle;
141 uint32_t tx_phandle;
142 struct memory_region *rx_buffer;
143 struct memory_region *tx_buffer;
144};
145
146/**
147 * Partition manifest as described in FF-A v1.0 spec section 3.1
148 */
149struct ffa_partition_manifest {
150 /** FF-A expected version - mandatory */
Karl Meakin0e617d92024-04-05 12:55:22 +0100151 enum ffa_version ffa_version;
Kathleen Capella422b10b2023-06-30 18:28:27 -0400152 /** UUID - at least one UUID mandatory */
153 uint16_t uuid_count;
154 struct ffa_uuid uuids[PARTITION_MAX_UUIDS];
J-Alves7ec9d6e2023-02-28 16:39:56 +0000155 /** Partition id - optional */
J-Alves19e20cf2023-08-02 12:48:55 +0100156 ffa_id_t id;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000157 /** Aux ids for mem transactions - optional */
J-Alves19e20cf2023-08-02 12:48:55 +0100158 ffa_id_t aux_id;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000159
160 /* NOTE: optional name field maps to VM debug_name field */
161
162 /** mandatory */
163 ffa_vcpu_count_t execution_ctx_count;
164 /** EL1 or secure EL1, secure EL0 - mandatory */
165 enum run_time_el run_time_el;
166 /** AArch32 / AArch64 - mandatory */
167 enum execution_state execution_state;
168 /** optional */
169 uintpaddr_t load_addr;
170 /** optional */
171 size_t ep_offset;
172 /** 4/16/64KB - optional */
173 enum xlat_granule xlat_granule;
174 /** Register id from w0/x0-w3/x3 - optional. */
175 uint32_t gp_register_num;
176 /**
177 * Flags the presence of the optional IMPDEF node to define Partition's
178 * Boot Info.
179 */
180 bool boot_info;
181 /** optional */
182 uint16_t boot_order;
183
184 /** Optional RX/TX buffers */
185 struct rx_tx rxtx;
186
187 /** mandatory - direct/indirect msg or both */
Kathleen Capellaf71dee42023-08-08 16:24:14 -0400188 uint16_t messaging_method;
J-Alves7ec9d6e2023-02-28 16:39:56 +0000189 /** mandatory - action in response to non secure interrupt */
190 uint8_t ns_interrupts_action;
191 /** optional - managed exit signaled through vIRQ */
192 bool me_signal_virq;
193 /** optional - receipt of notifications. */
194 bool notification_support;
195 /**
196 * optional - power management messages bitfield.
197 *
198 * See [1] power-management-messages manifest field.
199 *
200 * The Hafnium supported combinations for a MP SP are:
201 * Bit 0 - relay PSCI cpu off message to the SP.
202 * Bit 3 - relay PSCI cpu on to the SP.
203 *
204 * [1]
205 * https://trustedfirmware-a.readthedocs.io/en/latest/components/ffa-manifest-binding.html#partition-properties
206 */
207 uint32_t power_management;
208 /** optional */
209 bool has_primary_scheduler;
210 /** optional - tuples SEPID/SMMUID/streamId */
211 uint32_t stream_ep_ids[1];
212
213 /** Memory regions */
214 uint16_t mem_region_count;
215 struct memory_region mem_regions[PARTITION_MAX_MEMORY_REGIONS];
216 /** Device regions */
217 uint16_t dev_region_count;
218 struct device_region dev_regions[PARTITION_MAX_DEVICE_REGIONS];
Madhukar Pappireddye032af52023-10-11 14:52:58 -0500219 /** DMA device count. */
220 uint8_t dma_device_count;
221
J-Alves7ec9d6e2023-02-28 16:39:56 +0000222 /** optional - action in response to Other-Secure interrupt */
223 uint8_t other_s_interrupts_action;
224};