blob: cfdd4737825cff1ee181b1c31956b9492fa1a8eb [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
5 */
6
7#ifndef SMC_RMI_H
8#define SMC_RMI_H
9
Soby Mathewb4c6df42022-11-09 11:13:29 +000010#include <smc.h>
11
12/*
13 * This file describes the Realm Management Interface (RMI) Application Binary
14 * Interface (ABI) for SMC calls made from Non-secure state to the RMM and
15 * serviced by the RMM.
Soby Mathewb4c6df42022-11-09 11:13:29 +000016 */
17
Arunachalam Ganapathy4003b3c2024-11-05 18:02:10 +000018#define MAKE_RMI_REVISION(_major, _minor) (((_major) << UL(16)) | (_minor))
19#define RMI_ABI_VERSION_GET_MAJOR(_version) ((_version) >> UL(16))
20#define RMI_ABI_VERSION_GET_MINOR(_version) ((_version) & UL(0xFFFF))
Soby Mathewb4c6df42022-11-09 11:13:29 +000021
22#define SMC64_RMI_FID(_offset) SMC64_STD_FID(RMI, _offset)
23
24#define IS_SMC64_RMI_FID(_fid) IS_SMC64_STD_FAST_IN_RANGE(RMI, _fid)
25
Yousuf A0ec040d2022-10-31 12:30:57 +000026/* Command completed successfully. index is zero. */
27#define RMI_SUCCESS U(0)
28
29/*
30 * The value of a command input value caused the command to fail.
31 * Index is zero.
32 */
33#define RMI_ERROR_INPUT U(1)
34
35/*
36 * An attribute of a Realm does not match the expected value.
37 * index varies between usages.
38 */
39#define RMI_ERROR_REALM U(2)
40
41/*
42 * An attribute of a REC does not match the expected value.
43 * Index is zero.
44 */
45#define RMI_ERROR_REC U(3)
46
47/*
48 * An RTT walk terminated before reaching the target RTT level, or reached
49 * an RTTE with an unexpected value. index: RTT level at which the walk
50 * terminated
51 */
52#define RMI_ERROR_RTT U(4)
53
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +010054/* An attribute of a device does not match the expected value */
55#define RMI_ERROR_DEVICE U(5)
56
57/* The command is not supported */
58#define RMI_ERROR_NOT_SUPPORTED U(6)
59
60/* RTTE in an auxiliary RTT contained an unexpected value */
61#define RMI_ERROR_RTT_AUX U(7)
62
63/* Max number of RMI Status Errors. */
64#define RMI_ERROR_COUNT_MAX U(8)
Yousuf A0ec040d2022-10-31 12:30:57 +000065
Soby Mathewb4c6df42022-11-09 11:13:29 +000066/*
67 * The number of GPRs (starting from X0) that are
68 * configured by the host when a REC is created.
69 */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000070#define REC_CREATE_NR_GPRS U(8)
Soby Mathewb4c6df42022-11-09 11:13:29 +000071
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000072#define REC_PARAMS_FLAG_RUNNABLE (UL(1) << 0)
Soby Mathewb4c6df42022-11-09 11:13:29 +000073
74/*
75 * The number of GPRs (starting from X0) per voluntary exit context.
76 * Per SMCCC.
77 */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000078#define REC_EXIT_NR_GPRS U(31)
Soby Mathewb4c6df42022-11-09 11:13:29 +000079
80/* RmiHashAlgorithm type */
AlexeiFedorov6a4314e2023-10-20 15:40:14 +010081#define RMI_HASH_SHA_256 0U
82#define RMI_HASH_SHA_512 1U
Soby Mathewb4c6df42022-11-09 11:13:29 +000083
84/* Maximum number of Interrupt Controller List Registers */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000085#define REC_GIC_NUM_LRS U(16)
Soby Mathewb4c6df42022-11-09 11:13:29 +000086
Mate Toth-Pal0a8f37c2023-08-09 13:37:55 +020087#ifndef CBMC
Soby Mathewb4c6df42022-11-09 11:13:29 +000088/* Maximum number of auxiliary granules required for a REC */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000089#define MAX_REC_AUX_GRANULES U(16)
Mate Toth-Pal0a8f37c2023-08-09 13:37:55 +020090#else /* CBMC */
91#define MAX_REC_AUX_GRANULES U(1)
92#endif /* CBMC */
Soby Mathewb4c6df42022-11-09 11:13:29 +000093
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +010094/* Whether Host has completed emulation for an Emulatable Data Abort */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000095#define REC_ENTRY_FLAG_EMUL_MMIO (UL(1) << 0)
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +010096
97/* Whether to inject a Synchronous External Abort into Realm */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +000098#define REC_ENTRY_FLAG_INJECT_SEA (UL(1) << 1)
Soby Mathewb4c6df42022-11-09 11:13:29 +000099
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +0100100/* Whether to trap WFI/WFE execution by Realm */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +0000101#define REC_ENTRY_FLAG_TRAP_WFI (UL(1) << 2)
102#define REC_ENTRY_FLAG_TRAP_WFE (UL(1) << 3)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000103
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +0100104/* Host response to RIPAS change request */
105#define REC_ENTRY_FLAG_RIPAS_RESPONSE (UL(1) << 4)
106
Soby Mathewb4c6df42022-11-09 11:13:29 +0000107/*
108 * RmiRecExitReason represents the reason for a REC exit.
109 * This is returned to NS hosts via RMI_REC_ENTER::run_ptr.
110 */
Soby Mathewc9b6ecd2023-01-17 03:40:44 +0000111#define RMI_EXIT_SYNC U(0)
112#define RMI_EXIT_IRQ U(1)
113#define RMI_EXIT_FIQ U(2)
114#define RMI_EXIT_PSCI U(3)
115#define RMI_EXIT_RIPAS_CHANGE U(4)
116#define RMI_EXIT_HOST_CALL U(5)
117#define RMI_EXIT_SERROR U(6)
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100118#define RMI_EXIT_DEV_COMM U(7)
119#define RMI_EXIT_RTT_REQUEST U(8)
120#define RMI_EXIT_S2AP_CHANGE U(9)
121#define RMI_EXIT_VDEV_REQUEST U(10)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000122
123/* RmiRttEntryState represents the state of an RTTE */
AlexeiFedorovc53b1f72023-07-04 15:37:03 +0100124#define RMI_UNASSIGNED UL(0)
125#define RMI_ASSIGNED UL(1)
126#define RMI_TABLE UL(2)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000127
AlexeiFedorov7bb7a702023-01-17 17:04:14 +0000128/* RmiFeature enumerations */
AlexeiFedorovc09b1652023-04-04 15:41:37 +0100129#define RMI_FEATURE_FALSE UL(0)
130#define RMI_FEATURE_TRUE UL(1)
AlexeiFedorov7bb7a702023-01-17 17:04:14 +0000131
Yousuf Aa297b9b2022-10-13 13:54:21 +0100132/* RmiFeatureRegister0 format */
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100133#define RMI_FEATURE_REGISTER_0_INDEX UL(0)
Yousuf Aa297b9b2022-10-13 13:54:21 +0100134
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100135#define RMI_FEATURE_REGISTER_0_S2SZ_SHIFT UL(0)
136#define RMI_FEATURE_REGISTER_0_S2SZ_WIDTH UL(8)
Yousuf Aa297b9b2022-10-13 13:54:21 +0100137
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100138#define RMI_FEATURE_REGISTER_0_LPA2_SHIFT UL(8)
139#define RMI_FEATURE_REGISTER_0_LPA2_WIDTH UL(1)
Yousuf Aa297b9b2022-10-13 13:54:21 +0100140
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100141#define RMI_FEATURE_REGISTER_0_SVE_EN_SHIFT UL(9)
142#define RMI_FEATURE_REGISTER_0_SVE_EN_WIDTH UL(1)
Yousuf Aa297b9b2022-10-13 13:54:21 +0100143
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100144#define RMI_FEATURE_REGISTER_0_SVE_VL_SHIFT UL(10)
145#define RMI_FEATURE_REGISTER_0_SVE_VL_WIDTH UL(4)
Yousuf Aa297b9b2022-10-13 13:54:21 +0100146
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100147#define RMI_FEATURE_REGISTER_0_NUM_BPS_SHIFT UL(14)
148#define RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH UL(6)
AlexeiFedorov18002922023-04-06 10:19:51 +0100149
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100150#define RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT UL(20)
151#define RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH UL(6)
AlexeiFedorov18002922023-04-06 10:19:51 +0100152
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100153#define RMI_FEATURE_REGISTER_0_PMU_EN_SHIFT UL(26)
154#define RMI_FEATURE_REGISTER_0_PMU_EN_WIDTH UL(1)
AlexeiFedorov7bb7a702023-01-17 17:04:14 +0000155
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100156#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_SHIFT UL(27)
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100157#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_WIDTH UL(5)
AlexeiFedorov7bb7a702023-01-17 17:04:14 +0000158
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100159#define RMI_FEATURE_REGISTER_0_HASH_SHA_256_SHIFT UL(32)
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100160#define RMI_FEATURE_REGISTER_0_HASH_SHA_256_WIDTH UL(1)
AlexeiFedorov18002922023-04-06 10:19:51 +0100161
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100162#define RMI_FEATURE_REGISTER_0_HASH_SHA_512_SHIFT UL(33)
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100163#define RMI_FEATURE_REGISTER_0_HASH_SHA_512_WIDTH UL(1)
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000164
AlexeiFedorov9baa1002024-08-05 16:02:19 +0100165#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS_SHIFT UL(34)
166#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS_WIDTH UL(4)
167
168#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER_SHIFT UL(38)
169#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER_WIDTH UL(4)
170
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100171#define RMI_FEATURE_REGISTER_0_DA_EN_SHIFT UL(42)
172#define RMI_FEATURE_REGISTER_0_DA_EN_WIDTH UL(1)
173
174#define RMI_FEATURE_REGISTER_0_PLANE_RTT_SHIFT UL(43)
175#define RMI_FEATURE_REGISTER_0_PLANE_RTT_WIDTH UL(2)
176
177#define RMI_FEATURE_REGISTER_0_MAX_NUM_AUX_PLANES_SHIFT UL(45)
178#define RMI_FEATURE_REGISTER_0_MAX_NUM_AUX_PLANES_WIDTH UL(4)
179
AlexeiFedorovc53b1f72023-07-04 15:37:03 +0100180/* The RmiRipas enumeration represents realm IPA state */
181
182/* Address where no Realm resources are mapped */
183#define RMI_EMPTY UL(0)
184
185/* Address where private code or data owned by the Realm is mapped */
186#define RMI_RAM UL(1)
187
188/* Address which is inaccessible to the Realm due to an action taken by the Host */
189#define RMI_DESTROYED UL(2)
Yousuf A62808152022-10-31 10:35:42 +0000190
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100191/* Address where MMIO of an assigned Realm device is mapped. */
192#define RMI_IO UL(3)
193
AlexeiFedorov4d4e7342023-06-12 12:10:06 +0100194/* RmiPmuOverflowStatus enumeration representing PMU overflow status */
195#define RMI_PMU_OVERFLOW_NOT_ACTIVE U(0)
196#define RMI_PMU_OVERFLOW_ACTIVE U(1)
197
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +0100198/*
199 * RmiResponse enumeration represents whether the Host accepted
200 * or rejected a Realm request
201 */
AlexeiFedorov6a4314e2023-10-20 15:40:14 +0100202#define RMI_ACCEPT 0U
203#define RMI_REJECT 1U
AlexeiFedorov9b29c6b2023-09-12 17:09:50 +0100204
AlexeiFedorov2cc6cee2023-10-09 16:19:05 +0100205/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100206 * FID: 0xC4000150
207 *
AlexeiFedorov2cc6cee2023-10-09 16:19:05 +0100208 * arg0: Requested interface version
209 *
210 * ret0: Command return status
211 * ret1: Lower implemented interface revision
212 * ret2: Higher implemented interface revision
213 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100214#define SMC_RMI_VERSION SMC64_RMI_FID(U(0x0))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000215
216/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100217 * FID: 0xC4000151
218 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000219 * arg0 == target granule address
220 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100221#define SMC_RMI_GRANULE_DELEGATE SMC64_RMI_FID(U(0x1))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000222
223/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100224 * FID: 0xC4000152
225 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000226 * arg0 == target granule address
227 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100228#define SMC_RMI_GRANULE_UNDELEGATE SMC64_RMI_FID(U(0x2))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000229
230/* RmiDataMeasureContent type */
AlexeiFedorov93f5ec52023-08-31 14:26:53 +0100231#define RMI_NO_MEASURE_CONTENT U(0)
232#define RMI_MEASURE_CONTENT U(1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000233
234/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100235 * FID: 0xC4000153
236 *
AlexeiFedorovac923c82023-04-06 15:12:04 +0100237 * arg0 == RD address
238 * arg1 == data address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000239 * arg2 == map address
240 * arg3 == SRC address
241 * arg4 == flags
242 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100243#define SMC_RMI_DATA_CREATE SMC64_RMI_FID(U(0x3))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000244
245/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100246 * FID: 0xC4000154
247 *
AlexeiFedorovac923c82023-04-06 15:12:04 +0100248 * arg0 == RD address
249 * arg1 == data address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000250 * arg2 == map address
251 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100252#define SMC_RMI_DATA_CREATE_UNKNOWN SMC64_RMI_FID(U(0x4))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000253
254/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100255 * FID: 0xC4000155
256 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000257 * arg0 == RD address
258 * arg1 == map address
AlexeiFedorove2002be2023-04-19 17:20:12 +0100259 *
260 * ret1 == Address(PA) of the DATA granule, if ret0 == RMI_SUCCESS.
261 * Otherwise, undefined.
262 * ret2 == Top of the non-live address region. Only valid
AlexeiFedorov697445b2023-04-25 15:27:57 +0100263 * if ret0 == RMI_SUCCESS or ret0 == (RMI_ERROR_RTT, x)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000264 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100265#define SMC_RMI_DATA_DESTROY SMC64_RMI_FID(U(0x5))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000266
267/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100268 * FID: 0xC4000156
269 */
270#define SMC_RMI_PDEV_AUX_COUNT SMC64_RMI_FID(U(0x6))
271
272/*
273 * FID: 0xC4000157
274 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000275 * arg0 == RD address
276 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100277#define SMC_RMI_REALM_ACTIVATE SMC64_RMI_FID(U(0x7))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000278
279/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100280 * FID: 0xC4000158
281 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000282 * arg0 == RD address
AlexeiFedorovac923c82023-04-06 15:12:04 +0100283 * arg1 == struct rmi_realm_params address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000284 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100285#define SMC_RMI_REALM_CREATE SMC64_RMI_FID(U(0x8))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000286
287/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100288 * FID: 0xC4000159
289 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000290 * arg0 == RD address
291 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100292#define SMC_RMI_REALM_DESTROY SMC64_RMI_FID(U(0x9))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000293
294/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100295 * FID: 0xC400015A
296 *
AlexeiFedorovac923c82023-04-06 15:12:04 +0100297 * arg0 == RD address
298 * arg1 == REC address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000299 * arg2 == struct rmm_rec address
300 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100301#define SMC_RMI_REC_CREATE SMC64_RMI_FID(U(0xA))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000302
303/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100304 * FID: 0xC400015B
305 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000306 * arg0 == REC address
307 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100308#define SMC_RMI_REC_DESTROY SMC64_RMI_FID(U(0xB))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000309
310/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100311 * FID: 0xC400015C
312 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000313 * arg0 == rec address
AlexeiFedorovac923c82023-04-06 15:12:04 +0100314 * arg1 == struct rec_run address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000315 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100316#define SMC_RMI_REC_ENTER SMC64_RMI_FID(U(0xC))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000317
318/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100319 * FID: 0xC400015D
320 *
AlexeiFedorovac923c82023-04-06 15:12:04 +0100321 * arg0 == RD address
322 * arg1 == RTT address
Soby Mathewb4c6df42022-11-09 11:13:29 +0000323 * arg2 == map address
324 * arg3 == level
325 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100326#define SMC_RMI_RTT_CREATE SMC64_RMI_FID(U(0xD))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000327
328/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100329 * FID: 0xC400015E
330 *
AlexeiFedorove2002be2023-04-19 17:20:12 +0100331 * arg0 == RD address
332 * arg1 == map address
333 * arg2 == level
334 *
335 * ret1 == Address (PA) of the RTT, if ret0 == RMI_SUCCESS
336 * Otherwise, undefined.
337 * ret2 == Top of the non-live address region. Only valid
AlexeiFedorov697445b2023-04-25 15:27:57 +0100338 * if ret0 == RMI_SUCCESS or ret0 == (RMI_ERROR_RTT, x)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000339 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100340#define SMC_RMI_RTT_DESTROY SMC64_RMI_FID(U(0xE))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000341
342/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100343 * FID: 0xC400015F
344 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000345 * arg0 == RD address
346 * arg1 == map address
347 * arg2 == level
348 * arg3 == s2tte
349 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100350#define SMC_RMI_RTT_MAP_UNPROTECTED SMC64_RMI_FID(U(0xF))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000351
352/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100353 * FID: 0xC4000160
354 */
355#define SMC_RMI_VDEV_AUX_COUNT SMC64_RMI_FID(U(0x10))
356
357/*
358 * FID: 0xC4000161
359 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000360 * arg0 == RD address
361 * arg1 == map address
362 * arg2 == level
AlexeiFedorov697445b2023-04-25 15:27:57 +0100363 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000364 * ret1 == level
365 * ret2 == s2tte type
366 * ret3 == s2tte
367 * ret4 == ripas
AlexeiFedorov697445b2023-04-25 15:27:57 +0100368 * if ret0 == RMI_SUCCESS, otherwise, undefined.
Soby Mathewb4c6df42022-11-09 11:13:29 +0000369 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100370#define SMC_RMI_RTT_READ_ENTRY SMC64_RMI_FID(U(0x11))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000371
372/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100373 * FID: 0xC4000162
374 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000375 * arg0 == RD address
376 * arg1 == map address
377 * arg2 == level
378 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100379#define SMC_RMI_RTT_UNMAP_UNPROTECTED SMC64_RMI_FID(U(0x12))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000380
381/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100382 * FID: 0xC4000164
383 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000384 * arg0 == calling rec address
385 * arg1 == target rec address
386 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100387#define SMC_RMI_PSCI_COMPLETE SMC64_RMI_FID(U(0x14))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000388
389/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100390 * FID: 0xC4000165
391 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000392 * arg0 == Feature register index
393 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100394#define SMC_RMI_FEATURES SMC64_RMI_FID(U(0x15))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000395
396/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100397 * FID: 0xC4000166
398 *
AlexeiFedorove2002be2023-04-19 17:20:12 +0100399 * arg0 == RD address
400 * arg1 == map address
401 * arg2 == level
402 *
403 * ret1 == Address(PA) of the RTT folded, if ret0 == RMI_SUCCESS
Soby Mathewb4c6df42022-11-09 11:13:29 +0000404 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100405#define SMC_RMI_RTT_FOLD SMC64_RMI_FID(U(0x16))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000406
407/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100408 * FID: 0xC4000167
409 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000410 * arg0 == RD address
411 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100412#define SMC_RMI_REC_AUX_COUNT SMC64_RMI_FID(U(0x17))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000413
414/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100415 * FID: 0xC4000168
416 *
AlexeiFedorovac923c82023-04-06 15:12:04 +0100417 * arg0 == RD address
AlexeiFedorov960d1612023-04-25 13:23:39 +0100418 * arg1 == start address
419 * arg2 == end address
420 *
421 * ret1 == Top of the address range where the RIPAS was updated,
422 * if ret0 == RMI_SUCCESS
Soby Mathewb4c6df42022-11-09 11:13:29 +0000423 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100424#define SMC_RMI_RTT_INIT_RIPAS SMC64_RMI_FID(U(0x18))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000425
426/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100427 * FID: 0xC4000169
428 *
Soby Mathewb4c6df42022-11-09 11:13:29 +0000429 * arg0 == RD address
430 * arg1 == REC address
AlexeiFedorov5cf35ba2023-04-25 10:02:20 +0100431 * arg2 == start address
432 * arg3 == end address
433 *
434 * ret1 == Top of the address range where the RIPAS was updated,
435 * if ret0 == RMI_SUCCESS
Soby Mathewb4c6df42022-11-09 11:13:29 +0000436 */
Arunachalam Ganapathy807dda82024-05-03 14:22:43 +0100437#define SMC_RMI_RTT_SET_RIPAS SMC64_RMI_FID(U(0x19))
Soby Mathewb4c6df42022-11-09 11:13:29 +0000438
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100439/*
440 * TODO: Update the documentation of new FIDs once the 1.1 spec has stabilized.
441 */
442
443/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100444 * FID: 0xC4000172
445 */
446#define SMC_RMI_DEV_MAP SMC64_RMI_FID(U(0x22))
447
448/*
449 * FID: 0xC4000173
450 */
451#define SMC_RMI_DEV_UNMAP SMC64_RMI_FID(U(0x23))
452
453/*
454 * FID: 0xC4000174
455 */
456#define SMC_RMI_PDEV_ABORT SMC64_RMI_FID(U(0x24))
457
458/*
459 * FID: 0xC4000175
460 */
461#define SMC_RMI_PDEV_COMMUNICATE SMC64_RMI_FID(U(0x25))
462
463/*
464 * FID: 0xC4000176
465 */
466#define SMC_RMI_PDEV_CREATE SMC64_RMI_FID(U(0x26))
467
468/*
469 * FID: 0xC4000177
470 */
471#define SMC_RMI_PDEV_DESTROY SMC64_RMI_FID(U(0x27))
472
473/*
474 * FID: 0xC4000178
475 */
476#define SMC_RMI_PDEV_GET_STATE SMC64_RMI_FID(U(0x28))
477
478/*
479 * FID: 0xC4000179
480 */
481#define SMC_RMI_PDEV_IDE_RESET SMC64_RMI_FID(U(0x29))
482
483/*
484 * FID: 0xC400017A
485 */
486#define SMC_RMI_PDEV_NOTIFY SMC64_RMI_FID(U(0x2A))
487
488/*
489 * FID: 0xC400017B
490 */
491#define SMC_RMI_PDEV_SET_PUBKEY SMC64_RMI_FID(U(0x2B))
492
493/*
494 * FID: 0xC400017C
495 */
496#define SMC_RMI_PDEV_STOP SMC64_RMI_FID(U(0x2C))
497
498/*
499 * FID: 0xC400017D
500 */
501#define SMC_RMI_RTT_AUX_CREATE SMC64_RMI_FID(U(0x2D))
502
503/*
504 * FID: 0xC400017E
505 */
506#define SMC_RMI_RTT_AUX_DESTROY SMC64_RMI_FID(U(0x2E))
507
508/*
509 * FID: 0xC400017F
510 */
511#define SMC_RMI_RTT_AUX_FOLD SMC64_RMI_FID(U(0x2F))
512
513/*
514 * FID: 0xC4000180
515 */
516#define SMC_RMI_RTT_AUX_MAP_PROTECTED SMC64_RMI_FID(U(0x30))
517
518/*
519 * FID: 0xC4000181
520 */
521#define SMC_RMI_RTT_AUX_MAP_UNPROTECTED SMC64_RMI_FID(U(0x31))
522
523/*
524 * FID: 0xC4000183
525 */
526#define SMC_RMI_RTT_AUX_UNMAP_PROTECTED SMC64_RMI_FID(U(0x33))
527
528/*
529 * FID: 0xC4000184
530 */
531#define SMC_RMI_RTT_AUX_UNMAP_UNPROTECTED SMC64_RMI_FID(U(0x34))
532
533/*
534 * FID: 0xC4000185
535 */
536#define SMC_RMI_VDEV_ABORT SMC64_RMI_FID(U(0x35))
537
538/*
539 * FID: 0xC4000186
540 */
541#define SMC_RMI_VDEV_COMMUNICATE SMC64_RMI_FID(U(0x36))
542
543/*
544 * FID: 0xC4000187
545 */
546#define SMC_RMI_VDEV_CREATE SMC64_RMI_FID(U(0x37))
547
548/*
549 * FID: 0xC4000188
550 */
551#define SMC_RMI_VDEV_DESTROY SMC64_RMI_FID(U(0x38))
552
553/*
554 * FID: 0xC4000189
555 */
556#define SMC_RMI_VDEV_GET_STATE SMC64_RMI_FID(U(0x39))
557
558/*
559 * FID: 0xC400018A
560 */
561#define SMC_RMI_VDEV_STOP SMC64_RMI_FID(U(0x3A))
562
563/*
564 * FID: 0xC400018B
565 */
566#define SMC_RMI_RTT_SET_S2AP SMC64_RMI_FID(U(0x3B))
567
568/*
569 * FID: 0xC400018C
570 */
571#define SMC_RMI_MEC_SET_SHARED SMC64_RMI_FID(U(0x3C))
572
573/*
574 * FID: 0xC400018D
575 */
576#define SMC_RMI_MEC_SET_PRIVATE SMC64_RMI_FID(U(0x3D))
577
578/*
579 * FID: 0xC400018E
580 */
581#define SMC_RMI_VDEV_COMPLETE SMC64_RMI_FID(U(0x3E))
582
Soby Mathewb4c6df42022-11-09 11:13:29 +0000583/* Size of Realm Personalization Value */
Mate Toth-Palc751c0d2023-11-14 16:56:41 +0100584#ifndef CBMC
Soby Mathewb4c6df42022-11-09 11:13:29 +0000585#define RPV_SIZE 64
Mate Toth-Palc751c0d2023-11-14 16:56:41 +0100586#else
587/*
588 * Small RPV size so that `struct rd` fits in the reduced sized granule defined
589 * for CBMC
590 */
591#define RPV_SIZE 1
592#endif
Soby Mathewb4c6df42022-11-09 11:13:29 +0000593
AlexeiFedorov18002922023-04-06 10:19:51 +0100594/* RmiRealmFlags format */
595#define RMI_REALM_FLAGS_LPA2_SHIFT UL(0)
596#define RMI_REALM_FLAGS_LPA2_WIDTH UL(1)
597
598#define RMI_REALM_FLAGS_SVE_SHIFT UL(1)
599#define RMI_REALM_FLAGS_SVE_WIDTH UL(1)
600
601#define RMI_REALM_FLAGS_PMU_SHIFT UL(2)
602#define RMI_REALM_FLAGS_PMU_WIDTH UL(1)
603
Soby Mathewc9b6ecd2023-01-17 03:40:44 +0000604#ifndef __ASSEMBLER__
Soby Mathewb4c6df42022-11-09 11:13:29 +0000605/*
Soby Mathewc414f2a2023-01-17 02:50:17 +0000606 * Defines member of structure and reserves space
607 * for the next member with specified offset.
608 */
609#define SET_MEMBER_RMI SET_MEMBER
610
611/*
Soby Mathewb4c6df42022-11-09 11:13:29 +0000612 * The Realm attribute parameters are shared by the Host via
613 * RMI_REALM_CREATE::params_ptr. The values can be observed or modified
614 * either by the Host or by the Realm.
615 */
616struct rmi_realm_params {
AlexeiFedorov18002922023-04-06 10:19:51 +0100617 /* Flags */
618 SET_MEMBER_RMI(unsigned long flags, 0, 0x8); /* Offset 0 */
619 /* Requested IPA width */
620 SET_MEMBER_RMI(unsigned int s2sz, 0x8, 0x10); /* 0x8 */
621 /* Requested SVE vector length */
622 SET_MEMBER_RMI(unsigned int sve_vl, 0x10, 0x18); /* 0x10 */
623 /* Requested number of breakpoints */
624 SET_MEMBER_RMI(unsigned int num_bps, 0x18, 0x20); /* 0x18 */
625 /* Requested number of watchpoints */
626 SET_MEMBER_RMI(unsigned int num_wps, 0x20, 0x28); /* 0x20 */
627 /* Requested number of PMU counters */
628 SET_MEMBER_RMI(unsigned int pmu_num_ctrs, 0x28, 0x30); /* 0x28 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000629 /* Measurement algorithm */
AlexeiFedorov56e1a8e2023-09-01 17:06:13 +0100630 SET_MEMBER_RMI(unsigned char algorithm, 0x30, 0x400); /* 0x30 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000631 /* Realm Personalization Value */
AlexeiFedorov18002922023-04-06 10:19:51 +0100632 SET_MEMBER_RMI(unsigned char rpv[RPV_SIZE], 0x400, 0x800); /* 0x400 */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000633 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000634 /* Virtual Machine Identifier */
635 unsigned short vmid; /* 0x800 */
636 /* Realm Translation Table base */
637 unsigned long rtt_base; /* 0x808 */
638 /* RTT starting level */
639 long rtt_level_start; /* 0x810 */
640 /* Number of starting level RTTs */
641 unsigned int rtt_num_start; /* 0x818 */
642 }, 0x800, 0x1000);
643};
644
Soby Mathewb4c6df42022-11-09 11:13:29 +0000645/*
646 * The REC attribute parameters are shared by the Host via
AlexeiFedorov70115132023-11-27 13:04:26 +0000647 * RMI_REC_CREATE::params_ptr. The values can be observed or modified
Soby Mathewb4c6df42022-11-09 11:13:29 +0000648 * either by the Host or by the Realm which owns the REC.
649 */
650struct rmi_rec_params {
651 /* Flags */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000652 SET_MEMBER_RMI(unsigned long flags, 0, 0x100); /* Offset 0 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000653 /* MPIDR of the REC */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000654 SET_MEMBER_RMI(unsigned long mpidr, 0x100, 0x200); /* 0x100 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000655 /* Program counter */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000656 SET_MEMBER_RMI(unsigned long pc, 0x200, 0x300); /* 0x200 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000657 /* General-purpose registers */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000658 SET_MEMBER_RMI(unsigned long gprs[REC_CREATE_NR_GPRS], 0x300, 0x800); /* 0x300 */
659 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000660 /* Number of auxiliary Granules */
661 unsigned long num_aux; /* 0x800 */
662 /* Addresses of auxiliary Granules */
663 unsigned long aux[MAX_REC_AUX_GRANULES];/* 0x808 */
664 }, 0x800, 0x1000);
665};
666
Soby Mathewb4c6df42022-11-09 11:13:29 +0000667/*
668 * Structure contains data passed from the Host to the RMM on REC entry
669 */
AlexeiFedorov52912a62023-07-24 12:28:47 +0100670struct rmi_rec_enter {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000671 /* Flags */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000672 SET_MEMBER_RMI(unsigned long flags, 0, 0x200); /* Offset 0 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000673 /* General-purpose registers */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000674 SET_MEMBER_RMI(unsigned long gprs[REC_EXIT_NR_GPRS], 0x200, 0x300); /* 0x200 */
675 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000676 /* GICv3 Hypervisor Control Register */
677 unsigned long gicv3_hcr; /* 0x300 */
678 /* GICv3 List Registers */
679 unsigned long gicv3_lrs[REC_GIC_NUM_LRS]; /* 0x308 */
680 }, 0x300, 0x800);
681};
682
Soby Mathewb4c6df42022-11-09 11:13:29 +0000683/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100684 * RmiVdevAction
685 * Represents realm action which triggered REC exit due to device communication.
686 * Width: 8 bits
687 */
688#define RMI_VDEV_ACTION_GET_INTERFACE_REPORT U(0)
689#define RMI_VDEV_ACTION_GET_MEASUREMENTS U(1)
690#define RMI_VDEV_ACTION_LOCK U(2)
691#define RMI_VDEV_ACTION_START U(3)
692#define RMI_VDEV_ACTION_STOP U(4)
693
694/*
695 * RmiRecExitFlags
696 * Fieldset contains flags provided by the RMM during REC exit.
697 * Width: 64 bits
698 */
699#define RMI_REC_EXIT_FLAGS_RIPAS_DEV_SHARED_SHIFT U(0)
700#define RMI_REC_EXIT_FLAGS_RIPAS_DEV_SHARED_WIDTH U(1)
701
702/*
Soby Mathewb4c6df42022-11-09 11:13:29 +0000703 * Structure contains data passed from the RMM to the Host on REC exit
704 */
705struct rmi_rec_exit {
706 /* Exit reason */
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100707 SET_MEMBER_RMI(unsigned long exit_reason, 0, 0x8);/* Offset 0 */
708 /* RmiRecExitFlags: Flags */
709 SET_MEMBER_RMI(unsigned long flags, 0x8, 0x100);/* 0x8 */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000710 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000711 /* Exception Syndrome Register */
712 unsigned long esr; /* 0x100 */
713 /* Fault Address Register */
714 unsigned long far; /* 0x108 */
715 /* Hypervisor IPA Fault Address register */
716 unsigned long hpfar; /* 0x110 */
717 }, 0x100, 0x200);
718 /* General-purpose registers */
Soby Mathewc414f2a2023-01-17 02:50:17 +0000719 SET_MEMBER_RMI(unsigned long gprs[REC_EXIT_NR_GPRS], 0x200, 0x300); /* 0x200 */
720 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000721 /* GICv3 Hypervisor Control Register */
722 unsigned long gicv3_hcr; /* 0x300 */
723 /* GICv3 List Registers */
724 unsigned long gicv3_lrs[REC_GIC_NUM_LRS]; /* 0x308 */
725 /* GICv3 Maintenance Interrupt State Register */
726 unsigned long gicv3_misr; /* 0x388 */
727 /* GICv3 Virtual Machine Control Register */
728 unsigned long gicv3_vmcr; /* 0x390 */
729 }, 0x300, 0x400);
Soby Mathewc414f2a2023-01-17 02:50:17 +0000730 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000731 /* Counter-timer Physical Timer Control Register */
732 unsigned long cntp_ctl; /* 0x400 */
733 /* Counter-timer Physical Timer CompareValue Register */
734 unsigned long cntp_cval; /* 0x408 */
735 /* Counter-timer Virtual Timer Control Register */
736 unsigned long cntv_ctl; /* 0x410 */
737 /* Counter-timer Virtual Timer CompareValue Register */
738 unsigned long cntv_cval; /* 0x418 */
739 }, 0x400, 0x500);
Soby Mathewc414f2a2023-01-17 02:50:17 +0000740 SET_MEMBER_RMI(struct {
Soby Mathewb4c6df42022-11-09 11:13:29 +0000741 /* Base address of pending RIPAS change */
742 unsigned long ripas_base; /* 0x500 */
743 /* Size of pending RIPAS change */
AlexeiFedorovccce3ad2023-04-28 18:29:47 +0100744 unsigned long ripas_top; /* 0x508 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000745 /* RIPAS value of pending RIPAS change */
746 unsigned char ripas_value; /* 0x510 */
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100747 /*
748 * Base PA of device memory region, if RIPAS change is
749 * pending due to execution of
750 * RSI_RDEV_VALIDATE_MAPPING
751 */
752 unsigned long ripas_dev_pa; /* 0x518 */
753 /* Base addr of target region for pending S2AP change */
754 unsigned long s2ap_base; /* 0x520 */
755 /* Top addr of target region for pending S2AP change */
756 unsigned long s2ap_top; /* 0x528 */
757 /* Virtual device ID */
758 unsigned long vdev_id; /* 0x530 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000759 }, 0x500, 0x600);
760 /* Host call immediate value */
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100761 SET_MEMBER_RMI(unsigned int imm, 0x600, 0x608); /* 0x600 */
762 /* UInt64: Plane Index */
763 SET_MEMBER_RMI(unsigned long plane, 0x608, 0x610); /* 0x608 */
764 /* Address: VDEV which triggered REC exit due to device communication */
765 SET_MEMBER_RMI(unsigned long vdev, 0x610, 0x618); /* 0x610 */
766 /* RmiVdevAction: Action which triggered REC exit due to device comm */
767 SET_MEMBER_RMI(unsigned char vdev_action, 0x618, 0x700); /* 0x618 */
AlexeiFedorov4d4e7342023-06-12 12:10:06 +0100768 /* PMU overflow status */
769 SET_MEMBER_RMI(unsigned long pmu_ovf_status, 0x700, 0x800); /* 0x700 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000770};
771
Soby Mathewb4c6df42022-11-09 11:13:29 +0000772/*
773 * Structure contains shared information between RMM and Host
774 * during REC entry and REC exit.
775 */
776struct rmi_rec_run {
777 /* Entry information */
AlexeiFedorov52912a62023-07-24 12:28:47 +0100778 SET_MEMBER_RMI(struct rmi_rec_enter enter, 0, 0x800); /* Offset 0 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000779 /* Exit information */
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000780 SET_MEMBER_RMI(struct rmi_rec_exit exit, 0x800, 0x1000);/* 0x800 */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000781};
782
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100783/*
784 * RmiPdevProtConfig
785 * Represents the protection between system and device.
786 * Width: 2 bits
787 */
788#define RMI_PDEV_IOCOH_E2E_IDE U(0)
789#define RMI_PDEV_IOCOH_E2E_SYS U(1)
790#define RMI_PDEV_FCOH_E2E_IDE U(2)
791#define RMI_PDEV_FCOH_E2E_SYS U(3)
792
793/*
794 * RmiPdevFlags
795 * Fieldset contains flags provided by the Host during PDEV creation
796 * Width: 64 bits
797 */
798/* RmiPdevProtConfig Bits 1:0 */
799#define RMI_PDEV_FLAGS_PROT_CONFIG_SHIFT UL(0)
800#define RMI_PDEV_FLAGS_PROT_CONFIG_WIDTH UL(2)
801
802/*
803 * RmiPdevEvent
804 * Represents physical device event.
805 * Width: 8 bits
806 */
807#define RMI_PDEV_EVENT_IDE_KEY_REFRESH U(0)
808
809/*
810 * RmiPdevState
811 * Represents the state of a PDEV
812 * Width: 8 bits
813 */
814#define RMI_PDEV_STATE_NEW U(0)
815#define RMI_PDEV_STATE_NEEDS_KEY U(1)
816#define RMI_PDEV_STATE_HAS_KEY U(2)
817#define RMI_PDEV_STATE_READY U(3)
818#define RMI_PDEV_STATE_COMMUNICATING U(4)
819#define RMI_PDEV_STATE_STOPPING U(5)
820#define RMI_PDEV_STATE_STOPPED U(6)
821#define RMI_PDEV_STATE_ERROR U(7)
822
823/*
824 * RmiSignatureAlgorithm
825 * Represents signature algorithm used in PDEV set key RMI call.
826 * Width: 8 bits
827 */
828#define RMI_SIGNATURE_ALGORITHM_RSASSA_3072 U(0)
829#define RMI_SIGNATURE_ALGORITHM_ECDSA_P256 U(1)
830#define RMI_SIGNATURE_ALGORITHM_ECDSA_P384 U(2)
831
832/*
Arunachalam Ganapathyf36187e2024-05-07 11:49:33 +0100833 * RmiDevCommEnterStatus (Name in Spec RmiDevCommStatus)
834 * Represents status passed from the Host to the RMM during device communication.
835 * Width: 8 bits
836 */
837#define RMI_DEV_COMM_ENTER_STATUS_SUCCESS U(0)
838#define RMI_DEV_COMM_ENTER_STATUS_ERROR U(1)
839#define RMI_DEV_COMM_ENTER_STATUS_NONE U(2)
840
841/*
842 * RmiDevCommEnter
843 * This structure contains data passed from the Host to the RMM during device
844 * communication.
845 * Width: 256 (0x100) bytes
846 */
847struct rmi_dev_comm_enter {
848 /* RmiDevCommEnterStatus: Status of device transaction */
849 SET_MEMBER_RMI(unsigned char status, 0, 0x8);
850 /* Address: Address of request buffer */
851 SET_MEMBER_RMI(unsigned long req_addr, 0x8, 0x10);
852 /* Address: Address of response buffer */
853 SET_MEMBER_RMI(unsigned long resp_addr, 0x10, 0x18);
854 /* UInt64: Amount of valid data in response buffer in bytes */
855 SET_MEMBER_RMI(unsigned long resp_len, 0x18, 0x100);
856};
857
858/*
859 * RmiDevCommExitFlags
860 * Fieldset contains flags provided by the RMM during a device transaction.
861 * Width: 64 bits
862 */
863#define RMI_DEV_COMM_EXIT_FLAGS_CACHE_SHIFT UL(0)
864#define RMI_DEV_COMM_EXIT_FLAGS_CACHE_WIDTH UL(1)
865#define RMI_DEV_COMM_EXIT_FLAGS_SEND_SHIFT UL(1)
866#define RMI_DEV_COMM_EXIT_FLAGS_SEND_WIDTH UL(1)
867#define RMI_DEV_COMM_EXIT_FLAGS_WAIT_SHIFT UL(2)
868#define RMI_DEV_COMM_EXIT_FLAGS_WAIT_WIDTH UL(1)
869#define RMI_DEV_COMM_EXIT_FLAGS_MULTI_SHIFT UL(3)
870#define RMI_DEV_COMM_EXIT_FLAGS_MULTI_WIDTH UL(1)
871
872/*
873 * RmiDevCommProtocol
874 * Represents the protocol used for device communication.
875 * Width: 8 bits
876 */
877#define RMI_DEV_COMM_PROTOCOL_SPDM U(0)
878#define RMI_DEV_COMM_PROTOCOL_SECURE_SPDM U(1)
879
880/*
881 * RmiDevCommExit
882 * This structure contains data passed from the RMM to the Host during device
883 * communication.
884 * Width: 256 (0x100) bytes.
885 */
886struct rmi_dev_comm_exit {
887 /*
888 * RmiDevCommExitFlags: Flags indicating the actions the host is
889 * requested to perform
890 */
891 SET_MEMBER_RMI(unsigned long flags, 0, 0x8);
892 /*
893 * UInt64: If flags.cache is true, offset in the device response buffer
894 * to the start of data to be cached in bytes.
895 */
896 SET_MEMBER_RMI(unsigned long cache_offset, 0x8, 0x10);
897 /*
898 * UInt64: If flags.cache is true, amount of data to be cached in
899 * bytes.
900 */
901 SET_MEMBER_RMI(unsigned long cache_len, 0x10, 0x18);
902 /* RmiDevCommProtocol: If flags.send is true, type of request */
903 SET_MEMBER_RMI(unsigned char protocol, 0x18, 0x20);
904 /*
905 * UInt64: If flags.send is true, amount of valid data in request buffer
906 * in bytes
907 */
908 SET_MEMBER_RMI(unsigned long req_len, 0x20, 0x28);
909 /*
910 * UInt64: If flags.wait is true, amount of time to wait for device
911 * response in milliseconds
912 */
913 SET_MEMBER_RMI(unsigned long timeout, 0x28, 0x100);
914};
915
916/*
917 * RmiDevCommData
918 * This structure contains data structure shared between Host and RMM for
919 * device communication.
920 * Width: 4096 (0x1000) bytes.
921 */
922#define RMI_DEV_COMM_ENTER_OFFSET 0x0
923#define RMI_DEV_COMM_EXIT_OFFSET 0x800
924#define RMI_DEV_COMM_DATA_SIZE 0x1000
925struct rmi_dev_comm_data {
926 /* RmiDevCommEnter: Entry information */
927 SET_MEMBER_RMI(struct rmi_dev_comm_enter enter,
928 RMI_DEV_COMM_ENTER_OFFSET, RMI_DEV_COMM_EXIT_OFFSET);
929 /* RmiDevCommExit: Exit information */
930 SET_MEMBER_RMI(struct rmi_dev_comm_exit exit,
931 RMI_DEV_COMM_EXIT_OFFSET, RMI_DEV_COMM_DATA_SIZE);
932};
933
934/*
935 * RmiAddressRange
936 * This structure contains base and top value of an address range.
937 * Width: 16 (0x10) bytes.
938 */
939struct rmi_address_range {
940 /* Address: Base of the address range (inclusive) */
941 SET_MEMBER_RMI(unsigned long base, 0, 0x8);
942 /* Address: Top of the address range (exclusive) */
943 SET_MEMBER_RMI(unsigned long top, 0x8, 0x10);
944};
945
946/*
947 * Maximum number of aux granules paramenter passed in rmi_pdev_params during
948 * PDEV createto PDEV create
949 */
950#define PDEV_PARAM_AUX_GRANULES_MAX U(32)
951
952/*
953 * Maximum number of IO coherent RmiAddressRange parameter passed in
954 * rmi_pdev_params during PDEV create
955 */
956#define PDEV_PARAM_IOCOH_ADDR_RANGE_MAX U(16)
957
958/*
959 * Maximum number of fully coherent RmiAddressRange parameter passed in
960 * rmi_pdev_params during PDEV create
961 */
962#define PDEV_PARAM_FCOH_ADDR_RANGE_MAX U(4)
963
964/*
965 * RmiPdevParams
966 * This structure contains parameters provided by Host during PDEV creation.
967 * Width: 4096 (0x1000) bytes.
968 */
969struct rmi_pdev_params {
970 /* RmiPdevFlags: Flags */
971 SET_MEMBER_RMI(unsigned long flags, 0, 0x8);
972 /* Bits64: Physical device identifier */
973 SET_MEMBER_RMI(unsigned long pdev_id, 0x8, 0x10);
974 /* Bits16: Segment ID */
975 SET_MEMBER_RMI(unsigned short segment_id, 0x10, 0x18);
976 /* Bits16: Root Port identifier */
977 SET_MEMBER_RMI(unsigned short root_id, 0x18, 0x20);
978 /* UInt64: Certificate identifier */
979 SET_MEMBER_RMI(unsigned long cert_id, 0x20, 0x28);
980 /* UInt64: Base requester ID range (inclusive) */
981 SET_MEMBER_RMI(unsigned long rid_base, 0x28, 0x30);
982 /* UInt64: Top of requester ID range (exclusive) */
983 SET_MEMBER_RMI(unsigned long rid_top, 0x30, 0x38);
984 /* RmiHashAlgorithm: Algorithm used to generate device digests */
985 SET_MEMBER_RMI(unsigned char hash_algo, 0x38, 0x40);
986 /* UInt64: Number of auxiliary granules */
987 SET_MEMBER_RMI(unsigned long num_aux, 0x40, 0x48);
988 /* UInt64: IDE stream identifier */
989 SET_MEMBER_RMI(unsigned long ide_sid, 0x48, 0x50);
990 /* UInt64: Number of IO-coherent address ranges */
991 SET_MEMBER_RMI(unsigned long iocoh_num_addr_range, 0x50, 0x58);
992 /* UInt64: Number of fully-coherent address ranges */
993 SET_MEMBER_RMI(unsigned long fcoh_num_addr_range, 0x58, 0x100);
994
995 /* Address: Addresses of auxiliary granules */
996 SET_MEMBER_RMI(unsigned long aux[PDEV_PARAM_AUX_GRANULES_MAX], 0x100,
997 0x200);
998 /* RmiAddressRange: IO-coherent address range */
999 SET_MEMBER_RMI(struct rmi_address_range
1000 iocoh_addr_range[PDEV_PARAM_IOCOH_ADDR_RANGE_MAX],
1001 0x200, 0x300);
1002 /* RmiAddressRange: Fully coherent address range */
1003 SET_MEMBER_RMI(struct rmi_address_range
1004 fcoh_addr_range[PDEV_PARAM_FCOH_ADDR_RANGE_MAX],
1005 0x300, 0x1000);
1006};
1007
1008/*
1009 * RmiVdevFlags
1010 * Fieldset contains flags provided by the Host during VDEV creation.
1011 * Width: 64 bits
1012 */
1013#define RMI_VDEV_FLAGS_RES0_SHIFT UL(0)
1014#define RMI_VDEV_FLAGS_RES0_WIDTH UL(63)
1015
1016/*
1017 * RmiVdevState
1018 * Represents the state of the VDEV
1019 * Width: 8 bits
1020 */
1021#define RMI_VDEV_STATE_READY U(0)
1022#define RMI_VDEV_STATE_COMMUNICATING U(1)
1023#define RMI_VDEV_STATE_STOPPING U(2)
1024#define RMI_VDEV_STATE_STOPPED U(3)
1025#define RMI_VDEV_STATE_ERROR U(4)
1026
1027/* Maximum number of aux granules paramenter passed to VDEV create */
1028#define VDEV_PARAM_AUX_GRANULES_MAX U(32)
1029
1030/*
1031 * RmiVdevParams
1032 * The RmiVdevParams structure contains parameters provided by the Host during
1033 * VDEV creation.
1034 * Width: 4096 (0x1000) bytes.
1035 */
1036struct rmi_vdev_params {
1037 /* RmiVdevFlags: Flags */
1038 SET_MEMBER_RMI(unsigned long flags, 0, 0x8);
1039 /* Bits64: Virtual device identifier */
1040 SET_MEMBER_RMI(unsigned long vdev_id, 0x8, 0x10);
1041 /* Bits64: TDI identifier */
1042 SET_MEMBER_RMI(unsigned long tdi_id, 0x10, 0x18);
1043 /* UInt64: Number of auxiliary granules */
1044 SET_MEMBER_RMI(unsigned long num_aux, 0x18, 0x100);
1045
1046 /* Address: Addresses of auxiliary granules */
1047 SET_MEMBER_RMI(unsigned long aux[VDEV_PARAM_AUX_GRANULES_MAX], 0x100,
1048 0x1000);
1049};
Arunachalam Ganapathy4003b3c2024-11-05 18:02:10 +00001050
1051/* Returns the higher supported RMI ABI revision */
1052unsigned long rmi_get_highest_supported_version(void);
Soby Mathewc9b6ecd2023-01-17 03:40:44 +00001053#endif /* __ASSEMBLER__ */
1054
Soby Mathewb4c6df42022-11-09 11:13:29 +00001055#endif /* SMC_RMI_H */