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review.trustedfirmware.org / TF-M / trusted-firmware-m.git / 90128b79d355f18e0d92359c41616ee1ac7fecbe / . / secure_fw / services / tfm_spm_db.inc
blob: 594e1f7eecfd21b25b763f9f357234a471ad9772 [file] [log] [blame]
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]1/*
2 * Copyright (c) 2019, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
9
10#ifndef __TFM_SPM_DB_INC__
11#define __TFM_SPM_DB_INC__
12
13#include "spm_api.h"
14
15/**************************************************************************/
16/** IRQ count per partition */
17/**************************************************************************/
18#define TFM_PARTITION_TFM_SP_STORAGE_IRQ_COUNT 0
19
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]20#define TFM_PARTITION_TFM_SP_ITS_IRQ_COUNT 0
21
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]22#ifdef TFM_PARTITION_AUDIT_LOG
23#define TFM_PARTITION_TFM_SP_AUDIT_LOG_IRQ_COUNT 0
24#endif /* TFM_PARTITION_AUDIT_LOG */
25
26#define TFM_PARTITION_TFM_SP_CRYPTO_IRQ_COUNT 0
27
28#ifdef TFM_PARTITION_PLATFORM
29#define TFM_PARTITION_TFM_SP_PLATFORM_IRQ_COUNT 0
30#endif /* TFM_PARTITION_PLATFORM */
31
32#define TFM_PARTITION_TFM_SP_INITIAL_ATTESTATION_IRQ_COUNT 0
33
34#ifdef TFM_PARTITION_TEST_CORE
35#define TFM_PARTITION_TFM_SP_CORE_TEST_IRQ_COUNT 0
36#endif /* TFM_PARTITION_TEST_CORE */
37
38#ifdef TFM_PARTITION_TEST_CORE
39#define TFM_PARTITION_TFM_SP_CORE_TEST_2_IRQ_COUNT 0
40#endif /* TFM_PARTITION_TEST_CORE */
41
42#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
43#define TFM_PARTITION_TFM_SP_SECURE_TEST_PARTITION_IRQ_COUNT 0
44#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
45
46#ifdef TFM_PARTITION_TEST_CORE_IPC
47#define TFM_PARTITION_TFM_SP_IPC_SERVICE_TEST_IRQ_COUNT 0
48#endif /* TFM_PARTITION_TEST_CORE_IPC */
49
50#ifdef TFM_PARTITION_TEST_CORE_IPC
51#define TFM_PARTITION_TFM_SP_IPC_CLIENT_TEST_IRQ_COUNT 0
52#endif /* TFM_PARTITION_TEST_CORE_IPC */
53
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]54#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]55#define TFM_PARTITION_TFM_IRQ_TEST_1_IRQ_COUNT 1
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]56#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]57
58/**************************************************************************/
59/** Declarations of partition init functions */
60/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]61#ifdef TFM_PSA_API
62extern psa_status_t tfm_nspm_thread_entry(void);
63#endif
64
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]65extern int32_t tfm_sst_req_mngr_init(void);
66
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]67extern int32_t tfm_its_req_mngr_init(void);
68
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]69#ifdef TFM_PARTITION_AUDIT_LOG
70extern int32_t audit_core_init(void);
71#endif /* TFM_PARTITION_AUDIT_LOG */
72
73extern int32_t tfm_crypto_init(void);
74
75#ifdef TFM_PARTITION_PLATFORM
76extern int32_t platform_sp_init(void);
77#endif /* TFM_PARTITION_PLATFORM */
78
79extern int32_t attest_partition_init(void);
80
81#ifdef TFM_PARTITION_TEST_CORE
82extern int32_t core_test_init(void);
83#endif /* TFM_PARTITION_TEST_CORE */
84
85#ifdef TFM_PARTITION_TEST_CORE
86extern int32_t core_test_2_init(void);
87#endif /* TFM_PARTITION_TEST_CORE */
88
89#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
90extern int32_t tfm_secure_client_service_init(void);
91#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
92
93#ifdef TFM_PARTITION_TEST_CORE_IPC
94extern int32_t ipc_service_test_main(void);
95#endif /* TFM_PARTITION_TEST_CORE_IPC */
96
97#ifdef TFM_PARTITION_TEST_CORE_IPC
98extern int32_t ipc_client_test_main(void);
99#endif /* TFM_PARTITION_TEST_CORE_IPC */
100
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]101#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]102extern int32_t tfm_irq_test_1_init(void);
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]103#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]104
105/**************************************************************************/
106/** Memory region declarations */
107/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]108#ifdef TFM_PSA_API
109REGION_DECLARE(Image$$, ARM_LIB_STACK, $$ZI$$Base);
110REGION_DECLARE(Image$$, ARM_LIB_STACK, $$ZI$$Limit);
111
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]112REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$Base);
113REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$Limit);
114REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$RO$$Base);
115REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$RO$$Limit);
116REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$RW$$Base);
117REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$RW$$Limit);
118REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$ZI$$Base);
119REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$ZI$$Limit);
120REGION_DECLARE(Image$$, TFM_SP_STORAGE, _STACK$$ZI$$Base);
121REGION_DECLARE(Image$$, TFM_SP_STORAGE, _STACK$$ZI$$Limit);
122
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]123REGION_DECLARE(Image$$, TFM_SP_ITS, $$Base);
124REGION_DECLARE(Image$$, TFM_SP_ITS, $$Limit);
125REGION_DECLARE(Image$$, TFM_SP_ITS, $$RO$$Base);
126REGION_DECLARE(Image$$, TFM_SP_ITS, $$RO$$Limit);
127REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$RW$$Base);
128REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$RW$$Limit);
129REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$ZI$$Base);
130REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$ZI$$Limit);
131REGION_DECLARE(Image$$, TFM_SP_ITS, _STACK$$ZI$$Base);
132REGION_DECLARE(Image$$, TFM_SP_ITS, _STACK$$ZI$$Limit);
133
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]134#ifdef TFM_PARTITION_AUDIT_LOG
135REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$Base);
136REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$Limit);
137REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$RO$$Base);
138REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$RO$$Limit);
139REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$RW$$Base);
140REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$RW$$Limit);
141REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$ZI$$Base);
142REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$ZI$$Limit);
143REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _STACK$$ZI$$Base);
144REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _STACK$$ZI$$Limit);
145#endif /* TFM_PARTITION_AUDIT_LOG */
146
147REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$Base);
148REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$Limit);
149REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$RO$$Base);
150REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$RO$$Limit);
151REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$RW$$Base);
152REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$RW$$Limit);
153REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$ZI$$Base);
154REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$ZI$$Limit);
155REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _STACK$$ZI$$Base);
156REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _STACK$$ZI$$Limit);
157
158#ifdef TFM_PARTITION_PLATFORM
159REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$Base);
160REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$Limit);
161REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$RO$$Base);
162REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$RO$$Limit);
163REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$RW$$Base);
164REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$RW$$Limit);
165REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$ZI$$Base);
166REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$ZI$$Limit);
167REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _STACK$$ZI$$Base);
168REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _STACK$$ZI$$Limit);
169#endif /* TFM_PARTITION_PLATFORM */
170
171REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$Base);
172REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$Limit);
173REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$RO$$Base);
174REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$RO$$Limit);
175REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Base);
176REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Limit);
177REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Base);
178REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Limit);
179REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Base);
180REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Limit);
181
182#ifdef TFM_PARTITION_TEST_CORE
183REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$Base);
184REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$Limit);
185REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$RO$$Base);
186REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$RO$$Limit);
187REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$RW$$Base);
188REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$RW$$Limit);
189REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$ZI$$Base);
190REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$ZI$$Limit);
191REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _STACK$$ZI$$Base);
192REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _STACK$$ZI$$Limit);
193#endif /* TFM_PARTITION_TEST_CORE */
194
195#ifdef TFM_PARTITION_TEST_CORE
196REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$Base);
197REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$Limit);
198REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$RO$$Base);
199REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$RO$$Limit);
200REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$RW$$Base);
201REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$RW$$Limit);
202REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$ZI$$Base);
203REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$ZI$$Limit);
204REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _STACK$$ZI$$Base);
205REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _STACK$$ZI$$Limit);
206#endif /* TFM_PARTITION_TEST_CORE */
207
208#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
209REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$Base);
210REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$Limit);
211REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$RO$$Base);
212REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$RO$$Limit);
213REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Base);
214REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Limit);
215REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Base);
216REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Limit);
217REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Base);
218REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Limit);
219#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
220
221#ifdef TFM_PARTITION_TEST_CORE_IPC
222REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$Base);
223REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$Limit);
224REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$RO$$Base);
225REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$RO$$Limit);
226REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Base);
227REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Limit);
228REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Base);
229REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Limit);
230REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Base);
231REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Limit);
232#endif /* TFM_PARTITION_TEST_CORE_IPC */
233
234#ifdef TFM_PARTITION_TEST_CORE_IPC
235REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$Base);
236REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$Limit);
237REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$RO$$Base);
238REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$RO$$Limit);
239REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Base);
240REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Limit);
241REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Base);
242REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Limit);
243REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Base);
244REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Limit);
245#endif /* TFM_PARTITION_TEST_CORE_IPC */
246
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]247#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]248REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$Base);
249REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$Limit);
250REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$RO$$Base);
251REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$RO$$Limit);
252REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$RW$$Base);
253REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$RW$$Limit);
254REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$ZI$$Base);
255REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$ZI$$Limit);
256REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _STACK$$ZI$$Base);
257REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _STACK$$ZI$$Limit);
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]258#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]259
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]260#endif /* defined(TFM_PSA_API) */
261
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]262#ifndef TFM_PSA_API
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]263/**************************************************************************/
264/** Context stacks for IRQ handling */
265/**************************************************************************/
266/* The max size of the context stack can be calculated as a function of the IRQ
267 * count of the secure partition:
268 *
269 * max_stack_size = intr_ctx_size + (IRQ_CNT * (intr_ctx_size + hndl_ctx_size))
270 *
271 * where:
272 * intr_ctx: Frame pushed when the partition is interrupted
273 * hndl_ctx: Frame pushed when the partition is handling an interrupt
274 */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]275static uint32_t ns_interrupt_ctx_stack[
276 sizeof(struct interrupted_ctx_stack_frame_t) / sizeof(uint32_t)];
277
278static uint32_t tfm_core_interrupt_ctx_stack[
279 sizeof(struct interrupted_ctx_stack_frame_t) / sizeof(uint32_t)];
280
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]281static uint32_t ctx_stack_TFM_SP_STORAGE[
282 (sizeof(struct interrupted_ctx_stack_frame_t) +
283 (TFM_PARTITION_TFM_SP_STORAGE_IRQ_COUNT) * (
284 sizeof(struct interrupted_ctx_stack_frame_t) +
285 sizeof(struct handler_ctx_stack_frame_t)
286 )) / sizeof(uint32_t)];
287
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]288static uint32_t ctx_stack_TFM_SP_ITS[
289 (sizeof(struct interrupted_ctx_stack_frame_t) +
290 (TFM_PARTITION_TFM_SP_ITS_IRQ_COUNT) * (
291 sizeof(struct interrupted_ctx_stack_frame_t) +
292 sizeof(struct handler_ctx_stack_frame_t)
293 )) / sizeof(uint32_t)];
294
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]295#ifdef TFM_PARTITION_AUDIT_LOG
296static uint32_t ctx_stack_TFM_SP_AUDIT_LOG[
297 (sizeof(struct interrupted_ctx_stack_frame_t) +
298 (TFM_PARTITION_TFM_SP_AUDIT_LOG_IRQ_COUNT) * (
299 sizeof(struct interrupted_ctx_stack_frame_t) +
300 sizeof(struct handler_ctx_stack_frame_t)
301 )) / sizeof(uint32_t)];
302#endif /* TFM_PARTITION_AUDIT_LOG */
303
304static uint32_t ctx_stack_TFM_SP_CRYPTO[
305 (sizeof(struct interrupted_ctx_stack_frame_t) +
306 (TFM_PARTITION_TFM_SP_CRYPTO_IRQ_COUNT) * (
307 sizeof(struct interrupted_ctx_stack_frame_t) +
308 sizeof(struct handler_ctx_stack_frame_t)
309 )) / sizeof(uint32_t)];
310
311#ifdef TFM_PARTITION_PLATFORM
312static uint32_t ctx_stack_TFM_SP_PLATFORM[
313 (sizeof(struct interrupted_ctx_stack_frame_t) +
314 (TFM_PARTITION_TFM_SP_PLATFORM_IRQ_COUNT) * (
315 sizeof(struct interrupted_ctx_stack_frame_t) +
316 sizeof(struct handler_ctx_stack_frame_t)
317 )) / sizeof(uint32_t)];
318#endif /* TFM_PARTITION_PLATFORM */
319
320static uint32_t ctx_stack_TFM_SP_INITIAL_ATTESTATION[
321 (sizeof(struct interrupted_ctx_stack_frame_t) +
322 (TFM_PARTITION_TFM_SP_INITIAL_ATTESTATION_IRQ_COUNT) * (
323 sizeof(struct interrupted_ctx_stack_frame_t) +
324 sizeof(struct handler_ctx_stack_frame_t)
325 )) / sizeof(uint32_t)];
326
327#ifdef TFM_PARTITION_TEST_CORE
328static uint32_t ctx_stack_TFM_SP_CORE_TEST[
329 (sizeof(struct interrupted_ctx_stack_frame_t) +
330 (TFM_PARTITION_TFM_SP_CORE_TEST_IRQ_COUNT) * (
331 sizeof(struct interrupted_ctx_stack_frame_t) +
332 sizeof(struct handler_ctx_stack_frame_t)
333 )) / sizeof(uint32_t)];
334#endif /* TFM_PARTITION_TEST_CORE */
335
336#ifdef TFM_PARTITION_TEST_CORE
337static uint32_t ctx_stack_TFM_SP_CORE_TEST_2[
338 (sizeof(struct interrupted_ctx_stack_frame_t) +
339 (TFM_PARTITION_TFM_SP_CORE_TEST_2_IRQ_COUNT) * (
340 sizeof(struct interrupted_ctx_stack_frame_t) +
341 sizeof(struct handler_ctx_stack_frame_t)
342 )) / sizeof(uint32_t)];
343#endif /* TFM_PARTITION_TEST_CORE */
344
345#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
346static uint32_t ctx_stack_TFM_SP_SECURE_TEST_PARTITION[
347 (sizeof(struct interrupted_ctx_stack_frame_t) +
348 (TFM_PARTITION_TFM_SP_SECURE_TEST_PARTITION_IRQ_COUNT) * (
349 sizeof(struct interrupted_ctx_stack_frame_t) +
350 sizeof(struct handler_ctx_stack_frame_t)
351 )) / sizeof(uint32_t)];
352#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
353
354#ifdef TFM_PARTITION_TEST_CORE_IPC
355static uint32_t ctx_stack_TFM_SP_IPC_SERVICE_TEST[
356 (sizeof(struct interrupted_ctx_stack_frame_t) +
357 (TFM_PARTITION_TFM_SP_IPC_SERVICE_TEST_IRQ_COUNT) * (
358 sizeof(struct interrupted_ctx_stack_frame_t) +
359 sizeof(struct handler_ctx_stack_frame_t)
360 )) / sizeof(uint32_t)];
361#endif /* TFM_PARTITION_TEST_CORE_IPC */
362
363#ifdef TFM_PARTITION_TEST_CORE_IPC
364static uint32_t ctx_stack_TFM_SP_IPC_CLIENT_TEST[
365 (sizeof(struct interrupted_ctx_stack_frame_t) +
366 (TFM_PARTITION_TFM_SP_IPC_CLIENT_TEST_IRQ_COUNT) * (
367 sizeof(struct interrupted_ctx_stack_frame_t) +
368 sizeof(struct handler_ctx_stack_frame_t)
369 )) / sizeof(uint32_t)];
370#endif /* TFM_PARTITION_TEST_CORE_IPC */
371
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]372#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]373static uint32_t ctx_stack_TFM_IRQ_TEST_1[
374 (sizeof(struct interrupted_ctx_stack_frame_t) +
375 (TFM_PARTITION_TFM_IRQ_TEST_1_IRQ_COUNT) * (
376 sizeof(struct interrupted_ctx_stack_frame_t) +
377 sizeof(struct handler_ctx_stack_frame_t)
378 )) / sizeof(uint32_t)];
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]379#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]380
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]381
382uint32_t *ctx_stack_list[] =
383{
384 ns_interrupt_ctx_stack,
385 tfm_core_interrupt_ctx_stack,
386 ctx_stack_TFM_SP_STORAGE,
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]387 ctx_stack_TFM_SP_ITS,
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]388#ifdef TFM_PARTITION_AUDIT_LOG
389 ctx_stack_TFM_SP_AUDIT_LOG,
390#endif /* TFM_PARTITION_AUDIT_LOG */
391 ctx_stack_TFM_SP_CRYPTO,
392#ifdef TFM_PARTITION_PLATFORM
393 ctx_stack_TFM_SP_PLATFORM,
394#endif /* TFM_PARTITION_PLATFORM */
395 ctx_stack_TFM_SP_INITIAL_ATTESTATION,
396#ifdef TFM_PARTITION_TEST_CORE
397 ctx_stack_TFM_SP_CORE_TEST,
398#endif /* TFM_PARTITION_TEST_CORE */
399#ifdef TFM_PARTITION_TEST_CORE
400 ctx_stack_TFM_SP_CORE_TEST_2,
401#endif /* TFM_PARTITION_TEST_CORE */
402#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
403 ctx_stack_TFM_SP_SECURE_TEST_PARTITION,
404#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
405#ifdef TFM_PARTITION_TEST_CORE_IPC
406 ctx_stack_TFM_SP_IPC_SERVICE_TEST,
407#endif /* TFM_PARTITION_TEST_CORE_IPC */
408#ifdef TFM_PARTITION_TEST_CORE_IPC
409 ctx_stack_TFM_SP_IPC_CLIENT_TEST,
410#endif /* TFM_PARTITION_TEST_CORE_IPC */
411#ifdef TFM_ENABLE_IRQ_TEST
412 ctx_stack_TFM_IRQ_TEST_1,
413#endif /* TFM_ENABLE_IRQ_TEST */
414};
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]415#endif /* !defined(TFM_PSA_API) */
416
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]417/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]418/** The static data of the partition list */
419/**************************************************************************/
420const struct spm_partition_static_data_t static_data_list[] =
421{
422 {
423 .partition_id = TFM_SP_NON_SECURE_ID,
424#ifdef TFM_PSA_API
David Hu90128b72019-09-23 16:35:41 +0800[diff] [blame^]425#if TFM_MULTI_CORE_TOPOLOGY
426 .partition_flags = SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_IPC,
427#else
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]428 .partition_flags = SPM_PART_FLAG_APP_ROT | SPM_PART_FLAG_IPC,
David Hu90128b72019-09-23 16:35:41 +0800[diff] [blame^]429#endif
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]430 .partition_priority = TFM_PRIORITY_LOW,
431 .partition_init = tfm_nspm_thread_entry,
432#else
433 .partition_flags = 0,
434#endif
435 },
436
437#ifndef TFM_PSA_API
438 {
439 .partition_id = TFM_SP_CORE_ID,
440 .partition_flags = SPM_PART_FLAG_APP_ROT | SPM_PART_FLAG_PSA_ROT,
441 },
442#endif
443
444 {
445 .partition_id = TFM_SP_STORAGE_ID,
446 .partition_flags = SPM_PART_FLAG_IPC
447 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
448 ,
449 .partition_priority = TFM_PRIORITY(NORMAL),
450 .partition_init = tfm_sst_req_mngr_init,
451 },
452
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]453 {
454 .partition_id = TFM_SP_ITS_ID,
455 .partition_flags = SPM_PART_FLAG_IPC
456 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
457 ,
458 .partition_priority = TFM_PRIORITY(NORMAL),
459 .partition_init = tfm_its_req_mngr_init,
460 },
461
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]462#ifdef TFM_PARTITION_AUDIT_LOG
463 {
464 .partition_id = TFM_SP_AUDIT_LOG_ID,
465 .partition_flags = 0
466 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
467 ,
468 .partition_priority = TFM_PRIORITY(NORMAL),
469 .partition_init = audit_core_init,
470 },
471#endif /* TFM_PARTITION_AUDIT_LOG */
472
473 {
474 .partition_id = TFM_SP_CRYPTO_ID,
475 .partition_flags = SPM_PART_FLAG_IPC
476 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
477 ,
478 .partition_priority = TFM_PRIORITY(NORMAL),
479 .partition_init = tfm_crypto_init,
480 },
481
482#ifdef TFM_PARTITION_PLATFORM
483 {
484 .partition_id = TFM_SP_PLATFORM_ID,
485 .partition_flags = 0
486 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
487 ,
488 .partition_priority = TFM_PRIORITY(NORMAL),
489 .partition_init = platform_sp_init,
490 },
491#endif /* TFM_PARTITION_PLATFORM */
492
493 {
494 .partition_id = TFM_SP_INITIAL_ATTESTATION_ID,
495 .partition_flags = SPM_PART_FLAG_IPC
496 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
497 ,
498 .partition_priority = TFM_PRIORITY(NORMAL),
499 .partition_init = attest_partition_init,
500 },
501
502#ifdef TFM_PARTITION_TEST_CORE
503 {
504 .partition_id = TFM_SP_CORE_TEST_ID,
505 .partition_flags = SPM_PART_FLAG_IPC
Mate Toth-Palacae8bd2019-09-10 16:47:11 +0200[diff] [blame]506 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]507 ,
508 .partition_priority = TFM_PRIORITY(NORMAL),
509 .partition_init = core_test_init,
510 },
511#endif /* TFM_PARTITION_TEST_CORE */
512
513#ifdef TFM_PARTITION_TEST_CORE
514 {
515 .partition_id = TFM_SP_CORE_TEST_2_ID,
516 .partition_flags = SPM_PART_FLAG_IPC
517 | SPM_PART_FLAG_APP_ROT
518 ,
519 .partition_priority = TFM_PRIORITY(NORMAL),
520 .partition_init = core_test_2_init,
521 },
522#endif /* TFM_PARTITION_TEST_CORE */
523
524#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
525 {
526 .partition_id = TFM_SP_SECURE_TEST_PARTITION_ID,
527 .partition_flags = SPM_PART_FLAG_IPC
528 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
529 ,
530 .partition_priority = TFM_PRIORITY(NORMAL),
531 .partition_init = tfm_secure_client_service_init,
532 },
533#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
534
535#ifdef TFM_PARTITION_TEST_CORE_IPC
536 {
537 .partition_id = TFM_SP_IPC_SERVICE_TEST_ID,
538 .partition_flags = SPM_PART_FLAG_IPC
539 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
540 ,
541 .partition_priority = TFM_PRIORITY(HIGH),
542 .partition_init = ipc_service_test_main,
543 },
544#endif /* TFM_PARTITION_TEST_CORE_IPC */
545
546#ifdef TFM_PARTITION_TEST_CORE_IPC
547 {
548 .partition_id = TFM_SP_IPC_CLIENT_TEST_ID,
549 .partition_flags = SPM_PART_FLAG_IPC
550 | SPM_PART_FLAG_APP_ROT
551 ,
552 .partition_priority = TFM_PRIORITY(NORMAL),
553 .partition_init = ipc_client_test_main,
554 },
555#endif /* TFM_PARTITION_TEST_CORE_IPC */
556
557#ifdef TFM_ENABLE_IRQ_TEST
558 {
559 .partition_id = TFM_IRQ_TEST_1_ID,
560 .partition_flags = SPM_PART_FLAG_IPC
561 | SPM_PART_FLAG_APP_ROT
562 ,
563 .partition_priority = TFM_PRIORITY(NORMAL),
564 .partition_init = tfm_irq_test_1_init,
565 },
566#endif /* TFM_ENABLE_IRQ_TEST */
567
568};
569
570/**************************************************************************/
571/** The platform data of the partition list */
572/**************************************************************************/
573const struct tfm_spm_partition_platform_data_t *platform_data_list[] =
574{
575 NULL,
576
577#ifndef TFM_PSA_API
578 NULL,
579#endif
580
581 NULL,
582
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]583 NULL,
584
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]585#ifdef TFM_PARTITION_AUDIT_LOG
586 /* FIXME: Only adding the first mmio region */
587#ifdef AUDIT_UART_REDIRECTION
588 TFM_PERIPHERAL_UART1,
589#else /* AUDIT_UART_REDIRECTION */
590 NULL,
591#endif /* AUDIT_UART_REDIRECTION */
592#endif /* TFM_PARTITION_AUDIT_LOG */
593
594 NULL,
595
596#ifdef TFM_PARTITION_PLATFORM
597 NULL,
598#endif /* TFM_PARTITION_PLATFORM */
599
600 NULL,
601
602#ifdef TFM_PARTITION_TEST_CORE
603 /* FIXME: Only adding the first mmio region */
604 TFM_PERIPHERAL_FPGA_IO,
605#endif /* TFM_PARTITION_TEST_CORE */
606
607#ifdef TFM_PARTITION_TEST_CORE
608 NULL,
609#endif /* TFM_PARTITION_TEST_CORE */
610
611#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
612 /* FIXME: Only adding the first mmio region */
613 TFM_PERIPHERAL_STD_UART,
614#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
615
616#ifdef TFM_PARTITION_TEST_CORE_IPC
617 NULL,
618#endif /* TFM_PARTITION_TEST_CORE_IPC */
619
620#ifdef TFM_PARTITION_TEST_CORE_IPC
621 NULL,
622#endif /* TFM_PARTITION_TEST_CORE_IPC */
623
624#ifdef TFM_ENABLE_IRQ_TEST
625 /* FIXME: Only adding the first mmio region */
626 TFM_PERIPHERAL_TIMER0,
627#endif /* TFM_ENABLE_IRQ_TEST */
628
629};
630
631/**************************************************************************/
632/** The memory data of the partition list */
633/**************************************************************************/
634#ifdef TFM_PSA_API
635const struct tfm_spm_partition_memory_data_t memory_data_list[] =
636{
637 {
638 .stack_bottom = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Base),
639 .stack_top = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Limit),
640 .rw_start = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Base),
641 },
642 {
643 .code_start = PART_REGION_ADDR(TFM_SP_STORAGE, $$Base),
644 .code_limit = PART_REGION_ADDR(TFM_SP_STORAGE, $$Limit),
645 .ro_start = PART_REGION_ADDR(TFM_SP_STORAGE, $$RO$$Base),
646 .ro_limit = PART_REGION_ADDR(TFM_SP_STORAGE, $$RO$$Limit),
647 .rw_start = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$RW$$Base),
648 .rw_limit = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$RW$$Limit),
649 .zi_start = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$ZI$$Base),
650 .zi_limit = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$ZI$$Limit),
651 .stack_bottom = PART_REGION_ADDR(TFM_SP_STORAGE, _STACK$$ZI$$Base),
652 .stack_top = PART_REGION_ADDR(TFM_SP_STORAGE, _STACK$$ZI$$Limit),
653 },
654
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]655 {
656 .code_start = PART_REGION_ADDR(TFM_SP_ITS, $$Base),
657 .code_limit = PART_REGION_ADDR(TFM_SP_ITS, $$Limit),
658 .ro_start = PART_REGION_ADDR(TFM_SP_ITS, $$RO$$Base),
659 .ro_limit = PART_REGION_ADDR(TFM_SP_ITS, $$RO$$Limit),
660 .rw_start = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$RW$$Base),
661 .rw_limit = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$RW$$Limit),
662 .zi_start = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$ZI$$Base),
663 .zi_limit = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$ZI$$Limit),
664 .stack_bottom = PART_REGION_ADDR(TFM_SP_ITS, _STACK$$ZI$$Base),
665 .stack_top = PART_REGION_ADDR(TFM_SP_ITS, _STACK$$ZI$$Limit),
666 },
667
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]668#ifdef TFM_PARTITION_AUDIT_LOG
669 {
670 .code_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$Base),
671 .code_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$Limit),
672 .ro_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$RO$$Base),
673 .ro_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$RO$$Limit),
674 .rw_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$RW$$Base),
675 .rw_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$RW$$Limit),
676 .zi_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$ZI$$Base),
677 .zi_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$ZI$$Limit),
678 .stack_bottom = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _STACK$$ZI$$Base),
679 .stack_top = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _STACK$$ZI$$Limit),
680 },
681#endif /* TFM_PARTITION_AUDIT_LOG */
682
683 {
684 .code_start = PART_REGION_ADDR(TFM_SP_CRYPTO, $$Base),
685 .code_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, $$Limit),
686 .ro_start = PART_REGION_ADDR(TFM_SP_CRYPTO, $$RO$$Base),
687 .ro_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, $$RO$$Limit),
688 .rw_start = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$RW$$Base),
689 .rw_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$RW$$Limit),
690 .zi_start = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$ZI$$Base),
691 .zi_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$ZI$$Limit),
692 .stack_bottom = PART_REGION_ADDR(TFM_SP_CRYPTO, _STACK$$ZI$$Base),
693 .stack_top = PART_REGION_ADDR(TFM_SP_CRYPTO, _STACK$$ZI$$Limit),
694 },
695
696#ifdef TFM_PARTITION_PLATFORM
697 {
698 .code_start = PART_REGION_ADDR(TFM_SP_PLATFORM, $$Base),
699 .code_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, $$Limit),
700 .ro_start = PART_REGION_ADDR(TFM_SP_PLATFORM, $$RO$$Base),
701 .ro_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, $$RO$$Limit),
702 .rw_start = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$RW$$Base),
703 .rw_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$RW$$Limit),
704 .zi_start = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$ZI$$Base),
705 .zi_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$ZI$$Limit),
706 .stack_bottom = PART_REGION_ADDR(TFM_SP_PLATFORM, _STACK$$ZI$$Base),
707 .stack_top = PART_REGION_ADDR(TFM_SP_PLATFORM, _STACK$$ZI$$Limit),
708 },
709#endif /* TFM_PARTITION_PLATFORM */
710
711 {
712 .code_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$Base),
713 .code_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$Limit),
714 .ro_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$RO$$Base),
715 .ro_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$RO$$Limit),
716 .rw_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Base),
717 .rw_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Limit),
718 .zi_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Base),
719 .zi_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Limit),
720 .stack_bottom = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Base),
721 .stack_top = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Limit),
722 },
723
724#ifdef TFM_PARTITION_TEST_CORE
725 {
726 .code_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$Base),
727 .code_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$Limit),
728 .ro_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$RO$$Base),
729 .ro_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$RO$$Limit),
730 .rw_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$RW$$Base),
731 .rw_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$RW$$Limit),
732 .zi_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$ZI$$Base),
733 .zi_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$ZI$$Limit),
734 .stack_bottom = PART_REGION_ADDR(TFM_SP_CORE_TEST, _STACK$$ZI$$Base),
735 .stack_top = PART_REGION_ADDR(TFM_SP_CORE_TEST, _STACK$$ZI$$Limit),
736 },
737#endif /* TFM_PARTITION_TEST_CORE */
738
739#ifdef TFM_PARTITION_TEST_CORE
740 {
741 .code_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$Base),
742 .code_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$Limit),
743 .ro_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$RO$$Base),
744 .ro_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$RO$$Limit),
745 .rw_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$RW$$Base),
746 .rw_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$RW$$Limit),
747 .zi_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$ZI$$Base),
748 .zi_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$ZI$$Limit),
749 .stack_bottom = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _STACK$$ZI$$Base),
750 .stack_top = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _STACK$$ZI$$Limit),
751 },
752#endif /* TFM_PARTITION_TEST_CORE */
753
754#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
755 {
756 .code_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$Base),
757 .code_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$Limit),
758 .ro_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$RO$$Base),
759 .ro_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$RO$$Limit),
760 .rw_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Base),
761 .rw_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Limit),
762 .zi_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Base),
763 .zi_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Limit),
764 .stack_bottom = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Base),
765 .stack_top = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Limit),
766 },
767#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
768
769#ifdef TFM_PARTITION_TEST_CORE_IPC
770 {
771 .code_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$Base),
772 .code_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$Limit),
773 .ro_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$RO$$Base),
774 .ro_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$RO$$Limit),
775 .rw_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Base),
776 .rw_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Limit),
777 .zi_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Base),
778 .zi_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Limit),
779 .stack_bottom = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Base),
780 .stack_top = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Limit),
781 },
782#endif /* TFM_PARTITION_TEST_CORE_IPC */
783
784#ifdef TFM_PARTITION_TEST_CORE_IPC
785 {
786 .code_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$Base),
787 .code_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$Limit),
788 .ro_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$RO$$Base),
789 .ro_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$RO$$Limit),
790 .rw_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Base),
791 .rw_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Limit),
792 .zi_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Base),
793 .zi_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Limit),
794 .stack_bottom = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Base),
795 .stack_top = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Limit),
796 },
797#endif /* TFM_PARTITION_TEST_CORE_IPC */
798
799#ifdef TFM_ENABLE_IRQ_TEST
800 {
801 .code_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$Base),
802 .code_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$Limit),
803 .ro_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$RO$$Base),
804 .ro_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$RO$$Limit),
805 .rw_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$RW$$Base),
806 .rw_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$RW$$Limit),
807 .zi_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$ZI$$Base),
808 .zi_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$ZI$$Limit),
809 .stack_bottom = PART_REGION_ADDR(TFM_IRQ_TEST_1, _STACK$$ZI$$Base),
810 .stack_top = PART_REGION_ADDR(TFM_IRQ_TEST_1, _STACK$$ZI$$Limit),
811 },
812#endif /* TFM_ENABLE_IRQ_TEST */
813
814};
815#endif /* defined(TFM_PSA_API) */
816
817/**************************************************************************/
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]818/** The partition list for the DB */
819/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]820static struct spm_partition_desc_t partition_list [] =
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]821{
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]822 {{}}, /* placeholder for Non-secure internal partition */
Mingyang Sunda01a972019-07-12 17:32:59 +0800[diff] [blame]823#ifndef TFM_PSA_API
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]824 {{}}, /* placeholder for TF-M Core internal partition */
Mingyang Sunda01a972019-07-12 17:32:59 +0800[diff] [blame]825#endif /* !ifndefined(TFM_PSA_API) */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]826
827 /* -----------------------------------------------------------------------*/
828 /* - Partition DB record for TFM_SP_STORAGE */
829 /* -----------------------------------------------------------------------*/
830 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]831 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]832 .runtime_data = {},
833 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]834 .platform_data = NULL,
835
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]836 },
837
838 /* -----------------------------------------------------------------------*/
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame]839 /* - Partition DB record for TFM_SP_ITS */
840 /* -----------------------------------------------------------------------*/
841 {
842 /* Runtime data */
843 .runtime_data = {},
844 .static_data = NULL,
845 .platform_data = NULL,
846
847 },
848
849 /* -----------------------------------------------------------------------*/
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]850 /* - Partition DB record for TFM_SP_AUDIT_LOG */
851 /* -----------------------------------------------------------------------*/
852#ifdef TFM_PARTITION_AUDIT_LOG
853 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]854 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]855 .runtime_data = {},
856 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]857 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]858
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]859 },
860#endif /* TFM_PARTITION_AUDIT_LOG */
861
862 /* -----------------------------------------------------------------------*/
863 /* - Partition DB record for TFM_SP_CRYPTO */
864 /* -----------------------------------------------------------------------*/
865 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]866 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]867 .runtime_data = {},
868 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]869 .platform_data = NULL,
870
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]871 },
872
873 /* -----------------------------------------------------------------------*/
874 /* - Partition DB record for TFM_SP_PLATFORM */
875 /* -----------------------------------------------------------------------*/
876#ifdef TFM_PARTITION_PLATFORM
877 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]878 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]879 .runtime_data = {},
880 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]881 .platform_data = NULL,
882
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]883 },
884#endif /* TFM_PARTITION_PLATFORM */
885
886 /* -----------------------------------------------------------------------*/
887 /* - Partition DB record for TFM_SP_INITIAL_ATTESTATION */
888 /* -----------------------------------------------------------------------*/
889 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]890 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]891 .runtime_data = {},
892 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]893 .platform_data = NULL,
894
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]895 },
896
897 /* -----------------------------------------------------------------------*/
898 /* - Partition DB record for TFM_SP_CORE_TEST */
899 /* -----------------------------------------------------------------------*/
900#ifdef TFM_PARTITION_TEST_CORE
901 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]902 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]903 .runtime_data = {},
904 .static_data = NULL,
905 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]906
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]907 },
908#endif /* TFM_PARTITION_TEST_CORE */
909
910 /* -----------------------------------------------------------------------*/
911 /* - Partition DB record for TFM_SP_CORE_TEST_2 */
912 /* -----------------------------------------------------------------------*/
913#ifdef TFM_PARTITION_TEST_CORE
914 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]915 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]916 .runtime_data = {},
917 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]918 .platform_data = NULL,
919
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]920 },
921#endif /* TFM_PARTITION_TEST_CORE */
922
923 /* -----------------------------------------------------------------------*/
924 /* - Partition DB record for TFM_SP_SECURE_TEST_PARTITION */
925 /* -----------------------------------------------------------------------*/
926#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
927 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]928 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]929 .runtime_data = {},
930 .static_data = NULL,
931 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]932
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]933 },
934#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
935
936 /* -----------------------------------------------------------------------*/
937 /* - Partition DB record for TFM_SP_IPC_SERVICE_TEST */
938 /* -----------------------------------------------------------------------*/
939#ifdef TFM_PARTITION_TEST_CORE_IPC
940 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]941 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]942 .runtime_data = {},
943 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]944 .platform_data = NULL,
945
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]946 },
947#endif /* TFM_PARTITION_TEST_CORE_IPC */
948
949 /* -----------------------------------------------------------------------*/
950 /* - Partition DB record for TFM_SP_IPC_CLIENT_TEST */
951 /* -----------------------------------------------------------------------*/
952#ifdef TFM_PARTITION_TEST_CORE_IPC
953 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]954 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]955 .runtime_data = {},
956 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]957 .platform_data = NULL,
958
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]959 },
960#endif /* TFM_PARTITION_TEST_CORE_IPC */
961
962 /* -----------------------------------------------------------------------*/
963 /* - Partition DB record for TFM_IRQ_TEST_1 */
964 /* -----------------------------------------------------------------------*/
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]965#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]966 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]967 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]968 .runtime_data = {},
969 .static_data = NULL,
970 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]971
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]972 },
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]973#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]974
975};
976
977struct spm_partition_db_t g_spm_partition_db = {
978 .is_init = 0,
979 .partition_count = sizeof(partition_list) / sizeof(partition_list[0]),
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]980#ifndef TFM_PSA_API
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]981 .running_partition_idx = 0,
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]982#endif
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]983 .partitions = partition_list,
984};
985
986#endif /* __TFM_SPM_DB_INC__ */