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review.trustedfirmware.org / TF-M / trusted-firmware-m.git / fb182bc68af2d64e34f33917c2c427cfeb7ef26b / . / secure_fw / services / tfm_spm_db.inc
blob: d0dd9ae5e9c4688fa32941468f2d4c3f6072f16e [file] [log] [blame]
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]1/*
2 * Copyright (c) 2019, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
9
10#ifndef __TFM_SPM_DB_INC__
11#define __TFM_SPM_DB_INC__
12
13#include "spm_api.h"
14
15/**************************************************************************/
16/** IRQ count per partition */
17/**************************************************************************/
18#define TFM_PARTITION_TFM_SP_STORAGE_IRQ_COUNT 0
19
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]20#define TFM_PARTITION_TFM_SP_ITS_IRQ_COUNT 0
21
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]22#ifdef TFM_PARTITION_AUDIT_LOG
23#define TFM_PARTITION_TFM_SP_AUDIT_LOG_IRQ_COUNT 0
24#endif /* TFM_PARTITION_AUDIT_LOG */
25
26#define TFM_PARTITION_TFM_SP_CRYPTO_IRQ_COUNT 0
27
28#ifdef TFM_PARTITION_PLATFORM
29#define TFM_PARTITION_TFM_SP_PLATFORM_IRQ_COUNT 0
30#endif /* TFM_PARTITION_PLATFORM */
31
32#define TFM_PARTITION_TFM_SP_INITIAL_ATTESTATION_IRQ_COUNT 0
33
34#ifdef TFM_PARTITION_TEST_CORE
35#define TFM_PARTITION_TFM_SP_CORE_TEST_IRQ_COUNT 0
36#endif /* TFM_PARTITION_TEST_CORE */
37
38#ifdef TFM_PARTITION_TEST_CORE
39#define TFM_PARTITION_TFM_SP_CORE_TEST_2_IRQ_COUNT 0
40#endif /* TFM_PARTITION_TEST_CORE */
41
42#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
43#define TFM_PARTITION_TFM_SP_SECURE_TEST_PARTITION_IRQ_COUNT 0
44#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
45
46#ifdef TFM_PARTITION_TEST_CORE_IPC
47#define TFM_PARTITION_TFM_SP_IPC_SERVICE_TEST_IRQ_COUNT 0
48#endif /* TFM_PARTITION_TEST_CORE_IPC */
49
50#ifdef TFM_PARTITION_TEST_CORE_IPC
51#define TFM_PARTITION_TFM_SP_IPC_CLIENT_TEST_IRQ_COUNT 0
52#endif /* TFM_PARTITION_TEST_CORE_IPC */
53
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]54#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]55#define TFM_PARTITION_TFM_IRQ_TEST_1_IRQ_COUNT 1
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]56#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]57
58/**************************************************************************/
59/** Declarations of partition init functions */
60/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]61#ifdef TFM_PSA_API
62extern psa_status_t tfm_nspm_thread_entry(void);
63#endif
64
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]65extern int32_t tfm_sst_req_mngr_init(void);
66
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]67extern int32_t tfm_its_req_mngr_init(void);
68
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]69#ifdef TFM_PARTITION_AUDIT_LOG
70extern int32_t audit_core_init(void);
71#endif /* TFM_PARTITION_AUDIT_LOG */
72
73extern int32_t tfm_crypto_init(void);
74
75#ifdef TFM_PARTITION_PLATFORM
76extern int32_t platform_sp_init(void);
77#endif /* TFM_PARTITION_PLATFORM */
78
79extern int32_t attest_partition_init(void);
80
81#ifdef TFM_PARTITION_TEST_CORE
82extern int32_t core_test_init(void);
83#endif /* TFM_PARTITION_TEST_CORE */
84
85#ifdef TFM_PARTITION_TEST_CORE
86extern int32_t core_test_2_init(void);
87#endif /* TFM_PARTITION_TEST_CORE */
88
89#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
90extern int32_t tfm_secure_client_service_init(void);
91#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
92
93#ifdef TFM_PARTITION_TEST_CORE_IPC
94extern int32_t ipc_service_test_main(void);
95#endif /* TFM_PARTITION_TEST_CORE_IPC */
96
97#ifdef TFM_PARTITION_TEST_CORE_IPC
98extern int32_t ipc_client_test_main(void);
99#endif /* TFM_PARTITION_TEST_CORE_IPC */
100
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]101#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]102extern int32_t tfm_irq_test_1_init(void);
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]103#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]104
105/**************************************************************************/
106/** Memory region declarations */
107/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]108#ifdef TFM_PSA_API
109REGION_DECLARE(Image$$, ARM_LIB_STACK, $$ZI$$Base);
110REGION_DECLARE(Image$$, ARM_LIB_STACK, $$ZI$$Limit);
111
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]112REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$Base);
113REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$Limit);
114REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$RO$$Base);
115REGION_DECLARE(Image$$, TFM_SP_STORAGE, $$RO$$Limit);
116REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$RW$$Base);
117REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$RW$$Limit);
118REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$ZI$$Base);
119REGION_DECLARE(Image$$, TFM_SP_STORAGE, _DATA$$ZI$$Limit);
120REGION_DECLARE(Image$$, TFM_SP_STORAGE, _STACK$$ZI$$Base);
121REGION_DECLARE(Image$$, TFM_SP_STORAGE, _STACK$$ZI$$Limit);
122
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]123REGION_DECLARE(Image$$, TFM_SP_ITS, $$Base);
124REGION_DECLARE(Image$$, TFM_SP_ITS, $$Limit);
125REGION_DECLARE(Image$$, TFM_SP_ITS, $$RO$$Base);
126REGION_DECLARE(Image$$, TFM_SP_ITS, $$RO$$Limit);
127REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$RW$$Base);
128REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$RW$$Limit);
129REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$ZI$$Base);
130REGION_DECLARE(Image$$, TFM_SP_ITS, _DATA$$ZI$$Limit);
131REGION_DECLARE(Image$$, TFM_SP_ITS, _STACK$$ZI$$Base);
132REGION_DECLARE(Image$$, TFM_SP_ITS, _STACK$$ZI$$Limit);
133
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]134#ifdef TFM_PARTITION_AUDIT_LOG
135REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$Base);
136REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$Limit);
137REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$RO$$Base);
138REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, $$RO$$Limit);
139REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$RW$$Base);
140REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$RW$$Limit);
141REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$ZI$$Base);
142REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _DATA$$ZI$$Limit);
143REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _STACK$$ZI$$Base);
144REGION_DECLARE(Image$$, TFM_SP_AUDIT_LOG, _STACK$$ZI$$Limit);
145#endif /* TFM_PARTITION_AUDIT_LOG */
146
147REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$Base);
148REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$Limit);
149REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$RO$$Base);
150REGION_DECLARE(Image$$, TFM_SP_CRYPTO, $$RO$$Limit);
151REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$RW$$Base);
152REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$RW$$Limit);
153REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$ZI$$Base);
154REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _DATA$$ZI$$Limit);
155REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _STACK$$ZI$$Base);
156REGION_DECLARE(Image$$, TFM_SP_CRYPTO, _STACK$$ZI$$Limit);
157
158#ifdef TFM_PARTITION_PLATFORM
159REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$Base);
160REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$Limit);
161REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$RO$$Base);
162REGION_DECLARE(Image$$, TFM_SP_PLATFORM, $$RO$$Limit);
163REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$RW$$Base);
164REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$RW$$Limit);
165REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$ZI$$Base);
166REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _DATA$$ZI$$Limit);
167REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _STACK$$ZI$$Base);
168REGION_DECLARE(Image$$, TFM_SP_PLATFORM, _STACK$$ZI$$Limit);
169#endif /* TFM_PARTITION_PLATFORM */
170
171REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$Base);
172REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$Limit);
173REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$RO$$Base);
174REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, $$RO$$Limit);
175REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Base);
176REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Limit);
177REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Base);
178REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Limit);
179REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Base);
180REGION_DECLARE(Image$$, TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Limit);
181
182#ifdef TFM_PARTITION_TEST_CORE
183REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$Base);
184REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$Limit);
185REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$RO$$Base);
186REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, $$RO$$Limit);
187REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$RW$$Base);
188REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$RW$$Limit);
189REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$ZI$$Base);
190REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _DATA$$ZI$$Limit);
191REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _STACK$$ZI$$Base);
192REGION_DECLARE(Image$$, TFM_SP_CORE_TEST, _STACK$$ZI$$Limit);
193#endif /* TFM_PARTITION_TEST_CORE */
194
195#ifdef TFM_PARTITION_TEST_CORE
196REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$Base);
197REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$Limit);
198REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$RO$$Base);
199REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, $$RO$$Limit);
200REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$RW$$Base);
201REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$RW$$Limit);
202REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$ZI$$Base);
203REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _DATA$$ZI$$Limit);
204REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _STACK$$ZI$$Base);
205REGION_DECLARE(Image$$, TFM_SP_CORE_TEST_2, _STACK$$ZI$$Limit);
206#endif /* TFM_PARTITION_TEST_CORE */
207
208#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
209REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$Base);
210REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$Limit);
211REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$RO$$Base);
212REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, $$RO$$Limit);
213REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Base);
214REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Limit);
215REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Base);
216REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Limit);
217REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Base);
218REGION_DECLARE(Image$$, TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Limit);
219#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
220
221#ifdef TFM_PARTITION_TEST_CORE_IPC
222REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$Base);
223REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$Limit);
224REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$RO$$Base);
225REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, $$RO$$Limit);
226REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Base);
227REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Limit);
228REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Base);
229REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Limit);
230REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Base);
231REGION_DECLARE(Image$$, TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Limit);
232#endif /* TFM_PARTITION_TEST_CORE_IPC */
233
234#ifdef TFM_PARTITION_TEST_CORE_IPC
235REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$Base);
236REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$Limit);
237REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$RO$$Base);
238REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, $$RO$$Limit);
239REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Base);
240REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Limit);
241REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Base);
242REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Limit);
243REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Base);
244REGION_DECLARE(Image$$, TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Limit);
245#endif /* TFM_PARTITION_TEST_CORE_IPC */
246
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]247#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]248REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$Base);
249REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$Limit);
250REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$RO$$Base);
251REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, $$RO$$Limit);
252REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$RW$$Base);
253REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$RW$$Limit);
254REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$ZI$$Base);
255REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _DATA$$ZI$$Limit);
256REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _STACK$$ZI$$Base);
257REGION_DECLARE(Image$$, TFM_IRQ_TEST_1, _STACK$$ZI$$Limit);
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]258#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]259
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]260#endif /* defined(TFM_PSA_API) */
261
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]262#ifndef TFM_PSA_API
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]263/**************************************************************************/
264/** Context stacks for IRQ handling */
265/**************************************************************************/
266/* The max size of the context stack can be calculated as a function of the IRQ
267 * count of the secure partition:
268 *
269 * max_stack_size = intr_ctx_size + (IRQ_CNT * (intr_ctx_size + hndl_ctx_size))
270 *
271 * where:
272 * intr_ctx: Frame pushed when the partition is interrupted
273 * hndl_ctx: Frame pushed when the partition is handling an interrupt
274 */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]275static uint32_t ns_interrupt_ctx_stack[
276 sizeof(struct interrupted_ctx_stack_frame_t) / sizeof(uint32_t)];
277
278static uint32_t tfm_core_interrupt_ctx_stack[
279 sizeof(struct interrupted_ctx_stack_frame_t) / sizeof(uint32_t)];
280
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]281static uint32_t ctx_stack_TFM_SP_STORAGE[
282 (sizeof(struct interrupted_ctx_stack_frame_t) +
283 (TFM_PARTITION_TFM_SP_STORAGE_IRQ_COUNT) * (
284 sizeof(struct interrupted_ctx_stack_frame_t) +
285 sizeof(struct handler_ctx_stack_frame_t)
286 )) / sizeof(uint32_t)];
287
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]288static uint32_t ctx_stack_TFM_SP_ITS[
289 (sizeof(struct interrupted_ctx_stack_frame_t) +
290 (TFM_PARTITION_TFM_SP_ITS_IRQ_COUNT) * (
291 sizeof(struct interrupted_ctx_stack_frame_t) +
292 sizeof(struct handler_ctx_stack_frame_t)
293 )) / sizeof(uint32_t)];
294
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]295#ifdef TFM_PARTITION_AUDIT_LOG
296static uint32_t ctx_stack_TFM_SP_AUDIT_LOG[
297 (sizeof(struct interrupted_ctx_stack_frame_t) +
298 (TFM_PARTITION_TFM_SP_AUDIT_LOG_IRQ_COUNT) * (
299 sizeof(struct interrupted_ctx_stack_frame_t) +
300 sizeof(struct handler_ctx_stack_frame_t)
301 )) / sizeof(uint32_t)];
302#endif /* TFM_PARTITION_AUDIT_LOG */
303
304static uint32_t ctx_stack_TFM_SP_CRYPTO[
305 (sizeof(struct interrupted_ctx_stack_frame_t) +
306 (TFM_PARTITION_TFM_SP_CRYPTO_IRQ_COUNT) * (
307 sizeof(struct interrupted_ctx_stack_frame_t) +
308 sizeof(struct handler_ctx_stack_frame_t)
309 )) / sizeof(uint32_t)];
310
311#ifdef TFM_PARTITION_PLATFORM
312static uint32_t ctx_stack_TFM_SP_PLATFORM[
313 (sizeof(struct interrupted_ctx_stack_frame_t) +
314 (TFM_PARTITION_TFM_SP_PLATFORM_IRQ_COUNT) * (
315 sizeof(struct interrupted_ctx_stack_frame_t) +
316 sizeof(struct handler_ctx_stack_frame_t)
317 )) / sizeof(uint32_t)];
318#endif /* TFM_PARTITION_PLATFORM */
319
320static uint32_t ctx_stack_TFM_SP_INITIAL_ATTESTATION[
321 (sizeof(struct interrupted_ctx_stack_frame_t) +
322 (TFM_PARTITION_TFM_SP_INITIAL_ATTESTATION_IRQ_COUNT) * (
323 sizeof(struct interrupted_ctx_stack_frame_t) +
324 sizeof(struct handler_ctx_stack_frame_t)
325 )) / sizeof(uint32_t)];
326
327#ifdef TFM_PARTITION_TEST_CORE
328static uint32_t ctx_stack_TFM_SP_CORE_TEST[
329 (sizeof(struct interrupted_ctx_stack_frame_t) +
330 (TFM_PARTITION_TFM_SP_CORE_TEST_IRQ_COUNT) * (
331 sizeof(struct interrupted_ctx_stack_frame_t) +
332 sizeof(struct handler_ctx_stack_frame_t)
333 )) / sizeof(uint32_t)];
334#endif /* TFM_PARTITION_TEST_CORE */
335
336#ifdef TFM_PARTITION_TEST_CORE
337static uint32_t ctx_stack_TFM_SP_CORE_TEST_2[
338 (sizeof(struct interrupted_ctx_stack_frame_t) +
339 (TFM_PARTITION_TFM_SP_CORE_TEST_2_IRQ_COUNT) * (
340 sizeof(struct interrupted_ctx_stack_frame_t) +
341 sizeof(struct handler_ctx_stack_frame_t)
342 )) / sizeof(uint32_t)];
343#endif /* TFM_PARTITION_TEST_CORE */
344
345#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
346static uint32_t ctx_stack_TFM_SP_SECURE_TEST_PARTITION[
347 (sizeof(struct interrupted_ctx_stack_frame_t) +
348 (TFM_PARTITION_TFM_SP_SECURE_TEST_PARTITION_IRQ_COUNT) * (
349 sizeof(struct interrupted_ctx_stack_frame_t) +
350 sizeof(struct handler_ctx_stack_frame_t)
351 )) / sizeof(uint32_t)];
352#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
353
354#ifdef TFM_PARTITION_TEST_CORE_IPC
355static uint32_t ctx_stack_TFM_SP_IPC_SERVICE_TEST[
356 (sizeof(struct interrupted_ctx_stack_frame_t) +
357 (TFM_PARTITION_TFM_SP_IPC_SERVICE_TEST_IRQ_COUNT) * (
358 sizeof(struct interrupted_ctx_stack_frame_t) +
359 sizeof(struct handler_ctx_stack_frame_t)
360 )) / sizeof(uint32_t)];
361#endif /* TFM_PARTITION_TEST_CORE_IPC */
362
363#ifdef TFM_PARTITION_TEST_CORE_IPC
364static uint32_t ctx_stack_TFM_SP_IPC_CLIENT_TEST[
365 (sizeof(struct interrupted_ctx_stack_frame_t) +
366 (TFM_PARTITION_TFM_SP_IPC_CLIENT_TEST_IRQ_COUNT) * (
367 sizeof(struct interrupted_ctx_stack_frame_t) +
368 sizeof(struct handler_ctx_stack_frame_t)
369 )) / sizeof(uint32_t)];
370#endif /* TFM_PARTITION_TEST_CORE_IPC */
371
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]372#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]373static uint32_t ctx_stack_TFM_IRQ_TEST_1[
374 (sizeof(struct interrupted_ctx_stack_frame_t) +
375 (TFM_PARTITION_TFM_IRQ_TEST_1_IRQ_COUNT) * (
376 sizeof(struct interrupted_ctx_stack_frame_t) +
377 sizeof(struct handler_ctx_stack_frame_t)
378 )) / sizeof(uint32_t)];
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]379#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]380
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]381
382uint32_t *ctx_stack_list[] =
383{
384 ns_interrupt_ctx_stack,
385 tfm_core_interrupt_ctx_stack,
386 ctx_stack_TFM_SP_STORAGE,
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]387 ctx_stack_TFM_SP_ITS,
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]388#ifdef TFM_PARTITION_AUDIT_LOG
389 ctx_stack_TFM_SP_AUDIT_LOG,
390#endif /* TFM_PARTITION_AUDIT_LOG */
391 ctx_stack_TFM_SP_CRYPTO,
392#ifdef TFM_PARTITION_PLATFORM
393 ctx_stack_TFM_SP_PLATFORM,
394#endif /* TFM_PARTITION_PLATFORM */
395 ctx_stack_TFM_SP_INITIAL_ATTESTATION,
396#ifdef TFM_PARTITION_TEST_CORE
397 ctx_stack_TFM_SP_CORE_TEST,
398#endif /* TFM_PARTITION_TEST_CORE */
399#ifdef TFM_PARTITION_TEST_CORE
400 ctx_stack_TFM_SP_CORE_TEST_2,
401#endif /* TFM_PARTITION_TEST_CORE */
402#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
403 ctx_stack_TFM_SP_SECURE_TEST_PARTITION,
404#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
405#ifdef TFM_PARTITION_TEST_CORE_IPC
406 ctx_stack_TFM_SP_IPC_SERVICE_TEST,
407#endif /* TFM_PARTITION_TEST_CORE_IPC */
408#ifdef TFM_PARTITION_TEST_CORE_IPC
409 ctx_stack_TFM_SP_IPC_CLIENT_TEST,
410#endif /* TFM_PARTITION_TEST_CORE_IPC */
411#ifdef TFM_ENABLE_IRQ_TEST
412 ctx_stack_TFM_IRQ_TEST_1,
413#endif /* TFM_ENABLE_IRQ_TEST */
414};
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]415#endif /* !defined(TFM_PSA_API) */
416
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]417/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]418/** The static data of the partition list */
419/**************************************************************************/
420const struct spm_partition_static_data_t static_data_list[] =
421{
422 {
423 .partition_id = TFM_SP_NON_SECURE_ID,
424#ifdef TFM_PSA_API
425 .partition_flags = SPM_PART_FLAG_APP_ROT | SPM_PART_FLAG_IPC,
426 .partition_priority = TFM_PRIORITY_LOW,
427 .partition_init = tfm_nspm_thread_entry,
428#else
429 .partition_flags = 0,
430#endif
431 },
432
433#ifndef TFM_PSA_API
434 {
435 .partition_id = TFM_SP_CORE_ID,
436 .partition_flags = SPM_PART_FLAG_APP_ROT | SPM_PART_FLAG_PSA_ROT,
437 },
438#endif
439
440 {
441 .partition_id = TFM_SP_STORAGE_ID,
442 .partition_flags = SPM_PART_FLAG_IPC
443 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
444 ,
445 .partition_priority = TFM_PRIORITY(NORMAL),
446 .partition_init = tfm_sst_req_mngr_init,
447 },
448
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]449 {
450 .partition_id = TFM_SP_ITS_ID,
451 .partition_flags = SPM_PART_FLAG_IPC
452 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
453 ,
454 .partition_priority = TFM_PRIORITY(NORMAL),
455 .partition_init = tfm_its_req_mngr_init,
456 },
457
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]458#ifdef TFM_PARTITION_AUDIT_LOG
459 {
460 .partition_id = TFM_SP_AUDIT_LOG_ID,
461 .partition_flags = 0
462 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
463 ,
464 .partition_priority = TFM_PRIORITY(NORMAL),
465 .partition_init = audit_core_init,
466 },
467#endif /* TFM_PARTITION_AUDIT_LOG */
468
469 {
470 .partition_id = TFM_SP_CRYPTO_ID,
471 .partition_flags = SPM_PART_FLAG_IPC
472 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
473 ,
474 .partition_priority = TFM_PRIORITY(NORMAL),
475 .partition_init = tfm_crypto_init,
476 },
477
478#ifdef TFM_PARTITION_PLATFORM
479 {
480 .partition_id = TFM_SP_PLATFORM_ID,
481 .partition_flags = 0
482 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
483 ,
484 .partition_priority = TFM_PRIORITY(NORMAL),
485 .partition_init = platform_sp_init,
486 },
487#endif /* TFM_PARTITION_PLATFORM */
488
489 {
490 .partition_id = TFM_SP_INITIAL_ATTESTATION_ID,
491 .partition_flags = SPM_PART_FLAG_IPC
492 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
493 ,
494 .partition_priority = TFM_PRIORITY(NORMAL),
495 .partition_init = attest_partition_init,
496 },
497
498#ifdef TFM_PARTITION_TEST_CORE
499 {
500 .partition_id = TFM_SP_CORE_TEST_ID,
501 .partition_flags = SPM_PART_FLAG_IPC
Mate Toth-Palacae8bd2019-09-10 16:47:11 +0200[diff] [blame]502 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]503 ,
504 .partition_priority = TFM_PRIORITY(NORMAL),
505 .partition_init = core_test_init,
506 },
507#endif /* TFM_PARTITION_TEST_CORE */
508
509#ifdef TFM_PARTITION_TEST_CORE
510 {
511 .partition_id = TFM_SP_CORE_TEST_2_ID,
512 .partition_flags = SPM_PART_FLAG_IPC
513 | SPM_PART_FLAG_APP_ROT
514 ,
515 .partition_priority = TFM_PRIORITY(NORMAL),
516 .partition_init = core_test_2_init,
517 },
518#endif /* TFM_PARTITION_TEST_CORE */
519
520#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
521 {
522 .partition_id = TFM_SP_SECURE_TEST_PARTITION_ID,
523 .partition_flags = SPM_PART_FLAG_IPC
524 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
525 ,
526 .partition_priority = TFM_PRIORITY(NORMAL),
527 .partition_init = tfm_secure_client_service_init,
528 },
529#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
530
531#ifdef TFM_PARTITION_TEST_CORE_IPC
532 {
533 .partition_id = TFM_SP_IPC_SERVICE_TEST_ID,
534 .partition_flags = SPM_PART_FLAG_IPC
535 | SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT
536 ,
537 .partition_priority = TFM_PRIORITY(HIGH),
538 .partition_init = ipc_service_test_main,
539 },
540#endif /* TFM_PARTITION_TEST_CORE_IPC */
541
542#ifdef TFM_PARTITION_TEST_CORE_IPC
543 {
544 .partition_id = TFM_SP_IPC_CLIENT_TEST_ID,
545 .partition_flags = SPM_PART_FLAG_IPC
546 | SPM_PART_FLAG_APP_ROT
547 ,
548 .partition_priority = TFM_PRIORITY(NORMAL),
549 .partition_init = ipc_client_test_main,
550 },
551#endif /* TFM_PARTITION_TEST_CORE_IPC */
552
553#ifdef TFM_ENABLE_IRQ_TEST
554 {
555 .partition_id = TFM_IRQ_TEST_1_ID,
556 .partition_flags = SPM_PART_FLAG_IPC
557 | SPM_PART_FLAG_APP_ROT
558 ,
559 .partition_priority = TFM_PRIORITY(NORMAL),
560 .partition_init = tfm_irq_test_1_init,
561 },
562#endif /* TFM_ENABLE_IRQ_TEST */
563
564};
565
566/**************************************************************************/
567/** The platform data of the partition list */
568/**************************************************************************/
569const struct tfm_spm_partition_platform_data_t *platform_data_list[] =
570{
571 NULL,
572
573#ifndef TFM_PSA_API
574 NULL,
575#endif
576
577 NULL,
578
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]579 NULL,
580
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]581#ifdef TFM_PARTITION_AUDIT_LOG
582 /* FIXME: Only adding the first mmio region */
583#ifdef AUDIT_UART_REDIRECTION
584 TFM_PERIPHERAL_UART1,
585#else /* AUDIT_UART_REDIRECTION */
586 NULL,
587#endif /* AUDIT_UART_REDIRECTION */
588#endif /* TFM_PARTITION_AUDIT_LOG */
589
590 NULL,
591
592#ifdef TFM_PARTITION_PLATFORM
593 NULL,
594#endif /* TFM_PARTITION_PLATFORM */
595
596 NULL,
597
598#ifdef TFM_PARTITION_TEST_CORE
599 /* FIXME: Only adding the first mmio region */
600 TFM_PERIPHERAL_FPGA_IO,
601#endif /* TFM_PARTITION_TEST_CORE */
602
603#ifdef TFM_PARTITION_TEST_CORE
604 NULL,
605#endif /* TFM_PARTITION_TEST_CORE */
606
607#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
608 /* FIXME: Only adding the first mmio region */
609 TFM_PERIPHERAL_STD_UART,
610#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
611
612#ifdef TFM_PARTITION_TEST_CORE_IPC
613 NULL,
614#endif /* TFM_PARTITION_TEST_CORE_IPC */
615
616#ifdef TFM_PARTITION_TEST_CORE_IPC
617 NULL,
618#endif /* TFM_PARTITION_TEST_CORE_IPC */
619
620#ifdef TFM_ENABLE_IRQ_TEST
621 /* FIXME: Only adding the first mmio region */
622 TFM_PERIPHERAL_TIMER0,
623#endif /* TFM_ENABLE_IRQ_TEST */
624
625};
626
627/**************************************************************************/
628/** The memory data of the partition list */
629/**************************************************************************/
630#ifdef TFM_PSA_API
631const struct tfm_spm_partition_memory_data_t memory_data_list[] =
632{
633 {
634 .stack_bottom = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Base),
635 .stack_top = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Limit),
636 .rw_start = PART_REGION_ADDR(ARM_LIB_STACK, $$ZI$$Base),
637 },
638 {
639 .code_start = PART_REGION_ADDR(TFM_SP_STORAGE, $$Base),
640 .code_limit = PART_REGION_ADDR(TFM_SP_STORAGE, $$Limit),
641 .ro_start = PART_REGION_ADDR(TFM_SP_STORAGE, $$RO$$Base),
642 .ro_limit = PART_REGION_ADDR(TFM_SP_STORAGE, $$RO$$Limit),
643 .rw_start = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$RW$$Base),
644 .rw_limit = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$RW$$Limit),
645 .zi_start = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$ZI$$Base),
646 .zi_limit = PART_REGION_ADDR(TFM_SP_STORAGE, _DATA$$ZI$$Limit),
647 .stack_bottom = PART_REGION_ADDR(TFM_SP_STORAGE, _STACK$$ZI$$Base),
648 .stack_top = PART_REGION_ADDR(TFM_SP_STORAGE, _STACK$$ZI$$Limit),
649 },
650
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]651 {
652 .code_start = PART_REGION_ADDR(TFM_SP_ITS, $$Base),
653 .code_limit = PART_REGION_ADDR(TFM_SP_ITS, $$Limit),
654 .ro_start = PART_REGION_ADDR(TFM_SP_ITS, $$RO$$Base),
655 .ro_limit = PART_REGION_ADDR(TFM_SP_ITS, $$RO$$Limit),
656 .rw_start = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$RW$$Base),
657 .rw_limit = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$RW$$Limit),
658 .zi_start = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$ZI$$Base),
659 .zi_limit = PART_REGION_ADDR(TFM_SP_ITS, _DATA$$ZI$$Limit),
660 .stack_bottom = PART_REGION_ADDR(TFM_SP_ITS, _STACK$$ZI$$Base),
661 .stack_top = PART_REGION_ADDR(TFM_SP_ITS, _STACK$$ZI$$Limit),
662 },
663
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]664#ifdef TFM_PARTITION_AUDIT_LOG
665 {
666 .code_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$Base),
667 .code_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$Limit),
668 .ro_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$RO$$Base),
669 .ro_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, $$RO$$Limit),
670 .rw_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$RW$$Base),
671 .rw_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$RW$$Limit),
672 .zi_start = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$ZI$$Base),
673 .zi_limit = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _DATA$$ZI$$Limit),
674 .stack_bottom = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _STACK$$ZI$$Base),
675 .stack_top = PART_REGION_ADDR(TFM_SP_AUDIT_LOG, _STACK$$ZI$$Limit),
676 },
677#endif /* TFM_PARTITION_AUDIT_LOG */
678
679 {
680 .code_start = PART_REGION_ADDR(TFM_SP_CRYPTO, $$Base),
681 .code_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, $$Limit),
682 .ro_start = PART_REGION_ADDR(TFM_SP_CRYPTO, $$RO$$Base),
683 .ro_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, $$RO$$Limit),
684 .rw_start = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$RW$$Base),
685 .rw_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$RW$$Limit),
686 .zi_start = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$ZI$$Base),
687 .zi_limit = PART_REGION_ADDR(TFM_SP_CRYPTO, _DATA$$ZI$$Limit),
688 .stack_bottom = PART_REGION_ADDR(TFM_SP_CRYPTO, _STACK$$ZI$$Base),
689 .stack_top = PART_REGION_ADDR(TFM_SP_CRYPTO, _STACK$$ZI$$Limit),
690 },
691
692#ifdef TFM_PARTITION_PLATFORM
693 {
694 .code_start = PART_REGION_ADDR(TFM_SP_PLATFORM, $$Base),
695 .code_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, $$Limit),
696 .ro_start = PART_REGION_ADDR(TFM_SP_PLATFORM, $$RO$$Base),
697 .ro_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, $$RO$$Limit),
698 .rw_start = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$RW$$Base),
699 .rw_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$RW$$Limit),
700 .zi_start = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$ZI$$Base),
701 .zi_limit = PART_REGION_ADDR(TFM_SP_PLATFORM, _DATA$$ZI$$Limit),
702 .stack_bottom = PART_REGION_ADDR(TFM_SP_PLATFORM, _STACK$$ZI$$Base),
703 .stack_top = PART_REGION_ADDR(TFM_SP_PLATFORM, _STACK$$ZI$$Limit),
704 },
705#endif /* TFM_PARTITION_PLATFORM */
706
707 {
708 .code_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$Base),
709 .code_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$Limit),
710 .ro_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$RO$$Base),
711 .ro_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, $$RO$$Limit),
712 .rw_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Base),
713 .rw_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$RW$$Limit),
714 .zi_start = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Base),
715 .zi_limit = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _DATA$$ZI$$Limit),
716 .stack_bottom = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Base),
717 .stack_top = PART_REGION_ADDR(TFM_SP_INITIAL_ATTESTATION, _STACK$$ZI$$Limit),
718 },
719
720#ifdef TFM_PARTITION_TEST_CORE
721 {
722 .code_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$Base),
723 .code_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$Limit),
724 .ro_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$RO$$Base),
725 .ro_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, $$RO$$Limit),
726 .rw_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$RW$$Base),
727 .rw_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$RW$$Limit),
728 .zi_start = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$ZI$$Base),
729 .zi_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST, _DATA$$ZI$$Limit),
730 .stack_bottom = PART_REGION_ADDR(TFM_SP_CORE_TEST, _STACK$$ZI$$Base),
731 .stack_top = PART_REGION_ADDR(TFM_SP_CORE_TEST, _STACK$$ZI$$Limit),
732 },
733#endif /* TFM_PARTITION_TEST_CORE */
734
735#ifdef TFM_PARTITION_TEST_CORE
736 {
737 .code_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$Base),
738 .code_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$Limit),
739 .ro_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$RO$$Base),
740 .ro_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, $$RO$$Limit),
741 .rw_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$RW$$Base),
742 .rw_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$RW$$Limit),
743 .zi_start = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$ZI$$Base),
744 .zi_limit = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _DATA$$ZI$$Limit),
745 .stack_bottom = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _STACK$$ZI$$Base),
746 .stack_top = PART_REGION_ADDR(TFM_SP_CORE_TEST_2, _STACK$$ZI$$Limit),
747 },
748#endif /* TFM_PARTITION_TEST_CORE */
749
750#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
751 {
752 .code_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$Base),
753 .code_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$Limit),
754 .ro_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$RO$$Base),
755 .ro_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, $$RO$$Limit),
756 .rw_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Base),
757 .rw_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$RW$$Limit),
758 .zi_start = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Base),
759 .zi_limit = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _DATA$$ZI$$Limit),
760 .stack_bottom = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Base),
761 .stack_top = PART_REGION_ADDR(TFM_SP_SECURE_TEST_PARTITION, _STACK$$ZI$$Limit),
762 },
763#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
764
765#ifdef TFM_PARTITION_TEST_CORE_IPC
766 {
767 .code_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$Base),
768 .code_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$Limit),
769 .ro_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$RO$$Base),
770 .ro_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, $$RO$$Limit),
771 .rw_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Base),
772 .rw_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$RW$$Limit),
773 .zi_start = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Base),
774 .zi_limit = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _DATA$$ZI$$Limit),
775 .stack_bottom = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Base),
776 .stack_top = PART_REGION_ADDR(TFM_SP_IPC_SERVICE_TEST, _STACK$$ZI$$Limit),
777 },
778#endif /* TFM_PARTITION_TEST_CORE_IPC */
779
780#ifdef TFM_PARTITION_TEST_CORE_IPC
781 {
782 .code_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$Base),
783 .code_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$Limit),
784 .ro_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$RO$$Base),
785 .ro_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, $$RO$$Limit),
786 .rw_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Base),
787 .rw_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$RW$$Limit),
788 .zi_start = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Base),
789 .zi_limit = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _DATA$$ZI$$Limit),
790 .stack_bottom = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Base),
791 .stack_top = PART_REGION_ADDR(TFM_SP_IPC_CLIENT_TEST, _STACK$$ZI$$Limit),
792 },
793#endif /* TFM_PARTITION_TEST_CORE_IPC */
794
795#ifdef TFM_ENABLE_IRQ_TEST
796 {
797 .code_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$Base),
798 .code_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$Limit),
799 .ro_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$RO$$Base),
800 .ro_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, $$RO$$Limit),
801 .rw_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$RW$$Base),
802 .rw_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$RW$$Limit),
803 .zi_start = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$ZI$$Base),
804 .zi_limit = PART_REGION_ADDR(TFM_IRQ_TEST_1, _DATA$$ZI$$Limit),
805 .stack_bottom = PART_REGION_ADDR(TFM_IRQ_TEST_1, _STACK$$ZI$$Base),
806 .stack_top = PART_REGION_ADDR(TFM_IRQ_TEST_1, _STACK$$ZI$$Limit),
807 },
808#endif /* TFM_ENABLE_IRQ_TEST */
809
810};
811#endif /* defined(TFM_PSA_API) */
812
813/**************************************************************************/
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]814/** The partition list for the DB */
815/**************************************************************************/
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]816static struct spm_partition_desc_t partition_list [] =
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]817{
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]818 {{}}, /* placeholder for Non-secure internal partition */
Mingyang Sunda01a972019-07-12 17:32:59 +0800[diff] [blame]819#ifndef TFM_PSA_API
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]820 {{}}, /* placeholder for TF-M Core internal partition */
Mingyang Sunda01a972019-07-12 17:32:59 +0800[diff] [blame]821#endif /* !ifndefined(TFM_PSA_API) */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]822
823 /* -----------------------------------------------------------------------*/
824 /* - Partition DB record for TFM_SP_STORAGE */
825 /* -----------------------------------------------------------------------*/
826 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]827 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]828 .runtime_data = {},
829 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]830 .platform_data = NULL,
831
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]832 },
833
834 /* -----------------------------------------------------------------------*/
TudorCretufb182bc2019-07-05 17:34:12 +0100[diff] [blame^]835 /* - Partition DB record for TFM_SP_ITS */
836 /* -----------------------------------------------------------------------*/
837 {
838 /* Runtime data */
839 .runtime_data = {},
840 .static_data = NULL,
841 .platform_data = NULL,
842
843 },
844
845 /* -----------------------------------------------------------------------*/
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]846 /* - Partition DB record for TFM_SP_AUDIT_LOG */
847 /* -----------------------------------------------------------------------*/
848#ifdef TFM_PARTITION_AUDIT_LOG
849 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]850 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]851 .runtime_data = {},
852 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]853 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]854
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]855 },
856#endif /* TFM_PARTITION_AUDIT_LOG */
857
858 /* -----------------------------------------------------------------------*/
859 /* - Partition DB record for TFM_SP_CRYPTO */
860 /* -----------------------------------------------------------------------*/
861 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]862 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]863 .runtime_data = {},
864 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]865 .platform_data = NULL,
866
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]867 },
868
869 /* -----------------------------------------------------------------------*/
870 /* - Partition DB record for TFM_SP_PLATFORM */
871 /* -----------------------------------------------------------------------*/
872#ifdef TFM_PARTITION_PLATFORM
873 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]874 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]875 .runtime_data = {},
876 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]877 .platform_data = NULL,
878
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]879 },
880#endif /* TFM_PARTITION_PLATFORM */
881
882 /* -----------------------------------------------------------------------*/
883 /* - Partition DB record for TFM_SP_INITIAL_ATTESTATION */
884 /* -----------------------------------------------------------------------*/
885 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]886 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]887 .runtime_data = {},
888 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]889 .platform_data = NULL,
890
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]891 },
892
893 /* -----------------------------------------------------------------------*/
894 /* - Partition DB record for TFM_SP_CORE_TEST */
895 /* -----------------------------------------------------------------------*/
896#ifdef TFM_PARTITION_TEST_CORE
897 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]898 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]899 .runtime_data = {},
900 .static_data = NULL,
901 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]902
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]903 },
904#endif /* TFM_PARTITION_TEST_CORE */
905
906 /* -----------------------------------------------------------------------*/
907 /* - Partition DB record for TFM_SP_CORE_TEST_2 */
908 /* -----------------------------------------------------------------------*/
909#ifdef TFM_PARTITION_TEST_CORE
910 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]911 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]912 .runtime_data = {},
913 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]914 .platform_data = NULL,
915
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]916 },
917#endif /* TFM_PARTITION_TEST_CORE */
918
919 /* -----------------------------------------------------------------------*/
920 /* - Partition DB record for TFM_SP_SECURE_TEST_PARTITION */
921 /* -----------------------------------------------------------------------*/
922#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
923 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]924 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]925 .runtime_data = {},
926 .static_data = NULL,
927 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]928
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]929 },
930#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
931
932 /* -----------------------------------------------------------------------*/
933 /* - Partition DB record for TFM_SP_IPC_SERVICE_TEST */
934 /* -----------------------------------------------------------------------*/
935#ifdef TFM_PARTITION_TEST_CORE_IPC
936 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]937 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]938 .runtime_data = {},
939 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]940 .platform_data = NULL,
941
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]942 },
943#endif /* TFM_PARTITION_TEST_CORE_IPC */
944
945 /* -----------------------------------------------------------------------*/
946 /* - Partition DB record for TFM_SP_IPC_CLIENT_TEST */
947 /* -----------------------------------------------------------------------*/
948#ifdef TFM_PARTITION_TEST_CORE_IPC
949 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]950 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]951 .runtime_data = {},
952 .static_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]953 .platform_data = NULL,
954
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]955 },
956#endif /* TFM_PARTITION_TEST_CORE_IPC */
957
958 /* -----------------------------------------------------------------------*/
959 /* - Partition DB record for TFM_IRQ_TEST_1 */
960 /* -----------------------------------------------------------------------*/
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]961#ifdef TFM_ENABLE_IRQ_TEST
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]962 {
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]963 /* Runtime data */
Summer Qin423dbef2019-08-22 15:59:35 +0800[diff] [blame]964 .runtime_data = {},
965 .static_data = NULL,
966 .platform_data = NULL,
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]967
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]968 },
David Hu33f2fd22019-08-16 15:32:39 +0800[diff] [blame]969#endif /* TFM_ENABLE_IRQ_TEST */
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]970
971};
972
973struct spm_partition_db_t g_spm_partition_db = {
974 .is_init = 0,
975 .partition_count = sizeof(partition_list) / sizeof(partition_list[0]),
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]976#ifndef TFM_PSA_API
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]977 .running_partition_idx = 0,
Edison Ai66fbdf12019-07-08 16:05:07 +0800[diff] [blame]978#endif
Mate Toth-Pal3ad2e3e2019-07-11 21:43:37 +0200[diff] [blame]979 .partitions = partition_list,
980};
981
982#endif /* __TFM_SPM_DB_INC__ */