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Boyan Karatotev2b5e00d2024-12-19 16:07:29 +00001# Copyright (c) 2021-2025, Arm Limited. All rights reserved.
Usama Arif6ec0c652021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kay1fa05da2021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Boyan Karatoteva02bb362023-12-12 15:59:01 +00008TARGET_FLAVOUR := fvp
Boyan Karatotev1b8ed092023-11-15 11:54:33 +00009# DPU with SCMI may not necessarily work, so allow its independence
10TC_DPU_USE_SCMI_CLK := 1
Kshitij Sisodiaa658b462023-11-22 17:03:45 +000011# SCMI power domain control enable
12TC_SCMI_PD_CTRL_EN := 1
Boyan Karatoteva02bb362023-12-12 15:59:01 +000013
Boyan Karatotev96a5f872023-12-27 15:49:18 +000014# System setup
15CSS_USE_SCMI_SDS_DRIVER := 1
16HW_ASSISTED_COHERENCY := 1
17USE_COHERENT_MEM := 0
Boyan Karatotevc5c54e22025-01-07 11:04:16 +000018USE_GIC_DRIVER := 3
Arvind Ram Prakashfd4e6022025-05-14 15:29:49 -050019USE_DSU_DRIVER := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000020GIC_ENABLE_V4_EXTN := 1
21GICV3_SUPPORT_GIC600 := 1
22override NEED_BL2U := no
23override ARM_PLAT_MT := 1
24
25# CPU setup
26ARM_ARCH_MINOR := 7
27BRANCH_PROTECTION := 1
28ENABLE_FEAT_MPAM := 1 # default is 2, optimise
29ENABLE_SVE_FOR_NS := 2 # to show we use it
30ENABLE_SVE_FOR_SWD := 1
Jackson Cooper-Driver9face212024-01-08 09:53:04 +000031ENABLE_SME_FOR_NS := 2
32ENABLE_SME2_FOR_NS := 2
33ENABLE_SME_FOR_SWD := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000034ENABLE_TRBE_FOR_NS := 1
35ENABLE_SYS_REG_TRACE_FOR_NS := 1
36ENABLE_FEAT_AMU := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000037ENABLE_AMU_AUXILIARY_COUNTERS := 1
38ENABLE_MPMM := 1
Jayanth Dodderi Chidanand3e8a82a2024-09-02 15:54:23 +010039ENABLE_FEAT_MTE2 := 2
Manish Pandeyef738d12024-06-22 00:00:18 +010040ENABLE_SPE_FOR_NS := 2
41ENABLE_FEAT_TCR2 := 2
Boyan Karatotev96a5f872023-12-27 15:49:18 +000042
Leo Yan2ae197a2024-05-16 15:59:41 +010043ifneq ($(filter ${TARGET_PLATFORM}, 3),)
44ENABLE_FEAT_RNG_TRAP := 0
45else
46ENABLE_FEAT_RNG_TRAP := 1
47endif
48
Boyan Karatotev96a5f872023-12-27 15:49:18 +000049CTX_INCLUDE_AARCH32_REGS := 0
50
51ifeq (${SPD},spmd)
52 SPMD_SPM_AT_SEL2 := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000053 CTX_INCLUDE_PAUTH_REGS := 1
54endif
55
Leo Yan2ae197a2024-05-16 15:59:41 +010056TRNG_SUPPORT := 1
57
Sergio Alvesdd5bf9c2023-12-06 15:24:44 +000058# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
59TC_RESOLUTION_OPTIONS := 640x480p60 \
60 1920x1080p60
61# Set default to the 640x480p60 resolution mode
62TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS))
63
64# Check resolution option for FVP
65ifneq ($(filter ${TARGET_FLAVOUR}, fvp),)
66ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),)
67 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS})
68endif
69endif
Boyan Karatotev96a5f872023-12-27 15:49:18 +000070
Manish V Badarkhef036dda2025-04-09 20:46:56 +010071ifneq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
Manish V Badarkhedf32faa2024-10-31 16:04:30 +000072 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.)
73endif
74
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +000075ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0)
76 $(error TARGET_PLATFORM must be less than or equal to 4)
Usama Arif6ec0c652021-04-09 17:07:41 +010077endif
78
Boyan Karatoteva02bb362023-12-12 15:59:01 +000079ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
80 $(error TARGET_FLAVOUR must be fvp or fpga)
81endif
82
Jagdish Gediyabea55e32024-08-15 04:57:44 +000083# Support for loading FS Image to DRAM
84TC_FPGA_FS_IMG_IN_RAM := 0
Vishnu Satheesh932e64a2024-04-23 15:08:08 +010085
Vishnu Satheesh969b7592024-04-23 15:25:32 +010086# Support Loading of FIP image to DRAM
87TC_FPGA_FIP_IMG_IN_RAM := 0
88
Jagdish Gediya1d2d96d2024-04-19 13:16:36 +000089# Use simple panel instead of vencoder with DPU
90TC_DPU_USE_SIMPLE_PANEL := 0
91
Boyan Karatoteva02bb362023-12-12 15:59:01 +000092$(eval $(call add_defines, \
93 TARGET_PLATFORM \
94 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
Sergio Alvesdd5bf9c2023-12-06 15:24:44 +000095 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
Boyan Karatotev1b8ed092023-11-15 11:54:33 +000096 TC_DPU_USE_SCMI_CLK \
Kshitij Sisodiaa658b462023-11-22 17:03:45 +000097 TC_SCMI_PD_CTRL_EN \
Jagdish Gediyabea55e32024-08-15 04:57:44 +000098 TC_FPGA_FS_IMG_IN_RAM \
Vishnu Satheesh969b7592024-04-23 15:25:32 +010099 TC_FPGA_FIP_IMG_IN_RAM \
Jagdish Gediya1d2d96d2024-04-19 13:16:36 +0000100 TC_DPU_USE_SIMPLE_PANEL \
Boyan Karatoteva02bb362023-12-12 15:59:01 +0000101))
Olivier Deprez8597a8c2022-07-20 17:37:23 +0200102
Usama Arif6ec0c652021-04-09 17:07:41 +0100103CSS_LOAD_SCP_IMAGES := 1
104
Arvind Ram Prakashb87d7ab2024-05-07 10:33:46 -0500105# Save DSU PMU registers on cluster off and restore them on cluster on
106PRESERVE_DSU_PMU_REGS := 1
107
Manish V Badarkhef036dda2025-04-09 20:46:56 +0100108PLAT_MHU := MHUv3
Jackson Cooper-Driver04085d62024-03-11 09:23:17 +0000109
Usama Arif6ec0c652021-04-09 17:07:41 +0100110TC_BASE = plat/arm/board/tc
111
Boyan Karatotev3ac3b6b2023-12-20 16:28:23 +0000112PLAT_INCLUDES += -I${TC_BASE}/include/ \
113 -I${TC_BASE}/fdts/
Usama Arif6ec0c652021-04-09 17:07:41 +0100114
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000115# CPU libraries for TARGET_PLATFORM=3
116ifeq (${TARGET_PLATFORM}, 3)
Manish Pandey74dc8012024-08-12 15:40:22 +0100117ERRATA_A520_2938996 := 1
118
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000119TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
Govindraj Raja16aacab2024-05-17 13:35:19 -0500120 lib/cpus/aarch64/cortex_a725.S \
Govindraj Rajabbe94cd2024-05-17 13:39:07 -0500121 lib/cpus/aarch64/cortex_x925.S
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000122endif
123
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +0000124# CPU libraries for TARGET_PLATFORM=4
125ifeq (${TARGET_PLATFORM}, 4)
Boyan Karatotev2b5e00d2024-12-19 16:07:29 +0000126FEAT_PABANDON := 1
Boyan Karatotev45c73282024-09-20 13:37:51 +0100127# prevent CME related wakups
128ERRATA_SME_POWER_DOWN := 1
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +0000129TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \
130 lib/cpus/aarch64/nevis.S \
131 lib/cpus/aarch64/travis.S
132endif
133
Jagdish Gediya89c58a52024-02-02 06:01:44 +0000134INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \
135 plat/arm/common/arm_ni.c
Usama Arif6ec0c652021-04-09 17:07:41 +0100136
137PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
138 ${TC_BASE}/include/tc_helpers.S
139
Leo Yand1de6b22024-05-15 18:29:15 +0100140
141ifneq (${ENABLE_STACK_PROTECTOR},0)
142PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c
143endif
144
Usama Arif6ec0c652021-04-09 17:07:41 +0100145BL1_SOURCES += ${INTERCONNECT_SOURCES} \
146 ${TC_CPU_SOURCES} \
147 ${TC_BASE}/tc_trusted_boot.c \
Jackson Cooper-Driverf5ae5dc2024-06-10 14:54:06 +0100148 ${TC_BASE}/tc_bl1_setup.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100149 ${TC_BASE}/tc_err.c \
150 drivers/arm/sbsa/sbsa.c
151
Usama Arif6ec0c652021-04-09 17:07:41 +0100152BL2_SOURCES += ${TC_BASE}/tc_security.c \
153 ${TC_BASE}/tc_err.c \
154 ${TC_BASE}/tc_trusted_boot.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100155 ${TC_BASE}/tc_bl2_setup.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100156 lib/utils/mem_region.c \
157 drivers/arm/tzc/tzc400.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100158 plat/arm/common/arm_nor_psci_mem_protect.c
159
160BL31_SOURCES += ${INTERCONNECT_SOURCES} \
161 ${TC_CPU_SOURCES} \
Usama Arif6ec0c652021-04-09 17:07:41 +0100162 ${TC_BASE}/tc_bl31_setup.c \
163 ${TC_BASE}/tc_topology.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100164 lib/fconf/fconf.c \
165 lib/fconf/fconf_dyn_cfg_getter.c \
Arvind Ram Prakashd52ff2b2025-05-07 10:01:57 -0500166 drivers/arm/dsu/dsu.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100167 drivers/cfi/v2m/v2m_flash.c \
168 lib/utils/mem_region.c \
Madhukar Pappireddy28b2d862023-03-22 15:40:40 -0500169 plat/arm/common/arm_nor_psci_mem_protect.c \
170 drivers/arm/sbsa/sbsa.c
Usama Arif6ec0c652021-04-09 17:07:41 +0100171
Chris Kay1fa05da2021-09-28 15:52:14 +0100172BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
173
Usama Arif6ec0c652021-04-09 17:07:41 +0100174# Add the FDT_SOURCES and options for Dynamic Config
175FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
Tamas Ban1f47a712023-06-12 11:26:28 +0200176 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \
177 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100178FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
179TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Tamas Ban1f47a712023-06-12 11:26:28 +0200180FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Usama Arif6ec0c652021-04-09 17:07:41 +0100181
182# Add the FW_CONFIG to FIP and specify the same to certtool
183$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
184# Add the TB_FW_CONFIG to FIP and specify the same to certtool
185$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Tamas Ban1f47a712023-06-12 11:26:28 +0200186# Add the NT_FW_CONFIG to FIP and specify the same to certtool
187$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Usama Arif6ec0c652021-04-09 17:07:41 +0100188
189ifeq (${SPD},spmd)
190ifeq ($(ARM_SPMC_MANIFEST_DTS),)
Boyan Karatotev3ac3b6b2023-12-20 16:28:23 +0000191ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100192endif
193
194FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
195TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
196
197# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
198$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
199endif
200
201#Device tree
Leo Yanb3a97372024-04-14 08:27:39 +0100202TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100203TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
204FDT_SOURCES += ${TC_HW_CONFIG_DTS}
205$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
206
207# Add the HW_CONFIG to FIP and specify the same to certtool
208$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
209
Leo Yan0328f342024-05-21 16:33:01 +0000210$(info Including rse_comms.mk)
211include drivers/arm/rse/rse_comms.mk
212
Yann Gautier5b46aac2024-10-04 18:49:35 +0200213BL1_SOURCES += ${RSE_COMMS_SOURCES} \
214 plat/arm/board/tc/tc_rse_comms.c
215BL2_SOURCES += ${RSE_COMMS_SOURCES} \
216 plat/arm/board/tc/tc_rse_comms.c
Leo Yan8f0235f2025-01-31 10:20:28 +0000217BL31_SOURCES += ${RSE_COMMS_SOURCES} \
Yann Gautier5b46aac2024-10-04 18:49:35 +0200218 plat/arm/board/tc/tc_rse_comms.c \
Leo Yan8f0235f2025-01-31 10:20:28 +0000219 lib/psa/rse_platform.c
Leo Yan0328f342024-05-21 16:33:01 +0000220
Tamas Ban6cb5d322022-09-16 16:26:15 +0200221# Include Measured Boot makefile before any Crypto library makefile.
222# Crypto library makefile may need default definitions of Measured Boot build
223# flags present in Measured Boot makefile.
224ifeq (${MEASURED_BOOT},1)
Tamas Bane7f11812023-06-07 13:35:04 +0200225 ifeq (${DICE_PROTECTION_ENVIRONMENT},1)
226 $(info Including qcbor.mk)
Tamas Ban7f8589c2024-02-22 11:35:28 +0100227 include drivers/measured_boot/rse/qcbor.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200228 $(info Including dice_prot_env.mk)
Tamas Ban7f8589c2024-02-22 11:35:28 +0100229 include drivers/measured_boot/rse/dice_prot_env.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200230
231 BL1_SOURCES += ${QCBOR_SOURCES} \
232 ${DPE_SOURCES} \
233 plat/arm/board/tc/tc_common_dpe.c \
234 plat/arm/board/tc/tc_bl1_dpe.c \
Tamas Ban467bdf22023-06-07 14:18:46 +0200235 lib/psa/dice_protection_environment.c \
236 drivers/arm/css/sds/sds.c \
237 drivers/delay_timer/delay_timer.c \
238 drivers/delay_timer/generic_delay_timer.c
Tamas Bane7f11812023-06-07 13:35:04 +0200239
240 BL2_SOURCES += ${QCBOR_SOURCES} \
241 ${DPE_SOURCES} \
242 plat/arm/board/tc/tc_common_dpe.c \
243 plat/arm/board/tc/tc_bl2_dpe.c \
244 lib/psa/dice_protection_environment.c
245
246 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \
247 -Iinclude/lib/dice
248 else
Tamas Ban7f8589c2024-02-22 11:35:28 +0100249 $(info Including rse_measured_boot.mk)
250 include drivers/measured_boot/rse/rse_measured_boot.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200251
252 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Ban6cb5d322022-09-16 16:26:15 +0200253 plat/arm/board/tc/tc_common_measured_boot.c \
254 plat/arm/board/tc/tc_bl1_measured_boot.c \
Tamas Bane7f11812023-06-07 13:35:04 +0200255 lib/psa/measured_boot.c
Tamas Ban6cb5d322022-09-16 16:26:15 +0200256
Tamas Bane7f11812023-06-07 13:35:04 +0200257 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Ban6cb5d322022-09-16 16:26:15 +0200258 plat/arm/board/tc/tc_common_measured_boot.c \
259 plat/arm/board/tc/tc_bl2_measured_boot.c \
Tamas Bane7f11812023-06-07 13:35:04 +0200260 lib/psa/measured_boot.c
261 endif
Tamas Ban6cb5d322022-09-16 16:26:15 +0200262endif
263
Leo Yan2ae197a2024-05-16 15:59:41 +0100264BL31_SOURCES += plat/arm/board/tc/tc_trng.c
265
266ifneq (${ENABLE_FEAT_RNG_TRAP},0)
267 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c
David Vincze7be391d2024-01-04 18:37:12 +0100268endif
269
laurenw-arm6fbe11c2023-05-04 14:55:37 -0500270ifneq (${PLATFORM_TEST},)
laurenw-armc5ce48f2023-07-17 12:32:46 -0500271 # Add this include as first, before arm_common.mk. This is necessary
272 # because arm_common.mk builds Mbed TLS, and platform_test.mk can
273 # change the list of Mbed TLS files that are to be compiled
274 # (LIBMBEDTLS_SRCS).
275 include plat/arm/board/tc/platform_test.mk
laurenw-arm1b076112023-02-07 13:40:05 -0600276endif
277
Mate Toth-Pal25dd2172022-10-21 14:24:49 +0200278
Usama Arif6ec0c652021-04-09 17:07:41 +0100279include plat/arm/common/arm_common.mk
280include plat/arm/css/common/css_common.mk
Usama Arif6ec0c652021-04-09 17:07:41 +0100281include plat/arm/board/common/board_common.mk