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Boyan Karatotev2b5e00d2024-12-19 16:07:29 +00001# Copyright (c) 2021-2025, Arm Limited. All rights reserved.
Usama Arif6ec0c652021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kay1fa05da2021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Boyan Karatoteva02bb362023-12-12 15:59:01 +00008TARGET_FLAVOUR := fvp
Boyan Karatotev1b8ed092023-11-15 11:54:33 +00009# DPU with SCMI may not necessarily work, so allow its independence
10TC_DPU_USE_SCMI_CLK := 1
Kshitij Sisodiaa658b462023-11-22 17:03:45 +000011# SCMI power domain control enable
12TC_SCMI_PD_CTRL_EN := 1
Boyan Karatoteva02bb362023-12-12 15:59:01 +000013
Boyan Karatotev96a5f872023-12-27 15:49:18 +000014# System setup
15CSS_USE_SCMI_SDS_DRIVER := 1
16HW_ASSISTED_COHERENCY := 1
17USE_COHERENT_MEM := 0
Boyan Karatotevc5c54e22025-01-07 11:04:16 +000018USE_GIC_DRIVER := 3
Boyan Karatotev96a5f872023-12-27 15:49:18 +000019GIC_ENABLE_V4_EXTN := 1
20GICV3_SUPPORT_GIC600 := 1
21override NEED_BL2U := no
22override ARM_PLAT_MT := 1
23
24# CPU setup
25ARM_ARCH_MINOR := 7
26BRANCH_PROTECTION := 1
27ENABLE_FEAT_MPAM := 1 # default is 2, optimise
28ENABLE_SVE_FOR_NS := 2 # to show we use it
29ENABLE_SVE_FOR_SWD := 1
Jackson Cooper-Driver9face212024-01-08 09:53:04 +000030ENABLE_SME_FOR_NS := 2
31ENABLE_SME2_FOR_NS := 2
32ENABLE_SME_FOR_SWD := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000033ENABLE_TRBE_FOR_NS := 1
34ENABLE_SYS_REG_TRACE_FOR_NS := 1
35ENABLE_FEAT_AMU := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000036ENABLE_AMU_AUXILIARY_COUNTERS := 1
37ENABLE_MPMM := 1
Jayanth Dodderi Chidanand3e8a82a2024-09-02 15:54:23 +010038ENABLE_FEAT_MTE2 := 2
Manish Pandeyef738d12024-06-22 00:00:18 +010039ENABLE_SPE_FOR_NS := 2
40ENABLE_FEAT_TCR2 := 2
Boyan Karatotev96a5f872023-12-27 15:49:18 +000041
Leo Yan2ae197a2024-05-16 15:59:41 +010042ifneq ($(filter ${TARGET_PLATFORM}, 3),)
43ENABLE_FEAT_RNG_TRAP := 0
44else
45ENABLE_FEAT_RNG_TRAP := 1
46endif
47
Boyan Karatotev96a5f872023-12-27 15:49:18 +000048CTX_INCLUDE_AARCH32_REGS := 0
49
50ifeq (${SPD},spmd)
51 SPMD_SPM_AT_SEL2 := 1
Boyan Karatotev96a5f872023-12-27 15:49:18 +000052 CTX_INCLUDE_PAUTH_REGS := 1
53endif
54
Leo Yan2ae197a2024-05-16 15:59:41 +010055TRNG_SUPPORT := 1
56
Sergio Alvesdd5bf9c2023-12-06 15:24:44 +000057# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
58TC_RESOLUTION_OPTIONS := 640x480p60 \
59 1920x1080p60
60# Set default to the 640x480p60 resolution mode
61TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS))
62
63# Check resolution option for FVP
64ifneq ($(filter ${TARGET_FLAVOUR}, fvp),)
65ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),)
66 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS})
67endif
68endif
Boyan Karatotev96a5f872023-12-27 15:49:18 +000069
Manish V Badarkhef036dda2025-04-09 20:46:56 +010070ifneq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
Manish V Badarkhedf32faa2024-10-31 16:04:30 +000071 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.)
72endif
73
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +000074ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0)
75 $(error TARGET_PLATFORM must be less than or equal to 4)
Usama Arif6ec0c652021-04-09 17:07:41 +010076endif
77
Boyan Karatoteva02bb362023-12-12 15:59:01 +000078ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
79 $(error TARGET_FLAVOUR must be fvp or fpga)
80endif
81
Jagdish Gediyabea55e32024-08-15 04:57:44 +000082# Support for loading FS Image to DRAM
83TC_FPGA_FS_IMG_IN_RAM := 0
Vishnu Satheesh932e64a2024-04-23 15:08:08 +010084
Vishnu Satheesh969b7592024-04-23 15:25:32 +010085# Support Loading of FIP image to DRAM
86TC_FPGA_FIP_IMG_IN_RAM := 0
87
Jagdish Gediya1d2d96d2024-04-19 13:16:36 +000088# Use simple panel instead of vencoder with DPU
89TC_DPU_USE_SIMPLE_PANEL := 0
90
Boyan Karatoteva02bb362023-12-12 15:59:01 +000091$(eval $(call add_defines, \
92 TARGET_PLATFORM \
93 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
Sergio Alvesdd5bf9c2023-12-06 15:24:44 +000094 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
Boyan Karatotev1b8ed092023-11-15 11:54:33 +000095 TC_DPU_USE_SCMI_CLK \
Kshitij Sisodiaa658b462023-11-22 17:03:45 +000096 TC_SCMI_PD_CTRL_EN \
Jagdish Gediyabea55e32024-08-15 04:57:44 +000097 TC_FPGA_FS_IMG_IN_RAM \
Vishnu Satheesh969b7592024-04-23 15:25:32 +010098 TC_FPGA_FIP_IMG_IN_RAM \
Jagdish Gediya1d2d96d2024-04-19 13:16:36 +000099 TC_DPU_USE_SIMPLE_PANEL \
Boyan Karatoteva02bb362023-12-12 15:59:01 +0000100))
Olivier Deprez8597a8c2022-07-20 17:37:23 +0200101
Usama Arif6ec0c652021-04-09 17:07:41 +0100102CSS_LOAD_SCP_IMAGES := 1
103
Arvind Ram Prakashb87d7ab2024-05-07 10:33:46 -0500104# Save DSU PMU registers on cluster off and restore them on cluster on
105PRESERVE_DSU_PMU_REGS := 1
106
Manish V Badarkhef036dda2025-04-09 20:46:56 +0100107PLAT_MHU := MHUv3
Jackson Cooper-Driver04085d62024-03-11 09:23:17 +0000108
Usama Arif6ec0c652021-04-09 17:07:41 +0100109TC_BASE = plat/arm/board/tc
110
Boyan Karatotev3ac3b6b2023-12-20 16:28:23 +0000111PLAT_INCLUDES += -I${TC_BASE}/include/ \
112 -I${TC_BASE}/fdts/
Usama Arif6ec0c652021-04-09 17:07:41 +0100113
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000114# CPU libraries for TARGET_PLATFORM=3
115ifeq (${TARGET_PLATFORM}, 3)
Manish Pandey74dc8012024-08-12 15:40:22 +0100116ERRATA_A520_2938996 := 1
117
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000118TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
Govindraj Raja16aacab2024-05-17 13:35:19 -0500119 lib/cpus/aarch64/cortex_a725.S \
Govindraj Rajabbe94cd2024-05-17 13:39:07 -0500120 lib/cpus/aarch64/cortex_x925.S
Boyan Karatotev62320dc2023-07-07 13:33:19 +0000121endif
122
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +0000123# CPU libraries for TARGET_PLATFORM=4
124ifeq (${TARGET_PLATFORM}, 4)
Boyan Karatotev2b5e00d2024-12-19 16:07:29 +0000125FEAT_PABANDON := 1
Boyan Karatotev45c73282024-09-20 13:37:51 +0100126# prevent CME related wakups
127ERRATA_SME_POWER_DOWN := 1
Jackson Cooper-Drivere8e1b602023-12-14 14:32:40 +0000128TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \
129 lib/cpus/aarch64/nevis.S \
130 lib/cpus/aarch64/travis.S
131endif
132
Jagdish Gediya89c58a52024-02-02 06:01:44 +0000133INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \
134 plat/arm/common/arm_ni.c
Usama Arif6ec0c652021-04-09 17:07:41 +0100135
136PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
137 ${TC_BASE}/include/tc_helpers.S
138
Leo Yand1de6b22024-05-15 18:29:15 +0100139
140ifneq (${ENABLE_STACK_PROTECTOR},0)
141PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c
142endif
143
Usama Arif6ec0c652021-04-09 17:07:41 +0100144BL1_SOURCES += ${INTERCONNECT_SOURCES} \
145 ${TC_CPU_SOURCES} \
146 ${TC_BASE}/tc_trusted_boot.c \
Jackson Cooper-Driverf5ae5dc2024-06-10 14:54:06 +0100147 ${TC_BASE}/tc_bl1_setup.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100148 ${TC_BASE}/tc_err.c \
149 drivers/arm/sbsa/sbsa.c
150
Usama Arif6ec0c652021-04-09 17:07:41 +0100151BL2_SOURCES += ${TC_BASE}/tc_security.c \
152 ${TC_BASE}/tc_err.c \
153 ${TC_BASE}/tc_trusted_boot.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100154 ${TC_BASE}/tc_bl2_setup.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100155 lib/utils/mem_region.c \
156 drivers/arm/tzc/tzc400.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100157 plat/arm/common/arm_nor_psci_mem_protect.c
158
159BL31_SOURCES += ${INTERCONNECT_SOURCES} \
160 ${TC_CPU_SOURCES} \
Usama Arif6ec0c652021-04-09 17:07:41 +0100161 ${TC_BASE}/tc_bl31_setup.c \
162 ${TC_BASE}/tc_topology.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100163 lib/fconf/fconf.c \
164 lib/fconf/fconf_dyn_cfg_getter.c \
Arvind Ram Prakashb87d7ab2024-05-07 10:33:46 -0500165 drivers/arm/css/dsu/dsu.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100166 drivers/cfi/v2m/v2m_flash.c \
167 lib/utils/mem_region.c \
Madhukar Pappireddy28b2d862023-03-22 15:40:40 -0500168 plat/arm/common/arm_nor_psci_mem_protect.c \
169 drivers/arm/sbsa/sbsa.c
Usama Arif6ec0c652021-04-09 17:07:41 +0100170
Chris Kay1fa05da2021-09-28 15:52:14 +0100171BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
172
Usama Arif6ec0c652021-04-09 17:07:41 +0100173# Add the FDT_SOURCES and options for Dynamic Config
174FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
Tamas Ban1f47a712023-06-12 11:26:28 +0200175 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \
176 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100177FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
178TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Tamas Ban1f47a712023-06-12 11:26:28 +0200179FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Usama Arif6ec0c652021-04-09 17:07:41 +0100180
181# Add the FW_CONFIG to FIP and specify the same to certtool
182$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
183# Add the TB_FW_CONFIG to FIP and specify the same to certtool
184$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Tamas Ban1f47a712023-06-12 11:26:28 +0200185# Add the NT_FW_CONFIG to FIP and specify the same to certtool
186$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Usama Arif6ec0c652021-04-09 17:07:41 +0100187
188ifeq (${SPD},spmd)
189ifeq ($(ARM_SPMC_MANIFEST_DTS),)
Boyan Karatotev3ac3b6b2023-12-20 16:28:23 +0000190ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100191endif
192
193FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
194TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
195
196# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
197$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
198endif
199
200#Device tree
Leo Yanb3a97372024-04-14 08:27:39 +0100201TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts
Usama Arif6ec0c652021-04-09 17:07:41 +0100202TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
203FDT_SOURCES += ${TC_HW_CONFIG_DTS}
204$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
205
206# Add the HW_CONFIG to FIP and specify the same to certtool
207$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
208
Leo Yan0328f342024-05-21 16:33:01 +0000209$(info Including rse_comms.mk)
210include drivers/arm/rse/rse_comms.mk
211
Yann Gautier5b46aac2024-10-04 18:49:35 +0200212BL1_SOURCES += ${RSE_COMMS_SOURCES} \
213 plat/arm/board/tc/tc_rse_comms.c
214BL2_SOURCES += ${RSE_COMMS_SOURCES} \
215 plat/arm/board/tc/tc_rse_comms.c
Leo Yan8f0235f2025-01-31 10:20:28 +0000216BL31_SOURCES += ${RSE_COMMS_SOURCES} \
Yann Gautier5b46aac2024-10-04 18:49:35 +0200217 plat/arm/board/tc/tc_rse_comms.c \
Leo Yan8f0235f2025-01-31 10:20:28 +0000218 lib/psa/rse_platform.c
Leo Yan0328f342024-05-21 16:33:01 +0000219
Tamas Ban6cb5d322022-09-16 16:26:15 +0200220# Include Measured Boot makefile before any Crypto library makefile.
221# Crypto library makefile may need default definitions of Measured Boot build
222# flags present in Measured Boot makefile.
223ifeq (${MEASURED_BOOT},1)
Tamas Bane7f11812023-06-07 13:35:04 +0200224 ifeq (${DICE_PROTECTION_ENVIRONMENT},1)
225 $(info Including qcbor.mk)
Tamas Ban7f8589c2024-02-22 11:35:28 +0100226 include drivers/measured_boot/rse/qcbor.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200227 $(info Including dice_prot_env.mk)
Tamas Ban7f8589c2024-02-22 11:35:28 +0100228 include drivers/measured_boot/rse/dice_prot_env.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200229
230 BL1_SOURCES += ${QCBOR_SOURCES} \
231 ${DPE_SOURCES} \
232 plat/arm/board/tc/tc_common_dpe.c \
233 plat/arm/board/tc/tc_bl1_dpe.c \
Tamas Ban467bdf22023-06-07 14:18:46 +0200234 lib/psa/dice_protection_environment.c \
235 drivers/arm/css/sds/sds.c \
236 drivers/delay_timer/delay_timer.c \
237 drivers/delay_timer/generic_delay_timer.c
Tamas Bane7f11812023-06-07 13:35:04 +0200238
239 BL2_SOURCES += ${QCBOR_SOURCES} \
240 ${DPE_SOURCES} \
241 plat/arm/board/tc/tc_common_dpe.c \
242 plat/arm/board/tc/tc_bl2_dpe.c \
243 lib/psa/dice_protection_environment.c
244
245 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \
246 -Iinclude/lib/dice
247 else
Tamas Ban7f8589c2024-02-22 11:35:28 +0100248 $(info Including rse_measured_boot.mk)
249 include drivers/measured_boot/rse/rse_measured_boot.mk
Tamas Bane7f11812023-06-07 13:35:04 +0200250
251 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Ban6cb5d322022-09-16 16:26:15 +0200252 plat/arm/board/tc/tc_common_measured_boot.c \
253 plat/arm/board/tc/tc_bl1_measured_boot.c \
Tamas Bane7f11812023-06-07 13:35:04 +0200254 lib/psa/measured_boot.c
Tamas Ban6cb5d322022-09-16 16:26:15 +0200255
Tamas Bane7f11812023-06-07 13:35:04 +0200256 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Ban6cb5d322022-09-16 16:26:15 +0200257 plat/arm/board/tc/tc_common_measured_boot.c \
258 plat/arm/board/tc/tc_bl2_measured_boot.c \
Tamas Bane7f11812023-06-07 13:35:04 +0200259 lib/psa/measured_boot.c
260 endif
Tamas Ban6cb5d322022-09-16 16:26:15 +0200261endif
262
Leo Yan2ae197a2024-05-16 15:59:41 +0100263BL31_SOURCES += plat/arm/board/tc/tc_trng.c
264
265ifneq (${ENABLE_FEAT_RNG_TRAP},0)
266 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c
David Vincze7be391d2024-01-04 18:37:12 +0100267endif
268
laurenw-arm6fbe11c2023-05-04 14:55:37 -0500269ifneq (${PLATFORM_TEST},)
laurenw-armc5ce48f2023-07-17 12:32:46 -0500270 # Add this include as first, before arm_common.mk. This is necessary
271 # because arm_common.mk builds Mbed TLS, and platform_test.mk can
272 # change the list of Mbed TLS files that are to be compiled
273 # (LIBMBEDTLS_SRCS).
274 include plat/arm/board/tc/platform_test.mk
laurenw-arm1b076112023-02-07 13:40:05 -0600275endif
276
Mate Toth-Pal25dd2172022-10-21 14:24:49 +0200277
Usama Arif6ec0c652021-04-09 17:07:41 +0100278include plat/arm/common/arm_common.mk
279include plat/arm/css/common/css_common.mk
Usama Arif6ec0c652021-04-09 17:07:41 +0100280include plat/arm/board/common/board_common.mk