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review.trustedfirmware.org / TF-A / tf-a-tests.git / c6a3abf980d69e59c08a66a0f4743958c1de6092 / . / include / drivers / arm / arm_gic.h
blob: 528ec6ec6e8c2631a5d4daab616e9788e298a435 [file] [log] [blame]
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]1/*
2 * Copyright (c) 2018, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __ARM_GIC_H__
8#define __ARM_GIC_H__
9
Madhukar Pappireddyc6a3abf2023-10-25 16:47:23 -0500[diff] [blame^]10#include <stdbool.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]11#include <stdint.h>
12
13/***************************************************************************
14 * Defines and prototypes for ARM GIC driver.
15 **************************************************************************/
16#define MAX_SGIS 16
17#define MIN_SGI_ID 0
18#define MAX_SGI_ID 15
19#define MIN_PPI_ID 16
20#define MAX_PPI_ID 31
21#define MIN_SPI_ID 32
Deepika Bhavnani73e5cb42020-02-06 17:15:23 -0600[diff] [blame]22#define MAX_SPI_ID 1019
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]23
24#define IS_SGI(irq_num) \
25 (((irq_num) >= MIN_SGI_ID) && ((irq_num) <= MAX_SGI_ID))
26
27#define IS_PPI(irq_num) \
28 (((irq_num) >= MIN_PPI_ID) && ((irq_num) <= MAX_PPI_ID))
29
30#define IS_SPI(irq_num) \
31 (((irq_num) >= MIN_SPI_ID) && ((irq_num) <= MAX_SPI_ID))
32
33#define IS_VALID_INTR_ID(irq_num) \
34 (((irq_num) >= MIN_SGI_ID) && ((irq_num) <= MAX_SPI_ID))
35
36#define GIC_HIGHEST_NS_PRIORITY 0
37#define GIC_LOWEST_NS_PRIORITY 254 /* 255 would disable an interrupt */
38#define GIC_SPURIOUS_INTERRUPT 1023
39
40/******************************************************************************
41 * Setup the global GIC interface. In case of GICv2, it would be the GIC
42 * Distributor and in case of GICv3 it would be GIC Distributor and
43 * Re-distributor.
44 *****************************************************************************/
45void arm_gic_setup_global(void);
46
47/******************************************************************************
48 * Setup the GIC interface local to the CPU
49 *****************************************************************************/
50void arm_gic_setup_local(void);
51
52/******************************************************************************
53 * Disable interrupts for this local CPU
54 *****************************************************************************/
55void arm_gic_disable_interrupts_local(void);
56
57/******************************************************************************
58 * Enable interrupts for this local CPU
59 *****************************************************************************/
60void arm_gic_enable_interrupts_local(void);
61
62/******************************************************************************
63 * Send SGI with ID `sgi_id` to a core with index `core_pos`.
64 *****************************************************************************/
65void arm_gic_send_sgi(unsigned int sgi_id, unsigned int core_pos);
66
67/******************************************************************************
68 * Set the interrupt target of interrupt ID `num` to a core with index
69 * `core_pos`
70 *****************************************************************************/
71void arm_gic_set_intr_target(unsigned int num, unsigned int core_pos);
72
73/******************************************************************************
74 * Get the priority of the interrupt ID `num`.
75 *****************************************************************************/
76unsigned int arm_gic_get_intr_priority(unsigned int num);
77
78/******************************************************************************
79 * Set the priority of the interrupt ID `num` to `priority`.
80 *****************************************************************************/
81void arm_gic_set_intr_priority(unsigned int num, unsigned int priority);
82
83/******************************************************************************
84 * Check if the interrupt ID `num` is enabled
85 *****************************************************************************/
86unsigned int arm_gic_intr_enabled(unsigned int num);
87
88/******************************************************************************
89 * Enable the interrupt ID `num`
90 *****************************************************************************/
91void arm_gic_intr_enable(unsigned int num);
92
93/******************************************************************************
94 * Disable the interrupt ID `num`
95 *****************************************************************************/
96void arm_gic_intr_disable(unsigned int num);
97
98/******************************************************************************
99 * Acknowledge the highest pending interrupt. Return the interrupt ID of the
100 * acknowledged interrupt. The raw interrupt acknowledge register value will
101 * be populated in `raw_iar`.
102 *****************************************************************************/
103unsigned int arm_gic_intr_ack(unsigned int *raw_iar);
104
105/******************************************************************************
106 * Signal the end of interrupt processing of a interrupt. The raw interrupt
107 * acknowledge register value returned by arm_gic_intr_ack() should be passed
108 * as argument to this function.
109 *****************************************************************************/
110void arm_gic_end_of_intr(unsigned int raw_iar);
111
112/******************************************************************************
113 * Check if the interrupt with ID `num` is pending at the GIC. Returns 1 if
114 * interrupt is pending else returns 0.
115 *****************************************************************************/
116unsigned int arm_gic_is_intr_pending(unsigned int num);
117
118/******************************************************************************
119 * Clear the pending status of the interrupt with ID `num` at the GIC.
120 *****************************************************************************/
121void arm_gic_intr_clear(unsigned int num);
122
123/******************************************************************************
124 * Initialize the GIC Driver. This function will detect the GIC Architecture
125 * present on the system and initialize the appropriate driver. The
126 * `gicr_base` argument will be ignored on GICv2 systems.
127 *****************************************************************************/
128void arm_gic_init(uintptr_t gicc_base, uintptr_t gicd_base, uintptr_t gicr_base);
129
130/******************************************************************************
131 * Save the GIC context local to this CPU (like GIC CPU Interface) which will
132 * be lost when this CPU is powered down.
133 *****************************************************************************/
134void arm_gic_save_context_local(void);
135
136/******************************************************************************
137 * Restore the GIC context local to this CPU ((like GIC CPU Interface) which
138 * was lost when this CPU was powered down.
139 *****************************************************************************/
140void arm_gic_restore_context_local(void);
141
142/******************************************************************************
143 * Save the global GIC context when GIC will be powered down (like GIC
144 * Distributor and Re-distributor) as a result of system suspend.
145 *****************************************************************************/
146void arm_gic_save_context_global(void);
147
148/******************************************************************************
149 * Restore the global GIC context which was lost as a result of GIC power
150 * down (like GIC Distributor and Re-distributor) during system suspend.
151 *****************************************************************************/
152void arm_gic_restore_context_global(void);
153
Madhukar Pappireddyc6a3abf2023-10-25 16:47:23 -0500[diff] [blame^]154/******************************************************************************
155 * Check if extended SPI range is implemented by GIC.
156 *****************************************************************************/
157bool arm_gic_is_espi_supported(void);
158
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]159#endif /* __ARM_GIC_H__ */