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review.trustedfirmware.org / TF-A / tf-a-tests.git / 73e5cb494d3d49ba05ecb3fc9707544e29e50c89 / . / include / drivers / arm / arm_gic.h
blob: 0f27dc1ca5c04e3faf87321626e4363b7e506af1 [file] [log] [blame]
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]1/*
2 * Copyright (c) 2018, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __ARM_GIC_H__
8#define __ARM_GIC_H__
9
10#include <stdint.h>
11
12/***************************************************************************
13 * Defines and prototypes for ARM GIC driver.
14 **************************************************************************/
15#define MAX_SGIS 16
16#define MIN_SGI_ID 0
17#define MAX_SGI_ID 15
18#define MIN_PPI_ID 16
19#define MAX_PPI_ID 31
20#define MIN_SPI_ID 32
Deepika Bhavnani73e5cb42020-02-06 17:15:23 -0600[diff] [blame^]21#define MAX_SPI_ID 1019
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200[diff] [blame]22
23#define IS_SGI(irq_num) \
24 (((irq_num) >= MIN_SGI_ID) && ((irq_num) <= MAX_SGI_ID))
25
26#define IS_PPI(irq_num) \
27 (((irq_num) >= MIN_PPI_ID) && ((irq_num) <= MAX_PPI_ID))
28
29#define IS_SPI(irq_num) \
30 (((irq_num) >= MIN_SPI_ID) && ((irq_num) <= MAX_SPI_ID))
31
32#define IS_VALID_INTR_ID(irq_num) \
33 (((irq_num) >= MIN_SGI_ID) && ((irq_num) <= MAX_SPI_ID))
34
35#define GIC_HIGHEST_NS_PRIORITY 0
36#define GIC_LOWEST_NS_PRIORITY 254 /* 255 would disable an interrupt */
37#define GIC_SPURIOUS_INTERRUPT 1023
38
39/******************************************************************************
40 * Setup the global GIC interface. In case of GICv2, it would be the GIC
41 * Distributor and in case of GICv3 it would be GIC Distributor and
42 * Re-distributor.
43 *****************************************************************************/
44void arm_gic_setup_global(void);
45
46/******************************************************************************
47 * Setup the GIC interface local to the CPU
48 *****************************************************************************/
49void arm_gic_setup_local(void);
50
51/******************************************************************************
52 * Disable interrupts for this local CPU
53 *****************************************************************************/
54void arm_gic_disable_interrupts_local(void);
55
56/******************************************************************************
57 * Enable interrupts for this local CPU
58 *****************************************************************************/
59void arm_gic_enable_interrupts_local(void);
60
61/******************************************************************************
62 * Send SGI with ID `sgi_id` to a core with index `core_pos`.
63 *****************************************************************************/
64void arm_gic_send_sgi(unsigned int sgi_id, unsigned int core_pos);
65
66/******************************************************************************
67 * Set the interrupt target of interrupt ID `num` to a core with index
68 * `core_pos`
69 *****************************************************************************/
70void arm_gic_set_intr_target(unsigned int num, unsigned int core_pos);
71
72/******************************************************************************
73 * Get the priority of the interrupt ID `num`.
74 *****************************************************************************/
75unsigned int arm_gic_get_intr_priority(unsigned int num);
76
77/******************************************************************************
78 * Set the priority of the interrupt ID `num` to `priority`.
79 *****************************************************************************/
80void arm_gic_set_intr_priority(unsigned int num, unsigned int priority);
81
82/******************************************************************************
83 * Check if the interrupt ID `num` is enabled
84 *****************************************************************************/
85unsigned int arm_gic_intr_enabled(unsigned int num);
86
87/******************************************************************************
88 * Enable the interrupt ID `num`
89 *****************************************************************************/
90void arm_gic_intr_enable(unsigned int num);
91
92/******************************************************************************
93 * Disable the interrupt ID `num`
94 *****************************************************************************/
95void arm_gic_intr_disable(unsigned int num);
96
97/******************************************************************************
98 * Acknowledge the highest pending interrupt. Return the interrupt ID of the
99 * acknowledged interrupt. The raw interrupt acknowledge register value will
100 * be populated in `raw_iar`.
101 *****************************************************************************/
102unsigned int arm_gic_intr_ack(unsigned int *raw_iar);
103
104/******************************************************************************
105 * Signal the end of interrupt processing of a interrupt. The raw interrupt
106 * acknowledge register value returned by arm_gic_intr_ack() should be passed
107 * as argument to this function.
108 *****************************************************************************/
109void arm_gic_end_of_intr(unsigned int raw_iar);
110
111/******************************************************************************
112 * Check if the interrupt with ID `num` is pending at the GIC. Returns 1 if
113 * interrupt is pending else returns 0.
114 *****************************************************************************/
115unsigned int arm_gic_is_intr_pending(unsigned int num);
116
117/******************************************************************************
118 * Clear the pending status of the interrupt with ID `num` at the GIC.
119 *****************************************************************************/
120void arm_gic_intr_clear(unsigned int num);
121
122/******************************************************************************
123 * Initialize the GIC Driver. This function will detect the GIC Architecture
124 * present on the system and initialize the appropriate driver. The
125 * `gicr_base` argument will be ignored on GICv2 systems.
126 *****************************************************************************/
127void arm_gic_init(uintptr_t gicc_base, uintptr_t gicd_base, uintptr_t gicr_base);
128
129/******************************************************************************
130 * Save the GIC context local to this CPU (like GIC CPU Interface) which will
131 * be lost when this CPU is powered down.
132 *****************************************************************************/
133void arm_gic_save_context_local(void);
134
135/******************************************************************************
136 * Restore the GIC context local to this CPU ((like GIC CPU Interface) which
137 * was lost when this CPU was powered down.
138 *****************************************************************************/
139void arm_gic_restore_context_local(void);
140
141/******************************************************************************
142 * Save the global GIC context when GIC will be powered down (like GIC
143 * Distributor and Re-distributor) as a result of system suspend.
144 *****************************************************************************/
145void arm_gic_save_context_global(void);
146
147/******************************************************************************
148 * Restore the global GIC context which was lost as a result of GIC power
149 * down (like GIC Distributor and Re-distributor) during system suspend.
150 *****************************************************************************/
151void arm_gic_restore_context_global(void);
152
153#endif /* __ARM_GIC_H__ */