Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 1 | /* |
Boyan Karatotev | aa22f41 | 2025-05-21 13:25:40 +0100 | [diff] [blame^] | 2 | * Copyright (c) 2018-2025, Arm Limited. All rights reserved. |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __SUSPEND_PRIV_H__ |
| 8 | #define __SUSPEND_PRIV_H__ |
| 9 | |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 10 | /* |
| 11 | * Number of system registers we need to save/restore across a CPU suspend: |
Arunachalam Ganapathy | 92f1868 | 2023-09-02 01:41:28 +0100 | [diff] [blame] | 12 | * EL1: MAIR, CPACR, TTBR0, TCR, VBAR, SCTLR |
Jing Han | e538be6 | 2024-04-17 13:39:10 +0000 | [diff] [blame] | 13 | * EL2: MAIR, CPTR, TTBR0, TCR, VBAR, SCTLR, HCR, SMCR |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 14 | * APIAKeyLo_EL1 and APIAKeyHi_EL1 (if enabled). |
Jing Han | e538be6 | 2024-04-17 13:39:10 +0000 | [diff] [blame] | 15 | * On need basis other registers can be included in tftf_suspend_context. |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 16 | */ |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 17 | #if ENABLE_PAUTH |
Arunachalam Ganapathy | 92f1868 | 2023-09-02 01:41:28 +0100 | [diff] [blame] | 18 | #define NR_CTX_REGS 10 |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 19 | #else |
Arunachalam Ganapathy | 92f1868 | 2023-09-02 01:41:28 +0100 | [diff] [blame] | 20 | #define NR_CTX_REGS 8 |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 21 | #endif |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 22 | |
| 23 | /* Offsets of the fields in the context structure. Needed by asm code. */ |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 24 | #define SUSPEND_CTX_MAIR_OFFSET 0 |
| 25 | #define SUSPEND_CTX_TTBR0_OFFSET 16 |
| 26 | #define SUSPEND_CTX_VBAR_OFFSET 32 |
Arunachalam Ganapathy | 92f1868 | 2023-09-02 01:41:28 +0100 | [diff] [blame] | 27 | #define SUSPEND_CTX_HCR_OFFSET 48 |
Boyan Karatotev | aa22f41 | 2025-05-21 13:25:40 +0100 | [diff] [blame^] | 28 | #define SUSPEND_CTX_SMCR_OFFSET 56 |
Arunachalam Ganapathy | 92f1868 | 2023-09-02 01:41:28 +0100 | [diff] [blame] | 29 | #define SUSPEND_CTX_APIAKEY_OFFSET 64 |
Alexei Fedorov | 719714f | 2019-10-03 10:57:53 +0100 | [diff] [blame] | 30 | |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 31 | #define SUSPEND_CTX_SP_OFFSET (8 * NR_CTX_REGS) |
| 32 | #define SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET (SUSPEND_CTX_SP_OFFSET + 8) |
| 33 | |
| 34 | /* |
| 35 | * Size of the context structure. |
| 36 | * +8 because of the padding bytes inserted for alignment constraint. |
| 37 | */ |
| 38 | #define SUSPEND_CTX_SZ (SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET + 8) |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 39 | |
| 40 | #ifndef __ASSEMBLY__ |
| 41 | #include <cassert.h> |
| 42 | #include <power_management.h> |
| 43 | #include <stdint.h> |
| 44 | #include <string.h> |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 45 | |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 46 | /* |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 47 | * Architectural context to be saved/restored when entering/exiting suspend |
| 48 | * mode. |
| 49 | * |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 50 | * It must be 16-byte aligned since it is allocated on the stack, which must be |
| 51 | * 16-byte aligned on ARMv8 (AArch64). Even though the alignment requirement |
| 52 | * is not present in AArch32, we use the same alignment and register width as |
| 53 | * it allows the same structure to be reused for AArch32. |
| 54 | */ |
| 55 | typedef struct tftf_suspend_context { |
| 56 | uint64_t arch_ctx_regs[NR_CTX_REGS]; |
| 57 | uint64_t stack_pointer; |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 58 | |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 59 | /* |
| 60 | * Whether the system context is saved and and needs to be restored. |
| 61 | * Note that the system context itself is not saved in this structure. |
| 62 | */ |
| 63 | unsigned int save_system_context; |
| 64 | } __aligned(16) tftf_suspend_ctx_t; |
| 65 | |
| 66 | /* |
Sandrine Bailleux | 49180a8 | 2019-03-07 16:35:48 +0100 | [diff] [blame] | 67 | * Ensure consistent view of the context structure layout across asm and C |
| 68 | * code. |
| 69 | */ |
| 70 | CASSERT(SUSPEND_CTX_SZ == sizeof(tftf_suspend_ctx_t), |
| 71 | assert_suspend_context_size_mismatch); |
| 72 | |
| 73 | CASSERT(SUSPEND_CTX_SP_OFFSET == |
| 74 | __builtin_offsetof(tftf_suspend_ctx_t, stack_pointer), |
| 75 | assert_stack_pointer_location_mismatch_in_suspend_ctx); |
| 76 | |
| 77 | CASSERT(SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET == |
| 78 | __builtin_offsetof(tftf_suspend_ctx_t, save_system_context), |
| 79 | assert_save_sys_ctx_mismatch_in_suspend_ctx); |
| 80 | |
| 81 | /* |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 82 | * Saves callee save registers on the stack |
| 83 | * Allocate space on stack for CPU context regs |
| 84 | * Enters suspend by calling tftf_enter_suspend. |
| 85 | * power state: PSCI power state to be sent via SMC |
| 86 | * Returns: PSCI_E_SUCCESS or PSCI_E_INVALID_PARAMS |
| 87 | */ |
| 88 | unsigned int __tftf_suspend(const suspend_info_t *power_state); |
| 89 | |
| 90 | /* |
| 91 | * Saves the architecture context of CPU in the memory |
| 92 | * tftf_suspend_context: Pointer to the location for saving the context |
| 93 | */ |
| 94 | void __tftf_save_arch_context(struct tftf_suspend_context *ctx); |
| 95 | |
| 96 | /* |
| 97 | * Calls __tftf_save_arch_context to saves arch context of cpu to the memory |
| 98 | * pointed by ctx |
| 99 | * Enters suspend by calling the SMC |
| 100 | * power state: PSCI power state to be sent via SMC |
| 101 | * ctx: Pointer to the location where suspend context can be stored |
| 102 | * Returns: PSCI_E_SUCCESS or PSCI_E_INVALID_PARAMS |
| 103 | */ |
| 104 | int32_t tftf_enter_suspend(const suspend_info_t *power_state, |
| 105 | tftf_suspend_ctx_t *ctx); |
| 106 | |
| 107 | /* |
| 108 | * Invokes the appropriate driver functions in the TFTF framework |
| 109 | * to save their context prior to a system suspend. |
| 110 | */ |
| 111 | void tftf_save_system_ctx(tftf_suspend_ctx_t *ctx); |
| 112 | |
| 113 | /* |
| 114 | * Invokes the appropriate driver functions in the TFTF framework |
| 115 | * to restore their context on wake-up from system suspend. |
| 116 | */ |
| 117 | void tftf_restore_system_ctx(tftf_suspend_ctx_t *ctx); |
| 118 | |
| 119 | /* |
| 120 | * Restores the CPU arch context and callee registers from the location pointed |
| 121 | * by X0(context ID). |
| 122 | * Returns: PSCI_E_SUCCESS |
| 123 | */ |
| 124 | unsigned int __tftf_cpu_resume_ep(void); |
| 125 | |
Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame] | 126 | #endif /* __ASSEMBLY__ */ |
| 127 | |
| 128 | #endif /* __SUSPEND_PRIV_H__ */ |