blob: bc2f3a60020a9264052c8f2edc3a0fa7b1d260a2 [file] [log] [blame]
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001/*
Sandrine Bailleux49180a82019-03-07 16:35:48 +01002 * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __SUSPEND_PRIV_H__
8#define __SUSPEND_PRIV_H__
9
Sandrine Bailleux49180a82019-03-07 16:35:48 +010010/*
11 * Number of system registers we need to save/restore across a CPU suspend:
Alexei Fedorov719714f2019-10-03 10:57:53 +010012 * MAIR, CPACR_EL1/HCR_EL2, TTBR0, TCR, VBAR, SCTLR,
13 * APIAKeyLo_EL1 and APIAKeyHi_EL1 (if enabled).
Sandrine Bailleux49180a82019-03-07 16:35:48 +010014 */
Alexei Fedorov719714f2019-10-03 10:57:53 +010015#if ENABLE_PAUTH
16#define NR_CTX_REGS 8
17#else
Sandrine Bailleux49180a82019-03-07 16:35:48 +010018#define NR_CTX_REGS 6
Alexei Fedorov719714f2019-10-03 10:57:53 +010019#endif
Sandrine Bailleux49180a82019-03-07 16:35:48 +010020
21/* Offsets of the fields in the context structure. Needed by asm code. */
Alexei Fedorov719714f2019-10-03 10:57:53 +010022#define SUSPEND_CTX_MAIR_OFFSET 0
23#define SUSPEND_CTX_TTBR0_OFFSET 16
24#define SUSPEND_CTX_VBAR_OFFSET 32
25#define SUSPEND_CTX_APIAKEY_OFFSET 48
26
Sandrine Bailleux49180a82019-03-07 16:35:48 +010027#define SUSPEND_CTX_SP_OFFSET (8 * NR_CTX_REGS)
28#define SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET (SUSPEND_CTX_SP_OFFSET + 8)
29
30/*
31 * Size of the context structure.
32 * +8 because of the padding bytes inserted for alignment constraint.
33 */
34#define SUSPEND_CTX_SZ (SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET + 8)
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020035
36#ifndef __ASSEMBLY__
37#include <cassert.h>
38#include <power_management.h>
39#include <stdint.h>
40#include <string.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020041
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020042/*
Sandrine Bailleux49180a82019-03-07 16:35:48 +010043 * Architectural context to be saved/restored when entering/exiting suspend
44 * mode.
45 *
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020046 * It must be 16-byte aligned since it is allocated on the stack, which must be
47 * 16-byte aligned on ARMv8 (AArch64). Even though the alignment requirement
48 * is not present in AArch32, we use the same alignment and register width as
49 * it allows the same structure to be reused for AArch32.
50 */
51typedef struct tftf_suspend_context {
52 uint64_t arch_ctx_regs[NR_CTX_REGS];
53 uint64_t stack_pointer;
Sandrine Bailleux49180a82019-03-07 16:35:48 +010054
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020055 /*
56 * Whether the system context is saved and and needs to be restored.
57 * Note that the system context itself is not saved in this structure.
58 */
59 unsigned int save_system_context;
60} __aligned(16) tftf_suspend_ctx_t;
61
62/*
Sandrine Bailleux49180a82019-03-07 16:35:48 +010063 * Ensure consistent view of the context structure layout across asm and C
64 * code.
65 */
66CASSERT(SUSPEND_CTX_SZ == sizeof(tftf_suspend_ctx_t),
67 assert_suspend_context_size_mismatch);
68
69CASSERT(SUSPEND_CTX_SP_OFFSET ==
70 __builtin_offsetof(tftf_suspend_ctx_t, stack_pointer),
71 assert_stack_pointer_location_mismatch_in_suspend_ctx);
72
73CASSERT(SUSPEND_CTX_SAVE_SYSTEM_CTX_OFFSET ==
74 __builtin_offsetof(tftf_suspend_ctx_t, save_system_context),
75 assert_save_sys_ctx_mismatch_in_suspend_ctx);
76
77/*
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020078 * Saves callee save registers on the stack
79 * Allocate space on stack for CPU context regs
80 * Enters suspend by calling tftf_enter_suspend.
81 * power state: PSCI power state to be sent via SMC
82 * Returns: PSCI_E_SUCCESS or PSCI_E_INVALID_PARAMS
83 */
84unsigned int __tftf_suspend(const suspend_info_t *power_state);
85
86/*
87 * Saves the architecture context of CPU in the memory
88 * tftf_suspend_context: Pointer to the location for saving the context
89 */
90void __tftf_save_arch_context(struct tftf_suspend_context *ctx);
91
92/*
93 * Calls __tftf_save_arch_context to saves arch context of cpu to the memory
94 * pointed by ctx
95 * Enters suspend by calling the SMC
96 * power state: PSCI power state to be sent via SMC
97 * ctx: Pointer to the location where suspend context can be stored
98 * Returns: PSCI_E_SUCCESS or PSCI_E_INVALID_PARAMS
99 */
100int32_t tftf_enter_suspend(const suspend_info_t *power_state,
101 tftf_suspend_ctx_t *ctx);
102
103/*
104 * Invokes the appropriate driver functions in the TFTF framework
105 * to save their context prior to a system suspend.
106 */
107void tftf_save_system_ctx(tftf_suspend_ctx_t *ctx);
108
109/*
110 * Invokes the appropriate driver functions in the TFTF framework
111 * to restore their context on wake-up from system suspend.
112 */
113void tftf_restore_system_ctx(tftf_suspend_ctx_t *ctx);
114
115/*
116 * Restores the CPU arch context and callee registers from the location pointed
117 * by X0(context ID).
118 * Returns: PSCI_E_SUCCESS
119 */
120unsigned int __tftf_cpu_resume_ep(void);
121
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200122#endif /* __ASSEMBLY__ */
123
124#endif /* __SUSPEND_PRIV_H__ */