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Sandrine Bailleux01b916b2014-07-17 16:06:39 +01001#
Boyan Karatotevc5c54e22025-01-07 11:04:16 +00002# Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
Sandrine Bailleux01b916b2014-07-17 16:06:39 +01003#
dp-arm82cb2c12017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Sandrine Bailleux01b916b2014-07-17 16:06:39 +01005#
6
Chris Kay1fa05da2021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Boyan Karatotevc5c54e22025-01-07 11:04:16 +00009USE_GIC_DRIVER := 2
Achin Gupta27573c52015-11-03 14:18:34 +000010
Vikram Kanigiri6355f232016-02-15 11:54:14 +000011JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
12 plat/arm/common/arm_cci.c
13
Soby Mathew57f78202016-02-26 14:23:19 +000014JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +000015 plat/arm/board/juno/juno_security.c \
dp-armdf9a39e2017-02-27 12:21:43 +000016 plat/arm/board/juno/juno_trng.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +000017 plat/arm/common/arm_tzc400.c
18
dp-arme6d2aea2017-02-28 14:43:15 +000019ifneq (${ENABLE_STACK_PROTECTOR}, 0)
20JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
21endif
Vikram Kanigiri6355f232016-02-15 11:54:14 +000022
Sathees Balya4da6f6c2018-09-03 17:41:13 +010023# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
24# SCP during power management operations and for SCP RAM Firmware transfer.
25CSS_USE_SCMI_SDS_DRIVER := 1
26
Antonio Nino Diaz5932d192019-01-23 19:06:55 +000027PLAT_INCLUDES := -Iplat/arm/board/juno/include
Juan Castillo740134e2014-09-05 17:29:38 +010028
Antonio Nino Diaz58ea77a2018-10-10 11:02:34 +010029PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
30 plat/arm/board/juno/juno_common.c
Juan Castillo740134e2014-09-05 17:29:38 +010031
Yatharth Kochar07570d52016-11-14 12:01:04 +000032# Flag to enable support for AArch32 state on JUNO
33JUNO_AARCH32_EL3_RUNTIME := 0
34$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
35$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
36
Summer Qin60a23fd2018-03-02 15:51:14 +080037# Flag to enable support for TZMP1 on JUNO
38JUNO_TZMP1 := 0
39$(eval $(call assert_boolean,JUNO_TZMP1))
40ifeq (${JUNO_TZMP1}, 1)
Rajasekaran Kalidoss352366e2023-05-08 14:55:13 +020041 ifeq (${ETHOSN_NPU_TZMP1},1)
42 $(error JUNO_TZMP1 cannot be used together with ETHOSN_NPU_TZMP1)
Bjorn Engstrom035c9112022-08-26 09:45:45 +020043 else
44 $(eval $(call add_define,JUNO_TZMP1))
45 endif
Summer Qin60a23fd2018-03-02 15:51:14 +080046endif
47
Andre Przywaracb5f0fa2020-10-08 00:45:22 +010048TRNG_SUPPORT := 1
49
Soby Mathew5744e872017-11-14 14:10:10 +000050ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
51# Include BL32 in FIP
52NEED_BL32 := yes
53# BL31 is not required
54override BL31_SOURCES =
55
56# The BL32 needs to be built separately invoking the AARCH32 compiler and
57# be specifed via `BL32` build option.
58 ifneq (${ARCH}, aarch32)
59 override BL32_SOURCES =
60 endif
Juan Pablo Conde75574862023-08-09 18:16:40 -050061else
62 ifeq (${ARCH}, aarch32)
63 $(error JUNO_AARCH32_EL3_RUNTIME has to be enabled to build BL32 for AArch32)
64 endif
Soby Mathew5744e872017-11-14 14:10:10 +000065endif
66
Yatharth Kochar07570d52016-11-14 12:01:04 +000067ifeq (${ARCH},aarch64)
Dan Handleyf8b0b222015-03-19 19:22:44 +000068BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Brendan Jackman0f829ea2015-10-30 16:25:12 +000069 lib/cpus/aarch64/cortex_a57.S \
Juan Castillo7b4c1402015-10-06 14:01:35 +010070 lib/cpus/aarch64/cortex_a72.S \
Sathees Balya4da6f6c2018-09-03 17:41:13 +010071 plat/arm/board/juno/juno_err.c \
Yatharth Kochar436223d2015-10-11 14:14:55 +010072 plat/arm/board/juno/juno_bl1_setup.c \
Aditya Angadib0c97da2019-04-16 11:29:14 +053073 drivers/arm/sp805/sp805.c \
dp-arme6d2aea2017-02-28 14:43:15 +000074 ${JUNO_INTERCONNECT_SOURCES} \
75 ${JUNO_SECURITY_SOURCES}
Juan Castillo740134e2014-09-05 17:29:38 +010076
Ambroise Vincent37b70032019-07-04 14:58:45 +010077BL2_SOURCES += drivers/arm/sp805/sp805.c \
78 lib/utils/mem_region.c \
Sathees Balya4da6f6c2018-09-03 17:41:13 +010079 plat/arm/board/juno/juno_err.c \
Roberto Vargas9d57a142018-08-06 13:35:31 +010080 plat/arm/board/juno/juno_bl2_setup.c \
81 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +000082 ${JUNO_SECURITY_SOURCES}
Juan Castillo740134e2014-09-05 17:29:38 +010083
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +000084BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
Yatharth Kochardcda29f2015-10-14 15:28:11 +010085
Antonio Nino Diazaa7877c2018-10-10 11:14:44 +010086BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
87 lib/cpus/aarch64/cortex_a53.S \
Soby Mathewc1bb8a02015-10-12 17:32:29 +010088 lib/cpus/aarch64/cortex_a57.S \
Brendan Jackman0f829ea2015-10-30 16:25:12 +000089 lib/cpus/aarch64/cortex_a72.S \
Roberto Vargas9d57a142018-08-06 13:35:31 +010090 lib/utils/mem_region.c \
Mikael Olsson5d5fb102021-02-12 17:30:16 +010091 lib/fconf/fconf.c \
92 lib/fconf/fconf_dyn_cfg_getter.c \
93 plat/arm/board/juno/juno_bl31_setup.c \
Chandni Cherukuri89f2e582018-11-14 13:43:59 +053094 plat/arm/board/juno/juno_pm.c \
Soby Mathew01080472016-02-01 14:04:34 +000095 plat/arm/board/juno/juno_topology.c \
Roberto Vargas9d57a142018-08-06 13:35:31 +010096 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri6355f232016-02-15 11:54:14 +000097 ${JUNO_INTERCONNECT_SOURCES} \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +000098 ${JUNO_SECURITY_SOURCES}
Sathees Balya4da6f6c2018-09-03 17:41:13 +010099
Chris Kay1fa05da2021-09-28 15:52:14 +0100100BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
101
Sathees Balya4da6f6c2018-09-03 17:41:13 +0100102ifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
Antonio Nino Diaz5932d192019-01-23 19:06:55 +0000103BL1_SOURCES += drivers/arm/css/sds/sds.c
Sathees Balya4da6f6c2018-09-03 17:41:13 +0100104endif
105
Max Shvetsova6ffdde2019-12-06 11:50:12 +0000106ifeq (${TRUSTED_BOARD_BOOT}, 1)
Rob Hughes33bcaed2023-01-17 16:10:26 +0000107 # Enable Juno specific TBBR images
108 $(eval $(call add_define,PLAT_TBBR_IMG_DEF))
109 DTC_CPPFLAGS += ${PLAT_INCLUDES}
110
111 BL1_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
112 BL2_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
113
114 ifeq (${COT_DESC_IN_DTB},0)
115 BL2_SOURCES += plat/arm/board/juno/juno_tbbr_cot_bl2.c
116 endif
Max Shvetsova6ffdde2019-12-06 11:50:12 +0000117endif
118
Yatharth Kochar07570d52016-11-14 12:01:04 +0000119endif
Juan Castillo740134e2014-09-05 17:29:38 +0100120
Deepak Pandey49d3a622018-05-25 12:43:30 +0530121ifneq (${RESET_TO_BL31},0)
Sandrine Bailleux9ce0d322019-01-07 15:35:37 +0100122 $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
Deepak Pandey49d3a622018-05-25 12:43:30 +0530123 Please set RESET_TO_BL31 to 0.")
124endif
125
Sathees Balyaafa5cfe2018-11-02 14:56:06 +0000126ifeq ($(USE_ROMLIB),1)
Chris Kay6e622812024-09-03 12:36:33 +0000127all: $(BUILD_PLAT)/bl1_romlib.bin
Sathees Balyaafa5cfe2018-11-02 14:56:06 +0000128endif
129
Chris Kay6e622812024-09-03 12:36:33 +0000130$(BUILD_PLAT)/bl1_romlib.bin: $(BUILD_PLAT)/bl1.bin $(BUILD_PLAT)/romlib/romlib.bin
Chris Kay7c4e1ee2024-05-02 17:52:37 +0000131 $(s)echo "Building combined BL1 and ROMLIB binary for Juno $@"
Sathees Balyaafa5cfe2018-11-02 14:56:06 +0000132 ./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
133
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100134# Errata workarounds for Cortex-A53:
Ambroise Vincentd6bf24d2019-02-22 14:19:16 +0000135ERRATA_A53_819472 := 1
136ERRATA_A53_824069 := 1
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100137ERRATA_A53_826319 := 1
Ambroise Vincentd6bf24d2019-02-22 14:19:16 +0000138ERRATA_A53_827319 := 1
Douglas Raillarda94cc372017-06-19 15:38:02 +0100139ERRATA_A53_835769 := 1
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100140ERRATA_A53_836870 := 1
Douglas Raillarda94cc372017-06-19 15:38:02 +0100141ERRATA_A53_843419 := 1
Andre Przywarab75dc0e2016-10-06 16:54:53 +0100142ERRATA_A53_855873 := 1
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100143
144# Errata workarounds for Cortex-A57:
Vikram Kanigiric64a0442016-01-20 15:57:35 +0000145ERRATA_A57_806969 := 0
Antonio Nino Diazccbec912017-02-24 11:39:22 +0000146ERRATA_A57_813419 := 1
Vikram Kanigiric64a0442016-01-20 15:57:35 +0000147ERRATA_A57_813420 := 1
Ambroise Vincentd6bf24d2019-02-22 14:19:16 +0000148ERRATA_A57_814670 := 1
149ERRATA_A57_817169 := 1
Douglas Raillard6f822cc2017-02-28 17:56:15 +0000150ERRATA_A57_826974 := 1
151ERRATA_A57_826977 := 1
152ERRATA_A57_828024 := 1
153ERRATA_A57_829520 := 1
154ERRATA_A57_833471 := 1
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100155ERRATA_A57_859972 := 0
Douglas Raillard6f822cc2017-02-28 17:56:15 +0000156
Eleanor Bonnici96ff2602017-08-04 15:03:51 +0100157# Errata workarounds for Cortex-A72:
158ERRATA_A72_859971 := 0
Soby Mathew5541bb32014-09-22 14:13:34 +0100159
160# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
161# power down sequence
162SKIP_A57_L1_FLUSH_PWR_DWN := 1
Dan Handleyf8b0b222015-03-19 19:22:44 +0000163
David Cunado3872fc22017-10-31 23:19:21 +0000164# Do not enable SVE
165ENABLE_SVE_FOR_NS := 0
166
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000167# Enable the dynamic translation tables library.
168ifeq (${ARCH},aarch32)
169 ifeq (${RESET_TO_SP_MIN},1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900170 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000171 endif
172else
173 ifeq (${RESET_TO_BL31},1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900174 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000175 endif
176endif
177
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000178ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
179 ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900180 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000181 else
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900182 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000183 endif
184endif
185
Andre Przywaraeb18ce32020-10-16 12:06:57 +0100186BL1_CPPFLAGS += -march=armv8-a+crc
187BL2_CPPFLAGS += -march=armv8-a+crc
188BL2U_CPPFLAGS += -march=armv8-a+crc
189BL31_CPPFLAGS += -march=armv8-a+crc
190BL32_CPPFLAGS += -march=armv8-a+crc
191
Louis Mayencourt8075fc52019-07-29 10:40:17 +0100192# Add the FDT_SOURCES and options for Dynamic Config
Manish V Badarkhe3cb84a52020-05-31 08:53:40 +0100193FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
Mikael Olsson5d5fb102021-02-12 17:30:16 +0100194 plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \
195 fdts/${PLAT}.dts
Louis Mayencourt8075fc52019-07-29 10:40:17 +0100196
Manish V Badarkhe3cb84a52020-05-31 08:53:40 +0100197FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
198TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Mikael Olsson5d5fb102021-02-12 17:30:16 +0100199HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
Manish V Badarkhe3cb84a52020-05-31 08:53:40 +0100200
201# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3ab336a2020-08-23 19:32:48 +0100202$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
Louis Mayencourt8075fc52019-07-29 10:40:17 +0100203# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3ab336a2020-08-23 19:32:48 +0100204$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Mikael Olsson5d5fb102021-02-12 17:30:16 +0100205# Add the HW_CONFIG to FIP and specify the same to certtool
206$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
Louis Mayencourt8075fc52019-07-29 10:40:17 +0100207
Rajasekaran Kalidoss352366e2023-05-08 14:55:13 +0200208include drivers/arm/ethosn/ethosn_npu.mk
Antonio Nino Diaz58ea77a2018-10-10 11:02:34 +0100209include plat/arm/board/common/board_common.mk
Dan Handleyf8b0b222015-03-19 19:22:44 +0000210include plat/arm/common/arm_common.mk
211include plat/arm/soc/common/soc_css.mk
212include plat/arm/css/common/css_common.mk